| /external/capstone/suite/MC/Mips/ |
| H A D | mips-dsp-instructions.s.cs | 25 0x00,0x85,0x10,0x19 = multu $ac2, $4, $5
35 0x00,0x85,0x00,0x19 = multu $4, $5
|
| H A D | micromips-alu-instructions-EB.s.cs | 31 0x00,0xe9,0x9b,0x3c = multu $9, $7
|
| H A D | micromips-alu-instructions.s.cs | 31 0xe9,0x00,0x3c,0x9b = multu $9, $7
|
| H A D | mips-alu-instructions.s.cs | 46 0x19,0x00,0x65,0x00 = multu $3, $5
|
| H A D | mips64-alu-instructions.s.cs | 45 0x19,0x00,0x65,0x00 = multu $3, $5
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| H A D | invalid-mips1.s | 23 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
24 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| H A D | invalid-mips2.s | 29 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
30 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| H A D | invalid-mips1.s | 26 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
27 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| H A D | invalid-mips2.s | 32 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
33 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| H A D | invalid-mips3.s | 22 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
23 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| H A D | invalid-mips64.s | 43 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
44 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/ |
| H A D | mips-alu-instructions.s | 87 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
112 multu $3,$5
|
| H A D | mips64-alu-instructions.s | 83 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
108 multu $3,$5
|
| H A D | micromips-alu-instructions.s | 38 # CHECK-EL: multu $9, $7 # encoding: [0xe9,0x00,0x3c,0x9b]
81 # CHECK-EB: multu $9, $7 # encoding: [0x00,0xe9,0x9b,0x3c]
122 multu $9, $7
|
| /external/llvm/test/MC/Mips/dsp/ |
| H A D | valid.s | 78 multu $ac2, $4, $5 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0x85,0x10,0x19]
80 multu $4, $5 # CHECK: multu $4, $5 # encoding: [0x00,0x85,0x00,0x19]
|
| /external/llvm/test/MC/Mips/dspr2/ |
| H A D | valid.s | 106 multu $ac2, $4, $5 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0x85,0x10,0x19]
108 multu $4, $5 # CHECK: multu $4, $5 # encoding: [0x00,0x85,0x00,0x19]
|
| /external/llvm/test/MC/Mips/mips1/ |
| H A D | valid.s | 78 multu $gp,$k0
79 multu $9,$s2
|
| /external/llvm/test/MC/Mips/mips2/ |
| H A D | valid.s | 98 multu $gp,$k0
99 multu $9,$s2
|
| /external/llvm/test/MC/Mips/micromips-dsp/ |
| H A D | valid.s | 35 multu $ac2, $4, $5 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0xa4,0x9c,0xbc]
|
| /external/llvm/test/MC/Mips/micromips-dspr2/ |
| H A D | valid.s | 48 multu $ac2, $4, $5 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0xa4,0x9c,0xbc]
|
| /external/llvm/test/MC/Mips/mips3/ |
| H A D | valid.s | 158 multu $gp,$k0
159 multu $9,$s2
|
| /external/llvm/test/MC/Mips/mips32/ |
| H A D | valid.s | 126 multu $gp,$k0
127 multu $9,$s2
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| H A D | valid.s | 144 multu $gp,$k0
145 multu $9,$s2
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| H A D | valid.s | 144 multu $gp,$k0
145 multu $9,$s2
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| H A D | valid.s | 145 multu $gp,$k0
146 multu $9,$s2
|