Searched refs:rD (Results 1 - 25 of 32) sorted by relevance

12

/external/compiler-rt/lib/builtins/arm/
H A Dsync_fetch_and_add_4.S18 #define add_4(rD, rN, rM) add rD, rN, rM
H A Dsync_fetch_and_and_4.S17 #define and_4(rD, rN, rM) and rD, rN, rM
H A Dsync_fetch_and_max_4.S17 #define max_4(rD, rN, rM) MINMAX_4(rD, rN, rM, gt)
H A Dsync_fetch_and_min_4.S17 #define min_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lt)
H A Dsync_fetch_and_nand_4.S17 #define nand_4(rD, rN, rM) bic rD, rN, rM
H A Dsync_fetch_and_or_4.S17 #define or_4(rD, rN, rM) orr rD, rN, rM
H A Dsync_fetch_and_sub_4.S18 #define sub_4(rD, rN, rM) sub rD, rN, rM
H A Dsync_fetch_and_umax_4.S17 #define umax_4(rD, rN, rM) MINMAX_4(rD, rN, rM, hi)
H A Dsync_fetch_and_umin_4.S17 #define umin_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lo)
H A Dsync_fetch_and_xor_4.S17 #define xor_4(rD, rN, rM) eor rD, rN, rM
H A Dsync-ops.h51 #define MINMAX_4(rD, rN, rM, cmp_kind) \
53 mov rD, rM ; \
55 mov##cmp_kind rD, rN
/external/lzma/Asm/x86/
H A DXzCrc64Opt.asm10 rD equ r9 define
16 SRCDAT equ rN + rD
23 movzx x6, BYTE PTR [rD]
24 inc rD
38 mov rD, r2
42 test rD, 3
49 add rN, rD
53 sub rD, rN
63 mov rD, rN
65 sub rN, rD
100 rD equ r1 define
[all...]
H A DAesOpt.asm18 rD equ r2 define
77 movdqa xmm6, [rD + offs]
78 movdqa [rD + offs], reg
101 OP_W movdqa, [rD + i * 16]
105 add rD, ways16
115 movdqa xmm1, [rD]
120 movdqa [rD], xmm0
122 add rD, 16
155 pxor xmm0, [rD]
158 movdqa [rD], xmm
[all...]
H A D7zCrcOpt.asm8 rD equ r2 define
21 SRCDAT equ rN + rD + 4 *
36 movzx x6, BYTE PTR [rD]
37 inc rD
54 test rD, 7
61 add rN, rD
65 sub rD, rN
71 mov rD, rN
73 sub rN, rD
110 add rD,
[all...]
/external/valgrind/VEX/priv/
H A Dguest_arm_toIR.c7890 void mk_neon_elem_load_to_one_lane( UInt rD, UInt inc, UInt index, argument
7896 putDRegI64(rD, triop(Iop_SetElem8x8, getDRegI64(rD), mkU8(index),
7900 putDRegI64(rD, triop(Iop_SetElem16x4, getDRegI64(rD), mkU8(index),
7904 putDRegI64(rD, triop(Iop_SetElem32x2, getDRegI64(rD), mkU8(index),
7913 putDRegI64(rD + i * inc,
7915 getDRegI64(rD + i * inc),
7923 putDRegI64(rD
7951 mk_neon_elem_store_from_one_lane( UInt rD, UInt inc, UInt index, UInt N, UInt size, IRTemp addr ) argument
8392 UInt rD = (INSN(22,22) << 4) | INSN(15,12); local
10983 UInt rD = 99, rN = 99, rM = 99, rA = 99; local
12398 UInt rD = 99, rN = 99, rM = 99, rA = 99; local
14572 UInt rD = INSN(15,12); local
14602 UInt rD = INSN(15,12); local
14617 UInt rD = INSN(15,12); /* lo32 */ local
14637 UInt rD = INSN(15,12); /* lo32 */ local
14707 UInt rD = (INSN(7,7) << 4) | INSN(19,16); local
14809 UInt rD = (INSN(15,12) << 1) | INSN(22,22); local
14825 UInt rD = INSN(15,12) | (INSN(22,22) << 4); local
14842 UInt rD = (INSN(7,7) << 4) | INSN(19,16); local
15365 UInt rD = INSN(15,12); local
16240 UInt rD = (insn >> 12) & 0xF; /* 15:12 */ local
16574 UInt rD = (insn >> 12) & 0xF; /* 15:12 */ local
16802 UInt rD = (insn >> 12) & 0xF; /* 15:12 */ local
17155 UInt rD = INSN(15,12); local
17176 UInt rD = INSN(19,16); local
17217 UInt rD = INSN(19,16); local
17239 UInt rD = INSN(19,16); local
17262 UInt rD = INSN(19,16); local
17492 UInt rD = INSN(15,12); local
17527 UInt rD = INSN(15,12); local
17638 UInt rD = INSN(15,12); local
17703 UInt rD = INSN(15,12); local
17737 UInt rD = INSN(15,12); local
17798 UInt rD = INSN(15,12); local
17842 UInt rD = INSN(15,12); local
17926 UInt rD = (insn >> 12) & 0xF; /* 15:12 */ local
18088 UInt rD = INSN(15,12); local
18118 UInt rD = INSN(15,12); local
18149 UInt rD = INSN(15,12); local
18164 UInt rD = INSN(15,12); local
18194 UInt rD = INSN(15,12); local
18211 UInt rD = INSN(19,16); local
18232 UInt rD = INSN(19,16); local
18694 UInt rD = INSN(15,12); local
18714 UInt rD = INSN(15,12); local
19446 UInt rD = INSN0(2,0); local
19462 UInt rD = INSN0(2,0); local
19492 UInt rD = INSN0(2,0); local
19512 UInt rD = INSN0(2,0); local
19533 UInt rD = INSN0(2,0); local
19556 UInt rD = INSN0(2,0); local
19579 UInt rD = INSN0(2,0); local
19590 UInt rD = INSN0(2,0); local
19603 UInt rD = INSN0(2,0); local
19614 UInt rD = INSN0(2,0); local
19633 UInt rD = INSN0(2,0); local
19685 UInt rD = INSN0(2,0); local
19698 UInt rD = INSN0(2,0); local
19842 UInt rD = (h1 << 3) | INSN0(2,0); local
19893 UInt rD = (h1 << 3) | INSN0(2,0); local
20132 UInt rD = INSN0(2,0); local
20153 UInt rD = INSN0(2,0); local
20173 UInt rD = INSN0(2,0); local
20198 UInt rD = INSN0(2,0); local
20221 UInt rD = INSN0(2,0); local
20239 UInt rD = INSN0(2,0); local
20259 UInt rD = INSN0(2,0); local
20312 UInt rD = INSN0(10,8); local
20324 UInt rD = INSN0(10,8); local
20348 UInt rD = INSN0(10,8); local
20366 UInt rD = INSN0(10,8); local
20388 UInt rD = INSN0(2,0); local
20413 UInt rD = INSN0(2,0); local
20438 UInt rD = INSN0(2,0); local
20463 UInt rD = INSN0(10,8); local
20580 UInt rD = INSN0(2,0); local
20867 UInt rD = INSN1(11,8); local
20894 UInt rD = INSN1(11,8); local
20975 UInt rD = INSN1(11,8); local
21009 UInt rD = INSN1(11,8); local
21038 UInt rD = INSN1(11,8); local
21094 UInt rD = INSN1(11,8); local
21143 UInt rD = INSN1(11,8); local
21222 UInt rD = INSN1(11,8); local
21291 UInt rD = INSN1(11,8); local
21356 UInt rD = INSN1(11,8); local
21391 UInt rD = INSN1(11,8); local
21508 UInt rD = INSN1(11,8); local
21537 UInt rD = INSN1(11,8); local
21551 UInt rD = INSN1(11,8); local
22303 UInt rD = INSN1(11,8); local
22348 UInt rD = INSN1(11,8); local
22417 UInt rD = INSN1(11,8); local
22432 UInt rD = INSN1(11,8); local
22451 UInt rD = INSN1(11,8); local
22493 UInt rD = INSN1(11,8); local
22514 UInt rD = INSN1(11,8); local
22602 UInt rD = INSN1(11,8); local
22624 UInt rD = INSN1(11,8); local
22646 UInt rD = INSN1(11,8); local
22662 UInt rD = INSN1(11,8); local
22710 UInt rD = INSN1(11,8); local
22739 UInt rD = INSN1(11,8); local
22765 UInt rD = INSN1(11,8); local
22787 UInt rD = INSN1(11,8); local
22806 UInt rD = INSN1(11,8); local
22825 UInt rD = INSN1(11,8); local
22872 UInt rD = INSN1(11,8); local
22949 UInt rD = INSN1(11,8); local
22979 UInt rD = INSN1(3,0); local
23008 UInt rD = INSN1(3,0); local
23115 UInt rD = INSN1(15,12); local
23130 UInt rD = INSN1(15,12); local
[all...]
H A Dhost_arm64_defs.c888 ARM64Instr* ARM64Instr_LdSt64 ( Bool isLoad, HReg rD, ARM64AMode* amode ) { argument
892 i->ARM64in.LdSt64.rD = rD;
896 ARM64Instr* ARM64Instr_LdSt32 ( Bool isLoad, HReg rD, ARM64AMode* amode ) { argument
900 i->ARM64in.LdSt32.rD = rD;
904 ARM64Instr* ARM64Instr_LdSt16 ( Bool isLoad, HReg rD, ARM64AMode* amode ) { argument
908 i->ARM64in.LdSt16.rD = rD;
912 ARM64Instr* ARM64Instr_LdSt8 ( Bool isLoad, HReg rD, ARM64AMod argument
1063 ARM64Instr_VCvtI2F( ARM64CvtOp how, HReg rD, HReg rS ) argument
1071 ARM64Instr_VCvtF2I( ARM64CvtOp how, HReg rD, HReg rS, UChar armRM ) argument
1300 ARM64Instr_VDfromX( HReg rD, HReg rX ) argument
3298 UInt rD = iregEnc(i->ARM64in.Arith.dst); local
3324 UInt rD = 31; /* XZR, we are going to dump the result */ local
3351 UInt rD = iregEnc(i->ARM64in.Logic.dst); local
3391 UInt rD = 31; /* XZR, we are going to dump the result */ local
3410 UInt rD = iregEnc(i->ARM64in.Shift.dst); local
3970 UInt rD = dregEnc(i->ARM64in.VCvtI2F.rD); local
4015 UInt rD = iregEnc(i->ARM64in.VCvtF2I.rD); local
5401 HReg rD = i->ARM64in.VMov.dst; local
[all...]
H A Dhost_arm_defs.c1137 Bool isLoad, HReg rD, ARMAMode1* amode ) {
1142 i->ARMin.LdSt32.rD = rD;
1149 HReg rD, ARMAMode2* amode ) {
1155 i->ARMin.LdSt16.rD = rD;
1161 Bool isLoad, HReg rD, ARMAMode1* amode ) {
1166 i->ARMin.LdSt8U.rD = rD;
1171 ARMInstr* ARMInstr_Ld8S ( ARMCondCode cc, HReg rD, ARMAMode argument
1136 ARMInstr_LdSt32( ARMCondCode cc, Bool isLoad, HReg rD, ARMAMode1* amode ) argument
1147 ARMInstr_LdSt16( ARMCondCode cc, Bool isLoad, Bool signedLoad, HReg rD, ARMAMode2* amode ) argument
1160 ARMInstr_LdSt8U( ARMCondCode cc, Bool isLoad, HReg rD, ARMAMode1* amode ) argument
1534 ARMInstr_Add32( HReg rD, HReg rN, UInt imm32 ) argument
2913 imm32_to_ireg( UInt* p, Int rD, UInt imm32 ) argument
2995 imm32_to_ireg_EXACTLY2( UInt* p, Int rD, UInt imm32 ) argument
3018 is_imm32_to_ireg_EXACTLY2( UInt* p, Int rD, UInt imm32 ) argument
3038 do_load_or_store32( UInt* p, Bool isLoad, UInt rD, ARMAMode1* am ) argument
3086 UInt rD = iregEnc(i->ARMin.Alu.dst); local
3114 UInt rD = iregEnc(i->ARMin.Shift.dst); local
3184 HReg rD; local
3224 HReg rD = i->ARMin.LdSt16.rD; local
3273 HReg rD = i->ARMin.Ld8S.rD; local
[all...]
H A Dhost_arm64_defs.h584 HReg rD; member in struct:__anon28205::__anon28206::__anon28215
590 HReg rD; member in struct:__anon28205::__anon28206::__anon28216
596 HReg rD; member in struct:__anon28205::__anon28206::__anon28217
602 HReg rD; member in struct:__anon28205::__anon28206::__anon28218
738 HReg rD; // dst, a D or S register member in struct:__anon28205::__anon28206::__anon28236
744 HReg rD; // dst, a W or X register member in struct:__anon28205::__anon28206::__anon28237
872 HReg rD; member in struct:__anon28205::__anon28206::__anon28257
952 extern ARM64Instr* ARM64Instr_VCvtI2F ( ARM64CvtOp how, HReg rD, HReg rS );
953 extern ARM64Instr* ARM64Instr_VCvtF2I ( ARM64CvtOp how, HReg rD, HReg rS,
978 extern ARM64Instr* ARM64Instr_VDfromX ( HReg rD, HRe
[all...]
H A Dhost_arm_defs.h674 HReg rD; member in struct:__anon28310::__anon28311::__anon28318
682 HReg rD; member in struct:__anon28310::__anon28311::__anon28319
689 HReg rD; member in struct:__anon28310::__anon28311::__anon28320
695 HReg rD; member in struct:__anon28310::__anon28311::__anon28321
968 /* Note: rD != rN */
969 HReg rD; member in struct:__anon28310::__anon28311::__anon28360
1047 extern ARMInstr* ARMInstr_Add32 ( HReg rD, HReg rN, UInt imm32 );
H A Dhost_arm64_isel.c3063 HReg rD = newVRegD(env); local
3065 addInstr(env, ARM64Instr_VLdStD(True/*isLoad*/, rD, rN, offs));
3066 return rD;
3250 HReg rD = newVRegD(env); local
3252 addInstr(env, ARM64Instr_VLdStS(True/*isLoad*/, rD, rN, offs));
3253 return rD;
3397 HReg rD = newVRegD(env); local
3399 addInstr(env, ARM64Instr_VLdStH(True/*isLoad*/, rD, rN, offs));
3400 return rD;
3563 HReg rD local
3569 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data); local
3575 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data); local
3581 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data); local
3613 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data); local
3619 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data); local
3625 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data); local
3631 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data); local
3673 HReg rD = iselIntExpr_R(env, stmt->Ist.WrTmp.data); local
3830 HReg rD = iselIntExpr_R(env, stmt->Ist.LLSC.storedata); local
[all...]
H A Dhost_arm_isel.c2473 HReg rD = newVRegD(env); local
2478 Bool resRd; // is the result in rD or rM ?
2489 addInstr(env, ARMInstr_NUnary(ARMneon_COPY, rD, argR, 4, False));
2490 addInstr(env, ARMInstr_NDual(ARMneon_TRN, rD, rM, size, False));
2491 return resRd ? rD : rM;
2499 HReg rD = newVRegD(env); local
2504 Bool resRd; // is the result in rD or rM ?
2513 addInstr(env, ARMInstr_NUnary(ARMneon_COPY, rD, argR, 4, False));
2514 addInstr(env, ARMInstr_NDual(ARMneon_ZIP, rD, rM, size, False));
2515 return resRd ? rD
2523 HReg rD = newVRegD(env); local
4607 HReg rD = newVRegV(env); local
4635 HReg rD = newVRegV(env); local
4663 HReg rD = newVRegV(env); local
5883 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data); local
5889 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data); local
5897 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data); local
5954 HReg rD = iselIntExpr_R(env, sg->data); local
5962 HReg rD = iselIntExpr_R(env, sg->data); local
5991 HReg rD = lookupIRTemp(env, lg->dst); local
6004 HReg rD = lookupIRTemp(env, lg->dst); local
6028 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data); local
6058 HReg rD = iselDblExpr(env, stmt->Ist.Put.data); local
6066 HReg rD = iselFltExpr(env, stmt->Ist.Put.data); local
6295 HReg rD = iselIntExpr_R(env, stmt->Ist.LLSC.storedata); local
[all...]
H A Dguest_ppc_toIR.c4879 IRTemp rD = newTemp( ty ); local
4919 assign( rD, binop( Iop_Add64,
4942 assign( rD, binop( Iop_Add64,
4954 assign( rD, binop( Iop_Add64, mkexpr( tmpLo ), mkexpr( rC ) ) );
4962 putIReg( rD_addr, mkexpr(rD) );
4983 IRTemp rD = newTemp(ty); local
4988 assign( rB, getIReg(rB_addr) ); // XO-Form: rD, rA, rB
4994 assign( rD, binop( mkSzOp(ty, Iop_Add8), mkexpr(rA),
4997 mkexpr(rD), mkexpr(rA), mkSzExtendS16(ty, uimm16),
5003 assign( rD, bino
5639 IRTemp rD = newTemp( ty ); local
7699 generate_lsw_sequence( IRTemp tNBytes, IRTemp EA, Int rD, Int maxBytes ) argument
[all...]
H A Dguest_amd64_toIR.c22806 UInt rD = gregOfRexRM(pfx, modrm); local
22823 name, nameXMMReg(rSR), nameXMMReg(rSL), nameXMMReg(rD));
22829 name, dis_buf, nameXMMReg(rSL), nameXMMReg(rD));
22852 putYMMRegLoAndZU(rD, mkexpr(res));
23160 UInt rD = getVexNvvvv(pfx); local
23170 nameXMMReg(rD));
23202 putYMMRegLoAndZU( rD, mkexpr(e1) );
23217 UInt rD = getVexNvvvv(pfx); local
23227 nameYMMReg(rD));
23260 putYMMReg( rD, mkexp
23725 UInt rD = gregOfRexRM(pfx, modrm); local
24776 UInt rD = gregOfRexRM(pfx, modrm); local
24802 UInt rD = gregOfRexRM(pfx, modrm); local
24830 UInt rD = gregOfRexRM(pfx, modrm); local
24860 UInt rD = gregOfRexRM(pfx, modrm); local
25316 UInt rD = gregOfRexRM(pfx, modrm); local
25346 UInt rD = gregOfRexRM(pfx, modrm); local
25893 UInt rD = gregOfRexRM(pfx, modrm); local
25918 UInt rD = gregOfRexRM(pfx, modrm); local
26093 Int rD = getVexNvvvv(pfx); local
26134 Int rD = getVexNvvvv(pfx); local
26461 UInt rD = eregOfRexRM(pfx, modrm); local
26486 UInt rD = eregOfRexRM(pfx, modrm); local
27322 UInt rD = gregOfRexRM(pfx, modrm); local
27335 UInt rD = gregOfRexRM(pfx, modrm); local
28783 UInt rD = gregOfRexRM(pfx, modrm); local
28797 UInt rD = gregOfRexRM(pfx, modrm); local
31328 UInt rD = eregOfRexRM(pfx, modrm); local
31538 UInt rD = eregOfRexRM(pfx, modrm); local
[all...]
/external/aac/libFDK/src/
H A DFDK_crc.cpp429 CCrcRegData *rD = &hCrcInfo->crcRegData[reg]; local
435 -(rD->validBits - (INT)FDKgetValidBits(&bsReader)));
439 FDKpushBiDirectional(&bsReader, rD->validBits);
443 rBits = (rD->maxBits >= 0) ? rD->maxBits : -rD->maxBits; /* ramaining bits */
444 if ((rD->maxBits > 0) && ((rD->bitBufCntBits >> 3 << 3) < rBits)) {
445 bits = rD->bitBufCntBits;
/external/mesa3d/src/gallium/state_trackers/nine/
H A Dnine_ff.c790 struct ureg_dst rD = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ); local
815 ureg_MOV(ureg, rD, ureg_imm1f(ureg, 0.0f));
904 ureg_MAD(ureg, rD, cLColD, _X(tmp), ureg_src(rD)); /* accumulate diffuse */
933 ureg_MAD(ureg, ureg_writemask(oCol[0], TGSI_WRITEMASK_XYZ), ureg_src(rD), vs->mtlD, ureg_src(tmp));
940 ureg_release_temporary(ureg, rD);

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