/external/libunwind/src/mips/ |
H A D | regname.c | 40 unw_regname (unw_regnum_t reg) argument 42 if (reg < (unw_regnum_t) ARRAY_SIZE (regname)) 43 return regname[reg]; 44 else if (reg == UNW_MIPS_PC)
|
/external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
H A D | vmx_asm.h | 13 #define PUSH_VMX(pos,reg) \ 14 li reg,pos; \ 15 stvx v20,reg,%r1; \ 16 addi reg,reg,16; \ 17 stvx v21,reg,%r1; \ 18 addi reg,reg,16; \ 19 stvx v22,reg,%r1; \ 20 addi reg,re [all...] |
/external/libunwind/src/arm/ |
H A D | regname.c | 84 unw_regname (unw_regnum_t reg) argument 86 if (reg < (unw_regnum_t) ARRAY_SIZE (regname)) 87 return regname[reg];
|
/external/libunwind/src/hppa/ |
H A D | regname.c | 44 unw_regname (unw_regnum_t reg) argument 46 if (reg < (unw_regnum_t) ARRAY_SIZE (regname)) 47 return regname[reg];
|
/external/libunwind/src/ia64/ |
H A D | regname.c | 183 unw_regname (unw_regnum_t reg) argument 185 if (reg < NREGS) 186 return regname_str + reg * regname_len;
|
H A D | regs.h | 31 rotate_gr (struct cursor *c, int reg) argument 39 if ((unsigned) (reg - 32) >= sor) 40 preg = reg; 43 preg = reg + rrb_gr; /* apply rotation */ 48 Debug (15, "sor=%u rrb.gr=%u, r%d -> r%d\n", sor, rrb_gr, reg, preg); 56 rotate_fr (struct cursor *c, int reg) argument 62 if (reg < 32) 63 preg = reg; /* register not part of the rotating partition */ 66 preg = reg + rrb_fr; /* apply rotation */ 71 Debug (15, "rrb.fr=%u, f%d -> f%d\n", rrb_fr, reg, pre [all...] |
/external/libunwind/src/x86/ |
H A D | regname.c | 21 unw_regname (unw_regnum_t reg) argument 23 if (reg < (unw_regnum_t) ARRAY_SIZE (regname)) 24 return regname[reg];
|
/external/libunwind/src/x86_64/ |
H A D | regname.c | 50 unw_regname (unw_regnum_t reg) argument 52 if (reg < (unw_regnum_t) ARRAY_SIZE (regname)) 53 return regname[reg];
|
H A D | Gstash_frame.c | 37 rs->reg[DWARF_CFA_REG_COLUMN].where, 38 rs->reg[DWARF_CFA_REG_COLUMN].val, 39 rs->reg[DWARF_CFA_OFF_COLUMN].val, 41 rs->reg[RBP].where, rs->reg[RBP].val, DWARF_GET_LOC(d->loc[RBP]), 42 rs->reg[RSP].where, rs->reg[RSP].val, DWARF_GET_LOC(d->loc[RSP])); 50 && (rs->reg[DWARF_CFA_REG_COLUMN].where == DWARF_WHERE_REG) 51 && (rs->reg[DWARF_CFA_REG_COLUMN].val == RBP 52 || rs->reg[DWARF_CFA_REG_COLUM [all...] |
/external/llvm/test/MC/AsmParser/ |
H A D | macro-irp.s | 3 .irp reg,%eax,%ebx 4 pushl \reg 10 .irp reg,%eax,%ebx 12 addl \reg, \imm
|
/external/valgrind/coregrind/m_gdbserver/ |
H A D | regdef.h | 25 struct reg struct 45 void set_register_cache (struct reg *regs, int n);
|
/external/libunwind/include/tdep-arm/ |
H A D | dwarf-config.h | 33 #define dwarf_to_unw_regnum(reg) (((reg) < 16) ? (reg) : 0)
|
/external/clang/test/Index/ |
H A D | get-cursor.c | 16 r_t reg; local 17 reg.field = 1;
|
/external/mesa3d/src/amd/vulkan/ |
H A D | radv_cs.h | 42 static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) argument 44 assert(reg < R600_CONTEXT_REG_OFFSET); 47 radeon_emit(cs, (reg - R600_CONFIG_REG_OFFSET) >> 2); 50 static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) argument 52 radeon_set_config_reg_seq(cs, reg, 1); 56 static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) argument 58 assert(reg >= R600_CONTEXT_REG_OFFSET); 61 radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2); 64 static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) argument 66 radeon_set_context_reg_seq(cs, reg, 71 radeon_set_context_reg_idx(struct radeon_winsys_cs *cs, unsigned reg, unsigned idx, unsigned value) argument 82 radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) argument 90 radeon_set_sh_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) argument 96 radeon_set_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) argument 104 radeon_set_uconfig_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) argument 110 radeon_set_uconfig_reg_idx(struct radeon_winsys_cs *cs, unsigned reg, unsigned idx, unsigned value) argument [all...] |
/external/libunwind/src/sh/ |
H A D | regname.c | 50 unw_regname (unw_regnum_t reg) argument 52 if (reg < (unw_regnum_t) ARRAY_SIZE (regname) && regname[reg] != NULL) 53 return regname[reg];
|
/external/compiler-rt/lib/sanitizer_common/ |
H A D | sanitizer_asm.h | 27 # define CFI_REL_OFFSET(reg, n) .cfi_rel_offset reg, n 28 # define CFI_OFFSET(reg, n) .cfi_offset reg, n 29 # define CFI_DEF_CFA_REGISTER(reg) .cfi_def_cfa_register reg 30 # define CFI_DEF_CFA(reg, n) .cfi_def_cfa reg, n 31 # define CFI_RESTORE(reg) .cfi_restore reg [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_ir_fs.h | 39 fs_reg(struct ::brw_reg reg); 57 negate(fs_reg reg) argument 59 assert(reg.file != IMM); 60 reg.negate = !reg.negate; 61 return reg; 65 retype(fs_reg reg, enum brw_reg_type type) argument 67 reg.type = type; 68 return reg; 72 byte_offset(fs_reg reg, unsigne argument 103 horiz_offset(const fs_reg ®, unsigned delta) argument 131 offset(fs_reg reg, unsigned width, unsigned delta) argument 154 component(fs_reg reg, unsigned idx) argument 247 is_periodic(const fs_reg ®, unsigned n) argument 271 is_uniform(const fs_reg ®) argument 281 half(const fs_reg ®, unsigned idx) argument [all...] |
H A D | brw_vec4_live_variables.h | 82 * register reg. 85 var_from_reg(const simple_allocator &alloc, const src_reg ®, argument 88 assert(reg.file == VGRF && reg.nr < alloc.count && c < 4); 89 const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4); 91 8 * (alloc.offsets[reg.nr] + reg.offset / REG_SIZE) + 92 (BRW_GET_SWZ(reg.swizzle, c) + k / csize * 4) * csize + k % csize; 94 assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg [all...] |
H A D | brw_ir_vec4.h | 44 src_reg(struct ::brw_reg reg); 51 explicit src_reg(const dst_reg ®); 57 retype(src_reg reg, enum brw_reg_type type) argument 59 reg.type = type; 60 return reg; 66 add_byte_offset(backend_reg *reg, unsigned bytes) argument 68 switch (reg->file) { 74 reg->offset += bytes; 75 assert(reg->offset % 16 == 0); 78 const unsigned suboffset = reg 100 byte_offset(src_reg reg, unsigned bytes) argument 107 offset(src_reg reg, unsigned width, unsigned delta) argument 115 horiz_offset(src_reg reg, unsigned delta) argument 125 swizzle(src_reg reg, unsigned swizzle) argument 136 negate(src_reg reg) argument 144 is_uniform(const src_reg ®) argument 174 retype(dst_reg reg, enum brw_reg_type type) argument 181 byte_offset(dst_reg reg, unsigned bytes) argument 188 offset(dst_reg reg, unsigned width, unsigned delta) argument 196 horiz_offset(dst_reg reg, unsigned delta) argument 202 writemask(dst_reg reg, unsigned mask) argument [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcTargetStreamer.h | 22 /// Emit ".register <reg>, #ignore". 23 virtual void emitSparcRegisterIgnore(unsigned reg) = 0; 24 /// Emit ".register <reg>, #scratch". 25 virtual void emitSparcRegisterScratch(unsigned reg) = 0; 34 void emitSparcRegisterIgnore(unsigned reg) override; 35 void emitSparcRegisterScratch(unsigned reg) override; 44 void emitSparcRegisterIgnore(unsigned reg) override {} 45 void emitSparcRegisterScratch(unsigned reg) override {}
|
/external/mesa3d/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_util.h | 47 const struct tgsi_src_register *reg, 53 const struct tgsi_full_src_register *reg, 58 struct tgsi_src_register *reg, 69 const struct tgsi_full_src_register *reg, 74 struct tgsi_full_src_register *reg, 82 tgsi_util_get_src_from_ind(const struct tgsi_ind_register *reg);
|
H A D | tgsi_sanity.c | 67 scan_register_key(const scan_register *reg) argument 69 unsigned key = reg->file; 70 key |= (reg->indices[0] << 4); 71 key |= (reg->indices[1] << 18); 77 fill_scan_register1d(scan_register *reg, argument 80 reg->file = file; 81 reg->dimensions = 1; 82 reg->indices[0] = index; 83 reg->indices[1] = 0; 87 fill_scan_register2d(scan_register *reg, argument 97 scan_register_dst(scan_register *reg, struct tgsi_full_dst_register *dst) argument 115 scan_register_src(scan_register *reg, struct tgsi_full_src_register *src) argument 135 scan_register *reg = MALLOC(sizeof(scan_register)); local 144 scan_register *reg = MALLOC(sizeof(scan_register)); local 201 is_register_declared( struct sanity_check_ctx *ctx, const scan_register *reg) argument 220 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); local 230 is_register_used( struct sanity_check_ctx *ctx, scan_register *reg) argument 242 is_ind_register_used( struct sanity_check_ctx *ctx, scan_register *reg) argument 265 check_register_usage( struct sanity_check_ctx *ctx, scan_register *reg, const char *name, boolean indirect_access ) argument 340 scan_register *reg = create_scan_register_dst(&inst->Dst[i]); local 351 scan_register *reg = create_scan_register_src(&inst->Src[i]); local 377 check_and_declare(struct sanity_check_ctx *ctx, scan_register *reg) argument 422 scan_register *reg = MALLOC(sizeof(scan_register)); local 430 scan_register *reg = MALLOC(sizeof(scan_register)); local 435 scan_register *reg = MALLOC(sizeof(scan_register)); local 454 scan_register *reg; local 527 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); local 549 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); local [all...] |
/external/gemmlowp/internal/ |
H A D | simd_wrappers_common_neon_sse.h | 32 result.buf.reg[i] = LoadInt32x4(src.data(row, col + i)); 46 result.buf.reg[2 * i + 0] = LoadInt32x4(src.data(row + 0, col + i)); 47 result.buf.reg[2 * i + 1] = LoadInt32x4(src.data(row + 4, col + i)); 64 result.buf.reg[0] = LoadInt32x4(buf); 80 result.buf.reg[0] = LoadInt32x4(buf); 81 result.buf.reg[1] = LoadInt32x4(buf + 4); 92 result.buf.reg[0] = LoadInt32x4(src.data(pos)); 103 result.buf.reg[0] = LoadInt32x4(src(0)); 120 result.buf.reg[0] = LoadInt32x4(src.data(pos)); 137 result.buf.reg[ [all...] |
/external/mesa3d/src/compiler/nir/ |
H A D | nir_opt_global_to_local.c | 31 global_to_local(nir_register *reg) argument 35 assert(reg->is_global); 37 nir_foreach_def(def_dest, reg) { 38 nir_instr *instr = def_dest->reg.parent_instr; 49 nir_foreach_use(use_src, reg) { 61 nir_foreach_if_use(use_src, reg) { 74 nir_reg_remove(reg); 84 exec_node_remove(®->node); 85 exec_list_push_tail(&impl->registers, ®->node); 86 reg [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_swizzle.h | 48 int (*IsNative)(rc_opcode opcode, struct rc_src_register reg); 54 void (*Split)(struct rc_src_register reg, unsigned int mask, struct rc_swizzle_split * split);
|