Searched refs:right_index (Results 1 - 4 of 4) sorted by relevance
/external/eigen/unsupported/Eigen/CXX11/src/Tensor/ |
H A D | TensorConcatenation.h | 231 Index right_index; local 233 right_index = subs[0]; 235 right_index += (subs[i] % right_dims[i]) * m_rightStrides[i]; 238 right_index = subs[NumDims - 1]; 240 right_index += (subs[i] % right_dims[i]) * m_rightStrides[i]; 243 return m_rightImpl.coeff(right_index); 336 Index right_index = subs[0]; local 338 right_index += (subs[i] % right_dims[i]) * this->m_rightStrides[i]; 340 return this->m_rightImpl.coeffRef(right_index);
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/external/libvpx/libvpx/vpx_dsp/arm/ |
H A D | fdct32x32_neon.c | 523 #define ADD_S16_S32(a, left_index, right_index, b, b_index) \ 526 vaddl_s16(vget_low_s16(a[left_index]), vget_low_s16(a[right_index])); \ 528 vget_high_s16(a[right_index])); \ 531 #define SUB_S16_S32(a, left_index, right_index, b, b_index) \ 534 vsubl_s16(vget_low_s16(a[left_index]), vget_low_s16(a[right_index])); \ 536 vget_high_s16(a[right_index])); \ 553 #define ADD_S32(a, left_index, right_index, b, b_index) \ 555 b##_lo[b_index] = vaddq_s32(a##_lo[left_index], a##_lo[right_index]); \ 556 b##_hi[b_index] = vaddq_s32(a##_hi[left_index], a##_hi[right_index]); \ 559 #define SUB_S32(a, left_index, right_index, [all...] |
/external/v8/src/asmjs/ |
H A D | asm-wasm-builder.cc | 1776 TypeIndex right_index = TypeIndexOf(right, ignore_sign); local 1778 left_index = right_index; 1780 if (right_index == kFixnum) { 1781 right_index = left_index; 1783 if (left_index == kFixnum && right_index == kFixnum) { 1785 right_index = kInt32; 1787 if (left_index != right_index) { 1788 DCHECK(ignore_sign && (left_index <= 1) && (right_index <= 1));
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/external/v8/src/compiler/ |
H A D | register-allocator.cc | 150 size_t right_index = length_; local 152 size_t current_index = left_index + (right_index - left_index) / 2; 153 DCHECK(right_index > current_index); 160 right_index = current_index;
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