/external/v8/src/compiler/s390/ |
H A D | code-generator-s390.cc | 668 DoubleRegister right_reg = i.InputDoubleRegister(1); \ 671 __ cdbr(left_reg, right_reg); \ 686 __ adbr(result_reg, right_reg); \ 695 if (!right_reg.is(result_reg)) { \ 696 __ ldr(result_reg, right_reg); \ 710 DoubleRegister right_reg = i.InputDoubleRegister(1); \ 713 __ cdbr(left_reg, right_reg); \ 729 if (left_reg.is(right_reg)) { \ 730 __ adbr(result_reg, right_reg); \ 732 __ sdbr(result_reg, right_reg); \ [all...] |
/external/v8/src/crankshaft/arm/ |
H A D | lithium-codegen-arm.cc | 1032 Register right_reg = ToRegister(instr->right()); local 1039 __ cmp(right_reg, Operand::Zero()); 1049 __ cmp(right_reg, Operand(-1)); 1064 __ sdiv(result_reg, left_reg, right_reg); 1065 __ Mls(result_reg, result_reg, right_reg, left_reg); 1079 Register right_reg = ToRegister(instr->right()); local 1083 DCHECK(!scratch.is(right_reg)); 1096 __ cmp(right_reg, Operand::Zero()); 1102 // before. Be careful that 'right_reg' is only live on entry. 1106 __ vmov(double_scratch0().low(), right_reg); 1686 Register right_reg = EmitLoadRegister(right, ip); local 1707 Register right_reg = EmitLoadRegister(right, ip); local 1848 Register right_reg = EmitLoadRegister(right, ip); local 1878 DwVfpRegister right_reg = ToDoubleRegister(right); local [all...] |
/external/v8/src/crankshaft/mips/ |
H A D | lithium-codegen-mips.cc | 1014 const Register right_reg = ToRegister(instr->right()); local 1018 __ Mod(result_reg, left_reg, right_reg); 1024 DeoptimizeIf(eq, instr, DeoptimizeReason::kDivisionByZero, right_reg, 1034 DeoptimizeIf(eq, instr, DeoptimizeReason::kMinusZero, right_reg, 1037 __ Branch(&no_overflow_possible, ne, right_reg, Operand(-1)); 1582 Register right_reg = EmitLoadRegister(right, at); local 1583 __ Subu(ToRegister(result), ToRegister(left), Operand(right_reg)); 1592 Register right_reg = EmitLoadRegister(right, scratch); local 1594 Operand(right_reg), &no_overflow_label); 1722 Register right_reg local 1732 Register right_reg = EmitLoadRegister(right, scratch); local 1754 Register right_reg = EmitLoadRegister(right, scratch0()); local 1769 FPURegister right_reg = ToDoubleRegister(right); local 2118 FPURegister right_reg = ToDoubleRegister(right); local [all...] |
/external/v8/src/compiler/ppc/ |
H A D | code-generator-ppc.cc | 479 DoubleRegister right_reg = i.InputDoubleRegister(1); \ 482 __ fcmpu(left_reg, right_reg); \ 493 __ fadd(result_reg, left_reg, right_reg); \ 501 if (!right_reg.is(result_reg)) { \ 502 __ fmr(result_reg, right_reg); \ 517 DoubleRegister right_reg = i.InputDoubleRegister(1); \ 520 __ fcmpu(left_reg, right_reg); \ 534 if (left_reg.is(right_reg)) { \ 535 __ fadd(result_reg, left_reg, right_reg); \ 537 __ fsub(result_reg, left_reg, right_reg); \ [all...] |
/external/v8/src/crankshaft/ppc/ |
H A D | lithium-codegen-ppc.cc | 974 Register right_reg = ToRegister(instr->right()); local 985 __ divw(scratch, left_reg, right_reg, SetOE, SetRC); 989 __ cmpwi(right_reg, Operand::Zero()); 1012 __ mullw(scratch, right_reg, scratch); 1916 Register right_reg = EmitLoadRegister(right, ip); local 1922 __ cmp(left_reg, right_reg); 1925 __ cmpw(left_reg, right_reg); 1929 __ isel(cond, result_reg, left_reg, right_reg); 1932 __ Move(result_reg, right_reg); 1941 DoubleRegister right_reg local [all...] |
/external/v8/src/crankshaft/s390/ |
H A D | lithium-codegen-s390.cc | 952 Register right_reg = ToRegister(instr->right()); local 958 __ Cmp32(right_reg, Operand::Zero()); 968 __ Cmp32(right_reg, Operand(-1)); 982 DCHECK(!right_reg.is(r1)); 986 __ dr(r0, right_reg); // R0:R1 = R1 / divisor - R0 remainder 1924 Register right_reg = EmitLoadRegister(right, ip); local 1930 __ CmpP(left_reg, right_reg); 1933 __ Cmp32(left_reg, right_reg); 1937 __ Move(result_reg, right_reg); 1945 DoubleRegister right_reg local [all...] |
/external/v8/src/crankshaft/x64/ |
H A D | lithium-codegen-x64.cc | 960 Register right_reg = ToRegister(instr->right()); local 961 DCHECK(!right_reg.is(rax)); 962 DCHECK(!right_reg.is(rdx)); 970 __ testl(right_reg, right_reg); 980 __ cmpl(right_reg, Immediate(-1)); 1000 __ idivl(right_reg); 1006 __ idivl(right_reg); 1783 Register right_reg = ToRegister(right); local 1785 __ cmpp(left_reg, right_reg); 1807 XMMRegister right_reg = ToDoubleRegister(right); local [all...] |
/external/v8/src/crankshaft/mips64/ |
H A D | lithium-codegen-mips64.cc | 1003 const Register right_reg = ToRegister(instr->right()); local 1007 __ Dmod(result_reg, left_reg, right_reg); 1013 DeoptimizeIf(eq, instr, DeoptimizeReason::kDivisionByZero, right_reg, 1023 DeoptimizeIf(eq, instr, DeoptimizeReason::kMinusZero, right_reg, 1026 __ Branch(&no_overflow_possible, ne, right_reg, Operand(-1)); 1876 Register right_reg = EmitLoadRegister(right, scratch0()); local 1879 __ Slt(scratch, left_reg, Operand(right_reg)); 1882 __ Movn(result_reg, right_reg, scratch); 1886 __ Movz(result_reg, right_reg, scratch); 1891 FPURegister right_reg local 2239 FPURegister right_reg = ToDoubleRegister(right); local [all...] |
/external/v8/src/crankshaft/ia32/ |
H A D | lithium-codegen-ia32.cc | 931 Register right_reg = ToRegister(instr->right()); local 932 DCHECK(!right_reg.is(eax)); 933 DCHECK(!right_reg.is(edx)); 941 __ test(right_reg, Operand(right_reg)); 951 __ cmp(right_reg, -1); 970 __ idiv(right_reg); 976 __ idiv(right_reg); 1668 XMMRegister right_reg = ToDoubleRegister(right); local 1669 __ ucomisd(left_reg, right_reg); [all...] |
/external/v8/src/crankshaft/x87/ |
H A D | lithium-codegen-x87.cc | 1232 Register right_reg = ToRegister(instr->right()); local 1233 DCHECK(!right_reg.is(eax)); 1234 DCHECK(!right_reg.is(edx)); 1242 __ test(right_reg, Operand(right_reg)); 1252 __ cmp(right_reg, -1); 1271 __ idiv(right_reg); 1277 __ idiv(right_reg); 1945 X87Register right_reg = ToX87Register(right); local 1947 X87PrepareBinaryOp(left_reg, right_reg, ToX87Registe [all...] |
/external/v8/src/mips/ |
H A D | macro-assembler-mips.cc | 4843 Register right_reg = t9; local 4844 DCHECK(!left.is(right_reg)); 4845 li(right_reg, Operand(right)); 4846 AddBranchOvf(dst, left, right_reg, overflow_label, no_overflow_label); 4883 Register right_reg = right.is(dst) ? t9 : right; local 4885 DCHECK(!dst.is(right_reg)); 4887 Move(right_reg, right); 4889 Bnvc(left_reg, right_reg, no_overflow_label);
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/external/v8/src/mips64/ |
H A D | macro-assembler-mips64.cc | 5033 Register right_reg = t9; 5034 DCHECK(!left.is(right_reg)); 5035 li(right_reg, Operand(right)); 5036 AddBranchOvf(dst, left, right_reg, overflow_label, no_overflow_label); 5073 Register right_reg = right.is(dst) ? t9 : right; 5075 DCHECK(!dst.is(right_reg)); 5077 Move(right_reg, right); 5079 Bnvc(left_reg, right_reg, no_overflow_label);
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/external/vixl/test/aarch64/ |
H A D | test-assembler-aarch64.cc | 8286 Register right_reg(1, reg_size); 8293 __ Mov(right_reg, right); 8297 (masm.*op)(result_reg, left_reg, right_reg); 8303 ASSERT_EQUAL_64(right, right_reg.X());
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