Searched refs:sllv (Results 1 - 25 of 41) sorted by relevance

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/external/capstone/suite/MC/Mips/
H A Dmicromips-shift-instructions-EB.s.cs3 0x00,0x65,0x10,0x10 = sllv $2, $3, $5
H A Dmicromips-shift-instructions.s.cs3 0x65,0x00,0x10,0x10 = sllv $2, $3, $5
H A Dmips-alu-instructions.s.cs17 0x04,0x10,0xa3,0x00 = sllv $2, $3, $5
H A Dmips64-alu-instructions.s.cs15 0x04,0x10,0xa3,0x00 = sllv $2, $3, $5
/external/llvm/test/MC/Mips/
H A Dmicromips-shift-instructions.s11 # CHECK-EL: sllv $2, $3, $5 # encoding: [0x65,0x00,0x10,0x10]
18 # CHECK-EL: sllv $2, $3, $5 # encoding: [0x65,0x00,0x10,0x10]
21 # CHECK-EL: sllv $2, $2, $3 # encoding: [0x43,0x00,0x10,0x10]
31 # CHECK-EB: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
38 # CHECK-EB: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
41 # CHECK-EB: sllv $2, $2, $3 # encoding: [0x00,0x43,0x10,0x10]
48 sllv $2, $3, $5
H A Drotations32.s12 # CHECK-32: sllv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x04]
19 # CHECK-32: sllv $4, $5, $6 # encoding: [0x00,0xc5,0x20,0x04]
52 # CHECK-32: sllv $1, $4, $1 # encoding: [0x00,0x24,0x08,0x04]
58 # CHECK-32: sllv $1, $5, $1 # encoding: [0x00,0x25,0x08,0x04]
H A Dmips-alu-instructions.s22 # CHECK: sllv $2, $3, $5 # encoding: [0x04,0x10,0xa3,0x00]
53 sllv $2, $3, $5
H A Dmips64-alu-instructions.s20 # CHECK: sllv $2, $3, $5 # encoding: [0x04,0x10,0xa3,0x00]
48 sllv $2, $3, $5
H A Drotations64.s12 # CHECK-64: sllv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x04]
19 # CHECK-64: sllv $4, $5, $6 # encoding: [0x00,0xc5,0x20,0x04]
52 # CHECK-64: sllv $1, $4, $1 # encoding: [0x00,0x24,0x08,0x04]
58 # CHECK-64: sllv $1, $5, $1 # encoding: [0x00,0x25,0x08,0x04]
/external/llvm/test/MC/Mips/mips1/
H A Dvalid.s92 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
93 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips2/
H A Dvalid.s118 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
119 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips3/
H A Dvalid.s183 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
184 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips32/
H A Dvalid.s148 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
149 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips32r2/
H A Dvalid.s183 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
184 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips32r3/
H A Dvalid.s183 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
184 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips32r5/
H A Dvalid.s184 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
185 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips4/
H A Dvalid.s211 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
212 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips5/
H A Dvalid.s212 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
213 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips64/
H A Dvalid.s230 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
231 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips64r2/
H A Dvalid.s256 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
257 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips64r3/
H A Dvalid.s256 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
257 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/mips64r5/
H A Dvalid.s257 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
258 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
/external/llvm/test/MC/Mips/micromips64r6/
H A Dvalid.s242 sllv $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
247 sll $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
250 sll $2, $3 # CHECK: sllv $2, $2, $3 # encoding: [0x00,0x43,0x10,0x10]
/external/llvm/test/MC/Mips/micromips32r6/
H A Dvalid.s322 sllv $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
327 sll $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
330 sll $2, $3 # CHECK: sllv $2, $2, $3 # encoding: [0x00,0x43,0x10,0x10]
/external/swiftshader/third_party/subzero/src/
H A DIceAssemblerMIPS32.h261 void sllv(const Operand *OpRd, const Operand *OpRt, const Operand *OpRs);

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