| /external/llvm/test/MC/Mips/ |
| H A D | macro-div.s | 61 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
66 # CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4]
70 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
75 # CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4]
79 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
88 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
93 # CHECK-TRAP: teq $5, $1, 6 # encoding: [0x00,0xa1,0x01,0xb4]
97 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
100 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
|
| H A D | macro-ddivu.s | 58 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
63 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
68 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
73 # CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4]
78 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
83 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
88 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
93 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
|
| H A D | macro-ddiv.s | 74 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
80 # CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4]
84 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
90 # CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4]
94 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
97 # CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4]
103 # CHECK-TRAP: teq $zero, $1, 6 # encoding: [0x00,0x01,0x01,0xb4]
107 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
110 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
116 # CHECK-TRAP: teq
[all...] |
| H A D | micromips-trap-instructions.s | 12 # CHECK-EL: teq $8, $9 # encoding: [0x28,0x01,0x3c,0x00]
27 # CHECK-EB: teq $8, $9 # encoding: [0x01,0x28,0x00,0x3c]
39 teq $8, $9, 0
|
| H A D | macro-divu.s | 52 # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
57 # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
62 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
73 # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
78 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
83 # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
|
| H A D | mips-control-instructions.s | 18 # CHECK32: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
19 # CHECK32: teq $zero, $3, 1 # encoding: [0x00,0x03,0x00,0x74]
49 # CHECK64: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
50 # CHECK64: teq $zero, $3, 1 # encoding: [0x00,0x03,0x00,0x74]
83 teq $0,$3
84 teq $0,$3,1
|
| /external/capstone/suite/MC/Mips/ |
| H A D | micromips-trap-instructions-EB.s.cs | 2 0x01,0x28,0x00,0x3c = teq $8, $9
|
| H A D | micromips-trap-instructions.s.cs | 2 0x28,0x01,0x3c,0x00 = teq $8, $9
|
| H A D | mips-control-instructions-64.s.cs | 16 0x00,0x03,0x00,0x34 = teq $zero, $3
17 0x00,0x03,0x00,0x74 = teq $zero, $3, 1
|
| H A D | mips-control-instructions.s.cs | 16 0x00,0x03,0x00,0x34 = teq $zero, $3
17 0x00,0x03,0x00,0x74 = teq $zero, $3, 1
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| H A D | invalid-wrong-error.s | 10 teq $8, $9, $2 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
11 teq $8, $9, -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
12 teq $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/micromips64r6/ |
| H A D | invalid-wrong-error.s | 18 teq $8, $9, $2 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
19 teq $8, $9, -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
20 teq $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
|
| /external/boringssl/src/crypto/fipsmodule/sha/asm/ |
| H A D | sha1-armv4-large.pl | 234 teq $Xi,$t3
236 teq $Xi,sp
258 teq $Xi,$t3
260 teq $Xi,sp @ preserve carry
275 teq $Xi,$t3
277 teq $Xi,sp
294 teq $inp,$len
487 &teq ($inp,$len);
|
| /external/llvm/test/MC/Mips/mips1/ |
| H A D | invalid-mips2.s | 28 teq $0,$3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
29 teq $5,$7,620 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips2/ |
| H A D | valid.s | 151 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
152 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
|
| /external/llvm/test/MC/Mips/mips3/ |
| H A D | valid.s | 215 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
216 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
|
| /external/llvm/test/MC/Mips/mips32/ |
| H A D | valid.s | 181 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
182 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| H A D | valid.s | 218 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
219 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| H A D | valid.s | 218 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
219 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| H A D | valid.s | 219 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
220 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
|
| /external/llvm/test/MC/Mips/mips4/ |
| H A D | valid.s | 244 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
245 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
|
| /external/llvm/test/MC/Mips/mips5/ |
| H A D | valid.s | 246 teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
247 teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
|
| /external/llvm/test/MC/ARM/ |
| H A D | basic-arm-instructions.s | 3123 teq r5, #0xf000
3124 teq r5, $0xf000
3125 teq r5, 0xf000
3126 teq r7, #(0xff << 16)
3127 teq r7, #-2147483638
3128 teq r7, #42, #2
3129 teq r7, #40, #2
3130 teq r7, $40, $2
3131 teq r7, 40, 2
3132 teq r
[all...] |
| /external/boringssl/ios-arm/crypto/fipsmodule/ |
| H A D | aes-armv4.S | 436 teq r0,#0
442 teq r2,#0
449 teq r1,#128
451 teq r1,#192
453 teq r1,#256
521 teq lr,#128
584 teq lr,#192
741 teq r0,#0
784 teq r7,r8
|
| /external/boringssl/linux-arm/crypto/fipsmodule/ |
| H A D | aes-armv4.S | 431 teq r0,#0
437 teq r2,#0
444 teq r1,#128
446 teq r1,#192
448 teq r1,#256
516 teq lr,#128
579 teq lr,#192
734 teq r0,#0
775 teq r7,r8
|