Searched refs:tge (Results 1 - 25 of 33) sorted by relevance

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/external/capstone/suite/MC/Mips/
H A Dmicromips-trap-instructions-EB.s.cs3 0x01,0x28,0x02,0x3c = tge $8, $9
H A Dmicromips-trap-instructions.s.cs3 0x28,0x01,0x3c,0x02 = tge $8, $9
H A Dmips-control-instructions-64.s.cs19 0x00,0x03,0x00,0x30 = tge $zero, $3
20 0x00,0x03,0x00,0xf0 = tge $zero, $3, 3
H A Dmips-control-instructions.s.cs19 0x00,0x03,0x00,0x30 = tge $zero, $3
20 0x00,0x03,0x00,0xf0 = tge $zero, $3, 3
/external/llvm/test/MC/Mips/
H A Dmicromips-trap-instructions.s13 # CHECK-EL: tge $8, $9 # encoding: [0x28,0x01,0x3c,0x02]
28 # CHECK-EB: tge $8, $9 # encoding: [0x01,0x28,0x02,0x3c]
40 tge $8, $9, 0
H A Dmips-control-instructions.s21 # CHECK32: tge $zero, $3 # encoding: [0x00,0x03,0x00,0x30]
22 # CHECK32: tge $zero, $3, 3 # encoding: [0x00,0x03,0x00,0xf0]
52 # CHECK64: tge $zero, $3 # encoding: [0x00,0x03,0x00,0x30]
53 # CHECK64: tge $zero, $3, 3 # encoding: [0x00,0x03,0x00,0xf0]
86 tge $0,$3
87 tge $0,$3,3
/external/llvm/test/MC/Sparc/
H A Dsparc-v9-traps.s63 ! CHECK: tge %icc, %i5 ! encoding: [0x97,0xd0,0x00,0x1d]
64 ! CHECK: tge %icc, 82 ! encoding: [0x97,0xd0,0x20,0x52]
65 ! CHECK: tge %icc, %g1 + %i2 ! encoding: [0x97,0xd0,0x40,0x1a]
66 ! CHECK: tge %icc, %i5 + 41 ! encoding: [0x97,0xd7,0x60,0x29]
67 tge %icc, %i5
68 tge %icc, 82
69 tge %icc, %g1 + %i2
70 tge %icc, %i5 + 41
214 ! CHECK: tge %xcc, %i5 ! encoding: [0x97,0xd0,0x10,0x1d]
215 ! CHECK: tge
[all...]
H A Dsparc-traps.s63 ! CHECK: tge %i5 ! encoding: [0x97,0xd0,0x00,0x1d]
64 ! CHECK: tge 82 ! encoding: [0x97,0xd0,0x20,0x52]
65 ! CHECK: tge %g1 + %i2 ! encoding: [0x97,0xd0,0x40,0x1a]
66 ! CHECK: tge %i5 + 41 ! encoding: [0x97,0xd7,0x60,0x29]
67 tge %i5
68 tge 82
69 tge %g1 + %i2
70 tge %i5 + 41
/external/llvm/test/MC/Mips/micromips32r6/
H A Dinvalid-wrong-error.s13 tge $8, $9, $2 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
14 tge $8, $9, -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
15 tge $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
H A Dvalid.s257 tge $7, $10 # CHECK: tge $7, $10 # encoding: [0x01,0x47,0x02,0x3c]
258 tge $7, $19, 15 # CHECK: tge $7, $19, 15 # encoding: [0x02,0x67,0xf2,0x3c]
/external/llvm/test/MC/Mips/micromips64r6/
H A Dinvalid-wrong-error.s21 tge $8, $9, $2 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
22 tge $8, $9, -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
23 tge $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
H A Dvalid.s129 tge $7, $10 # CHECK: tge $7, $10 # encoding: [0x01,0x47,0x02,0x3c]
130 tge $7, $19, 15 # CHECK: tge $7, $19, 15 # encoding: [0x02,0x67,0xf2,0x3c]
/external/llvm/test/MC/Mips/mips1/
H A Dinvalid-mips2.s31 tge $7,$10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
32 tge $5,$19,340 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/mips2/
H A Dvalid.s154 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
155 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips3/
H A Dvalid.s218 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
219 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips32/
H A Dvalid.s184 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
185 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips32r2/
H A Dvalid.s221 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
222 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips32r3/
H A Dvalid.s221 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
222 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips32r5/
H A Dvalid.s222 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
223 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips4/
H A Dvalid.s247 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
248 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips5/
H A Dvalid.s249 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
250 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips64/
H A Dvalid.s268 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
269 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips64r2/
H A Dvalid.s294 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
295 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips64r3/
H A Dvalid.s294 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
295 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
/external/llvm/test/MC/Mips/mips64r5/
H A Dvalid.s295 tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
296 tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]

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