/external/capstone/suite/MC/Mips/ |
H A D | micromips-trap-instructions-EB.s.cs | 4 0x01,0x28,0x04,0x3c = tgeu $8, $9
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H A D | micromips-trap-instructions.s.cs | 4 0x28,0x01,0x3c,0x04 = tgeu $8, $9
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H A D | mips-control-instructions-64.s.cs | 22 0x00,0x03,0x00,0x31 = tgeu $zero, $3 23 0x00,0x03,0x01,0xf1 = tgeu $zero, $3, 7
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H A D | mips-control-instructions.s.cs | 22 0x00,0x03,0x00,0x31 = tgeu $zero, $3 23 0x00,0x03,0x01,0xf1 = tgeu $zero, $3, 7
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/external/llvm/test/MC/Mips/ |
H A D | micromips-trap-instructions.s | 14 # CHECK-EL: tgeu $8, $9 # encoding: [0x28,0x01,0x3c,0x04] 29 # CHECK-EB: tgeu $8, $9 # encoding: [0x01,0x28,0x04,0x3c] 41 tgeu $8, $9, 0
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H A D | mips-control-instructions.s | 24 # CHECK32: tgeu $zero, $3 # encoding: [0x00,0x03,0x00,0x31] 25 # CHECK32: tgeu $zero, $3, 7 # encoding: [0x00,0x03,0x01,0xf1] 55 # CHECK64: tgeu $zero, $3 # encoding: [0x00,0x03,0x00,0x31] 56 # CHECK64: tgeu $zero, $3, 7 # encoding: [0x00,0x03,0x01,0xf1] 89 tgeu $0,$3 90 tgeu $0,$3,7
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/external/llvm/test/MC/Mips/micromips32r6/ |
H A D | invalid-wrong-error.s | 16 tgeu $8, $9, $2 # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate 17 tgeu $8, $9, -1 # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate 18 tgeu $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
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H A D | valid.s | 259 tgeu $22, $gp # CHECK: tgeu $22, $gp # encoding: [0x03,0x96,0x04,0x3c] 260 tgeu $20, $14, 15 # CHECK: tgeu $20, $14, 15 # encoding: [0x01,0xd4,0xf4,0x3c]
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H A D | invalid.s | 63 tgeu $34, $9, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 64 tgeu $8, $35, 6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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/external/llvm/test/MC/Mips/micromips64r6/ |
H A D | invalid-wrong-error.s | 24 tgeu $8, $9, $2 # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate 25 tgeu $8, $9, -1 # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate 26 tgeu $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
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H A D | valid.s | 131 tgeu $22, $gp # CHECK: tgeu $22, $gp # encoding: [0x03,0x96,0x04,0x3c] 132 tgeu $20, $14, 15 # CHECK: tgeu $20, $14, 15 # encoding: [0x01,0xd4,0xf4,0x3c]
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H A D | invalid.s | 91 tgeu $34, $9, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 92 tgeu $8, $35, 6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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/external/llvm/test/MC/Mips/mips1/ |
H A D | invalid-mips2.s | 35 tgeu $22,$28 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 36 tgeu $20,$14,379 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips2/ |
H A D | valid.s | 158 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 159 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips3/ |
H A D | valid.s | 222 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 223 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips32/ |
H A D | valid.s | 188 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 189 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips32r2/ |
H A D | valid.s | 225 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 226 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips32r3/ |
H A D | valid.s | 225 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 226 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips32r5/ |
H A D | valid.s | 226 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 227 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips4/ |
H A D | valid.s | 251 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 252 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips5/ |
H A D | valid.s | 253 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 254 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips64/ |
H A D | valid.s | 272 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 273 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips64r2/ |
H A D | valid.s | 298 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 299 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips64r3/ |
H A D | valid.s | 298 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 299 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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/external/llvm/test/MC/Mips/mips64r5/ |
H A D | valid.s | 299 tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] 300 tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
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