| /external/clang/test/CodeGen/ |
| H A D | systemz-abi-vector.c | 12 typedef __attribute__((vector_size(2))) char v2i8; typedef
46 v2i8 pass_v2i8(v2i8 arg) { return arg; }
138 struct agg_v2i8 { v2i8 a; };
221 v2i8 va_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, v2i8); }
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| H A D | ValueTypes.h | 54 v2i8 = 12, // 2 x i8 enumerator in enum:llvm::MVT::SimpleValueType
77 FIRST_VECTOR_VALUETYPE = v2i8,
154 (SimpleTy >= MVT::v2i8 && SimpleTy <= MVT::v8i64));
190 case v2i8 :
232 case v2i8:
255 case v2i8: return 16;
339 if (NumElements == 2) return MVT::v2i8;
|
| /external/llvm/include/llvm/CodeGen/ |
| H A D | MachineValueType.h | 69 v2i8 = 22, // 2 x i8
228 return (SimpleTy == MVT::v2i8 || SimpleTy == MVT::v1i16 ||
326 case v2i8:
412 case v2i8:
457 case v2i8:
604 if (NumElements == 2) return MVT::v2i8;
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 223 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 },
226 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 },
247 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 },
250 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 },
266 { ISD::FP_TO_SINT, MVT::v2i8, MVT::v2f32, 1 },
269 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1 },
280 { ISD::FP_TO_SINT, MVT::v2i8, MVT::v2f64, 2 },
283 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f64, 2 },
|
| H A D | AArch64ISelLowering.cpp | 582 setOperationAction(ISD::CTTZ, MVT::v2i8, Expand);
2098 case MVT::v2i8:
|
| /external/swiftshader/third_party/LLVM/lib/VMCore/ |
| H A D | ValueTypes.cpp | 120 case MVT::v2i8: return "v2i8";
167 case MVT::v2i8: return VectorType::get(Type::getInt8Ty(Context), 2);
|
| /external/llvm/lib/IR/ |
| H A D | ValueTypes.cpp | 154 case MVT::v2i8: return "v2i8";
232 case MVT::v2i8: return VectorType::get(Type::getInt8Ty(Context), 2);
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 132 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 },
133 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 },
164 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 },
165 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 },
|
| H A D | ARMISelLowering.cpp | 634 for (MVT Ty : {MVT::v8i8, MVT::v4i8, MVT::v2i8, MVT::v4i16, MVT::v2i16,
6516 case MVT::v2i8:
|
| /external/llvm/utils/TableGen/ |
| H A D | CodeGenTarget.cpp | 82 case MVT::v2i8: return "MVT::v2i8";
|
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| H A D | CodeGenTarget.cpp | 69 case MVT::v2i8: return "MVT::v2i8";
|
| /external/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 127 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand);
128 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand);
129 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i8, Expand);
183 setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom);
199 setTruncStoreAction(MVT::v2i64, MVT::v2i8, Expand);
|
| H A D | R600ISelLowering.cpp | 150 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i8, Expand);
|
| H A D | SIISelLowering.cpp | 120 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i8, Custom);
|
| /external/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 63 case MVT::v2i8:
1927 case MVT::v2i8:
4011 if (MemVT != MVT::v2i8 && MemVT != MVT::v4i8) {
4301 case MVT::v2i8:
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 588 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 2 },
|
| H A D | X86ISelLowering.cpp | 797 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Custom);
907 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Custom);
915 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i64, MVT::v2i8, Legal);
922 setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i64, MVT::v2i8, Legal);
1205 setTruncStoreAction(MVT::v2i64, MVT::v2i8, Legal);
1259 setLoadExtAction(ISD::EXTLOAD, MVT::v2i64, MVT::v2i8, Legal);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 654 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i8, Custom);
|