| /external/capstone/suite/MC/Mips/ |
| H A D | mips-alu-instructions.s.cs | 31 0xa0,0x30,0x07,0x7c = wsbh $6, $7
|
| H A D | mips64-alu-instructions.s.cs | 28 0xa0,0x30,0x07,0x7c = wsbh $6, $7
|
| /external/llvm/test/MC/Mips/ |
| H A D | mips-alu-instructions.s | 36 # CHECK: wsbh $6, $7 # encoding: [0xa0,0x30,0x07,0x7c]
67 wsbh $6, $7
|
| H A D | mips64-alu-instructions.s | 33 # CHECK: wsbh $6, $7 # encoding: [0xa0,0x30,0x07,0x7c]
61 wsbh $6, $7
|
| /external/llvm/test/MC/Mips/mips32/ |
| H A D | invalid-mips32r2.s | 36 wsbh $k1,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips4/ |
| H A D | invalid-mips64r2.s | 33 wsbh $k1,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips5/ |
| H A D | invalid-mips64r2.s | 39 wsbh $k1,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64/ |
| H A D | invalid-mips64r2.s | 31 wsbh $k1,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips2/ |
| H A D | invalid-mips32r2.s | 68 wsbh $k1,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| H A D | invalid.s | 75 wsbh $34, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
76 wsbh $3, $33 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| H A D | valid.s | 123 wsbh $3, $4 # CHECK: wsbh $3, $4 # encoding: [0x00,0x64,0x7b,0x3c]
|
| /external/llvm/test/MC/Mips/micromips64r6/ |
| H A D | invalid.s | 101 wsbh $34, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
102 wsbh $3, $33 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| H A D | valid.s | 141 wsbh $3, $4 # CHECK: wsbh $3, $4 # encoding: [0x00,0x64,0x7b,0x3c]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| H A D | valid.s | 244 wsbh $k1,$9
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| H A D | valid.s | 244 wsbh $k1,$9
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| H A D | valid.s | 245 wsbh $k1,$9
|
| /external/v8/src/mips/ |
| H A D | disasm-mips.cc | 1301 Format(instr, "wsbh 'rd, 'rt");
|
| H A D | assembler-mips.h | 856 void wsbh(Register rd, Register rt);
|
| H A D | macro-assembler-mips.cc | 1069 wsbh(dest, src);
1107 wsbh(dest, src);
|
| H A D | assembler-mips.cc | 2202 void Assembler::wsbh(Register rd, Register rt) { function in class:v8::Assembler
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| H A D | valid.s | 321 wsbh $k1,$9
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| H A D | valid.s | 321 wsbh $k1,$9
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| H A D | valid.s | 322 wsbh $k1,$9
|
| /external/v8/src/mips64/ |
| H A D | assembler-mips64.h | 910 void wsbh(Register rd, Register rt);
|
| H A D | assembler-mips64.cc | 2572 void Assembler::wsbh(Register rd, Register rt) { function in class:v8::internal::Assembler
|