Searched refs:index2 (Results 1 - 8 of 8) sorted by relevance

/art/test/573-checker-checkcast-regression/src/
H A DMain.java25 // This test method uses two integers (`index1` and `index2`) to
42 static public int test(Object new_array, int index1, int index2) { argument
45 Integer integer2 = (Integer) objectArray[index2];
/art/libdexfile/dex/
H A Dstring_reference_test.cc101 for (size_t index2 = 0; index2 != arraysize(kDexFile2Strings); ++index2) {
103 StringReference sr2(dex_file2.get(), dex::StringIndex(index2));
104 EXPECT_EQ(expectedCmp12[index1][index2], cmp(sr1, sr2)) << index1 << " " << index2; local
105 EXPECT_EQ(expectedCmp21[index2][index1], cmp(sr2, sr1)) << index1 << " " << index2; local
/art/compiler/optimizing/
H A Dload_store_analysis.h299 // Returns true if heap_locations_[index1] and heap_locations_[index2] may alias.
300 bool MayAlias(size_t index1, size_t index2) const {
301 if (index1 < index2) {
302 return aliasing_matrix_.IsBitSet(AliasingMatrixPosition(index1, index2));
303 } else if (index1 > index2) {
304 return aliasing_matrix_.IsBitSet(AliasingMatrixPosition(index2, index1));
306 DCHECK(false) << "index1 and index2 are expected to be different";
361 // `index1` and `index2` are indices in the array of collected heap locations.
364 size_t AliasingMatrixPosition(size_t index1, size_t index2) const {
365 DCHECK(index2 > index
372 CheckedAliasingMatrixPosition(size_t index1, size_t index2, size_t position) argument
[all...]
H A Dselect_generator.cc68 // with different inputs at `index1` and `index2`. Otherwise returns that phi.
69 static HPhi* GetSingleChangedPhi(HBasicBlock* block, size_t index1, size_t index2) { argument
70 DCHECK_NE(index1, index2);
75 if (phi->InputAt(index1) != phi->InputAt(index2)) {
H A Dcode_generator_mips.h147 void Exchange(int index1, int index2, bool double_slot);
148 void ExchangeQuadSlots(int index1, int index2);
H A Dcode_generator_mips64.h144 void Exchange(int index1, int index2, bool double_slot);
145 void ExchangeQuadSlots(int index1, int index2);
H A Dcode_generator_mips64.cc1042 void ParallelMoveResolverMIPS64::Exchange(int index1, int index2, bool double_slot) { argument
1058 index2 + stack_offset);
1062 index2 + stack_offset);
1066 void ParallelMoveResolverMIPS64::ExchangeQuadSlots(int index1, int index2) { argument
1068 __ LoadFpuFromOffset(kLoadQuadword, FTMP2, SP, index2);
1069 __ StoreFpuToOffset(kStoreQuadword, FTMP, SP, index2);
H A Dcode_generator_mips.cc1223 void ParallelMoveResolverMIPS::Exchange(int index1, int index2, bool double_slot) { argument
1238 index2 + stack_offset);
1242 index2 + stack_offset);
1247 void ParallelMoveResolverMIPS::ExchangeQuadSlots(int index1, int index2) { argument
1249 __ LoadQFromOffset(FTMP2, SP, index2);
1250 __ StoreQToOffset(FTMP, SP, index2);

Completed in 190 milliseconds