/external/mesa3d/prebuilt-intermediates/nir/ |
H A D | nir_builder_opcodes.h | 39 nir_ball_fequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 41 return nir_build_alu(build, nir_op_ball_fequal2, src0, src1, NULL, NULL); 44 nir_ball_fequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 46 return nir_build_alu(build, nir_op_ball_fequal3, src0, src1, NULL, NULL); 49 nir_ball_fequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 51 return nir_build_alu(build, nir_op_ball_fequal4, src0, src1, NULL, NULL); 54 nir_ball_iequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 56 return nir_build_alu(build, nir_op_ball_iequal2, src0, src1, NULL, NULL); 59 nir_ball_iequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 61 return nir_build_alu(build, nir_op_ball_iequal3, src0, src1, NUL 64 nir_ball_iequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 69 nir_bany_fnequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 74 nir_bany_fnequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 79 nir_bany_fnequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 84 nir_bany_inequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 89 nir_bany_inequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 94 nir_bany_inequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 99 nir_bcsel(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 104 nir_bfi(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 109 nir_bfm(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 119 nir_bitfield_insert(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3) argument 149 nir_extract_i16(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 154 nir_extract_i8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 159 nir_extract_u16(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 164 nir_extract_u8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 194 nir_fadd(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 199 nir_fall_equal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 204 nir_fall_equal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 209 nir_fall_equal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 214 nir_fand(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 219 nir_fany_nequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 224 nir_fany_nequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 229 nir_fany_nequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 244 nir_fcsel(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 279 nir_fdiv(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 284 nir_fdot2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 289 nir_fdot3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 294 nir_fdot4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 299 nir_fdot_replicated2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 304 nir_fdot_replicated3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 309 nir_fdot_replicated4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 314 nir_fdph(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 319 nir_fdph_replicated(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 324 nir_feq(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 339 nir_ffma(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 349 nir_fge(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 364 nir_flrp(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 369 nir_flt(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 374 nir_fmax(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 379 nir_fmin(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 384 nir_fmod(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 394 nir_fmul(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 399 nir_fne(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 494 nir_for(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 499 nir_fpow(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 514 nir_frem(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 549 nir_fsub(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 559 nir_fxor(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 584 nir_iadd(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 589 nir_iand(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 594 nir_ibfe(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 599 nir_ibitfield_extract(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 604 nir_idiv(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 609 nir_ieq(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 619 nir_ige(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 624 nir_ilt(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 629 nir_imax(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 634 nir_imin(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 639 nir_imod(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 649 nir_imul(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 654 nir_imul_high(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 659 nir_ine(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 674 nir_ior(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 679 nir_irem(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 684 nir_ishl(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 689 nir_ishr(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 699 nir_isub(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 704 nir_ixor(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 709 nir_ldexp(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 719 nir_pack_double_2x32_split(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 729 nir_pack_half_2x16_split(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 764 nir_seq(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 769 nir_sge(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 774 nir_slt(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 779 nir_sne(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 794 nir_uadd_carry(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 799 nir_ubfe(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 804 nir_ubitfield_extract(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 809 nir_udiv(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 819 nir_uge(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 824 nir_ult(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 829 nir_umax(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 834 nir_umax_4x8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 839 nir_umin(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 844 nir_umin_4x8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 849 nir_umod(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 854 nir_umul_high(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 859 nir_umul_unorm_4x8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 914 nir_usadd_4x8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 919 nir_ushr(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 924 nir_ussub_4x8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 929 nir_usub_borrow(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 934 nir_vec2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1) argument 939 nir_vec3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2) argument 944 nir_vec4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3) argument [all...] |
H A D | nir_constant_expressions.c | 355 const struct float32_vec src1 = { local 364 dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y)); 381 const struct float64_vec src1 = { local 390 dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y)); 421 const struct float32_vec src1 = { local 430 dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1 447 const struct float64_vec src1 = { local 487 const struct float32_vec src1 = { local 513 const struct float64_vec src1 = { local 553 const struct int32_vec src1 = { local 579 const struct int64_vec src1 = { local 619 const struct int32_vec src1 = { local 645 const struct int64_vec src1 = { local 685 const struct int32_vec src1 = { local 711 const struct int64_vec src1 = { local 751 const struct float32_vec src1 = { local 777 const struct float64_vec src1 = { local 817 const struct float32_vec src1 = { local 843 const struct float64_vec src1 = { local 883 const struct float32_vec src1 = { local 909 const struct float64_vec src1 = { local 949 const struct int32_vec src1 = { local 975 const struct int64_vec src1 = { local 1015 const struct int32_vec src1 = { local 1041 const struct int64_vec src1 = { local 1081 const struct int32_vec src1 = { local 1107 const struct int64_vec src1 = { local 1142 const uint32_t src1 = local 1160 const uint64_t src1 = local 1193 const uint32_t src1 = local 1226 const uint32_t src1 = local 1273 const int32_t src1 = local 1298 const int32_t src1 = local 1397 const uint32_t src1 = local 1431 const uint32_t src1 = local 1713 const int32_t src1 = local 1730 const int64_t src1 = local 1761 const int32_t src1 = local 1778 const int64_t src1 = local 1809 const uint32_t src1 = local 1826 const uint64_t src1 = local 1857 const uint32_t src1 = local 1874 const uint64_t src1 = local 2125 const float32_t src1 = local 2142 const float64_t src1 = local 2177 const struct float32_vec src1 = { local 2203 const struct float32_vec src1 = { local 2243 const struct float32_vec src1 = { local 2269 const struct float32_vec src1 = { local 2309 const struct float32_vec src1 = { local 2335 const struct float32_vec src1 = { local 2371 const float32_t src1 = local 2388 const float32_t src1 = local 2423 const struct float32_vec src1 = { local 2449 const struct float32_vec src1 = { local 2489 const struct float32_vec src1 = { local 2515 const struct float32_vec src1 = { local 2555 const struct float32_vec src1 = { local 2581 const struct float32_vec src1 = { local 2705 const float32_t src1 = local 2724 const float32_t src1 = local 2997 const float32_t src1 = local 3014 const float64_t src1 = local 3049 const struct float32_vec src1 = { local 3075 const struct float64_vec src1 = { local 3115 const struct float32_vec src1 = { local 3141 const struct float64_vec src1 = { local 3181 const struct float32_vec src1 = { local 3207 const struct float64_vec src1 = { local 3247 const struct float32_vec src1 = { local 3276 const struct float64_vec src1 = { local 3319 const struct float32_vec src1 = { local 3348 const struct float64_vec src1 = { local 3391 const struct float32_vec src1 = { local 3420 const struct float64_vec src1 = { local 3463 const struct float32_vec src1 = { local 3489 const struct float64_vec src1 = { local 3529 const struct float32_vec src1 = { local 3558 const struct float64_vec src1 = { local 3597 const float32_t src1 = local 3614 const float64_t src1 = local 3733 const float32_t src1 = local 3752 const float64_t src1 = local 3829 const float32_t src1 = local 3846 const float64_t src1 = local 3985 const float32_t src1 = local 4004 const float64_t src1 = local 4037 const float32_t src1 = local 4054 const float64_t src1 = local 4085 const float32_t src1 = local 4102 const float64_t src1 = local 4133 const float32_t src1 = local 4150 const float64_t src1 = local 4181 const float32_t src1 = local 4198 const float64_t src1 = local 4273 const float32_t src1 = local 4290 const float64_t src1 = local 4321 const float32_t src1 = local 4338 const float64_t src1 = local 5113 const float32_t src1 = local 5130 const float32_t src1 = local 5161 const float32_t src1 = local 5178 const float64_t src1 = local 5297 const float32_t src1 = local 5314 const float64_t src1 = local 5609 const float32_t src1 = local 5626 const float64_t src1 = local 5701 const float32_t src1 = local 5718 const float32_t src1 = local 5925 const int32_t src1 = local 5942 const int64_t src1 = local 5973 const uint32_t src1 = local 5990 const uint64_t src1 = local 6021 const int32_t src1 = local 6054 const int32_t src1 = local 6101 const int32_t src1 = local 6132 const int32_t src1 = local 6177 const int32_t src1 = local 6194 const int64_t src1 = local 6225 const int32_t src1 = local 6242 const int64_t src1 = local 6345 const int32_t src1 = local 6362 const int64_t src1 = local 6393 const int32_t src1 = local 6410 const int64_t src1 = local 6441 const int32_t src1 = local 6458 const int64_t src1 = local 6489 const int32_t src1 = local 6506 const int64_t src1 = local 6537 const int32_t src1 = local 6554 const int64_t src1 = local 6629 const int32_t src1 = local 6646 const int64_t src1 = local 6677 const int32_t src1 = local 6694 const int32_t src1 = local 6725 const int32_t src1 = local 6742 const int64_t src1 = local 6861 const uint32_t src1 = local 6878 const uint64_t src1 = local 6909 const int32_t src1 = local 6926 const int64_t src1 = local 6957 const int32_t src1 = local 6974 const int64_t src1 = local 7005 const int32_t src1 = local 7022 const int64_t src1 = local 7097 const int32_t src1 = local 7114 const int64_t src1 = local 7145 const uint32_t src1 = local 7162 const uint64_t src1 = local 7193 const int32_t src1 = local 7217 const int32_t src1 = local 7307 const uint32_t src1 = local 7324 const uint32_t src1 = local 7417 const struct float32_vec src1 = { local 7443 const struct float32_vec src1 = { local 7837 const float32_t src1 = local 7854 const float32_t src1 = local 7885 const float32_t src1 = local 7902 const float32_t src1 = local 7933 const float32_t src1 = local 7950 const float32_t src1 = local 7981 const float32_t src1 = local 7998 const float32_t src1 = local 8117 const uint32_t src1 = local 8134 const uint64_t src1 = local 8165 const int32_t src1 = local 8198 const int32_t src1 = local 8245 const int32_t src1 = local 8276 const int32_t src1 = local 8321 const uint32_t src1 = local 8338 const uint64_t src1 = local 8433 const uint32_t src1 = local 8450 const uint64_t src1 = local 8481 const uint32_t src1 = local 8498 const uint64_t src1 = local 8529 const uint32_t src1 = local 8546 const uint64_t src1 = local 8577 const int32_t src1 = local 8601 const int32_t src1 = local 8639 const uint32_t src1 = local 8656 const uint64_t src1 = local 8687 const int32_t src1 = local 8711 const int32_t src1 = local 8749 const uint32_t src1 = local 8766 const uint64_t src1 = local 8797 const uint32_t src1 = local 8814 const uint32_t src1 = local 8845 const int32_t src1 = local 8871 const int32_t src1 = local 9473 const int32_t src1 = local 9497 const int32_t src1 = local 9535 const uint32_t src1 = local 9552 const uint64_t src1 = local 9583 const int32_t src1 = local 9610 const int32_t src1 = local 9651 const uint32_t src1 = local 9668 const uint64_t src1 = local 9703 const struct uint32_vec src1 = { local 9733 const struct uint64_vec src1 = { local 9777 const struct uint32_vec src1 = { local 9816 const struct uint64_vec src1 = { local 9869 const struct uint32_vec src1 = { local 9917 const struct uint64_vec src1 = { local [all...] |
/external/clang/test/CodeGen/ |
H A D | arm-neon-misc.c | 24 void t2(uint64_t *src1, uint8_t *src2, uint64x2_t *dst) { argument 26 uint64x2_t q = vld1q_u64(src1);
|
/external/libvpx/libvpx/vpx_dsp/mips/ |
H A D | sum_squares_msa.c | 22 uint64_t src0, src1, src2, src3; local 26 LD4(src, src_stride, src0, src1, src2, src3); 27 INSERT_D2_SH(src0, src1, diff0); 35 v8i16 src0, src1, src2, src3, src4, src5, src6, src7; local 37 LD_SH8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); 38 DOTP_SH2_SW(src0, src1, src0, src1, mul0, mul1); 47 v8i16 src0, src1, src2, src3, src4, src5, src6, src7; local 49 LD_SH8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); 50 DOTP_SH2_SW(src0, src1, src 76 v8i16 src0, src1, src2, src3, src4, src5, src6, src7; local [all...] |
H A D | vpx_convolve_copy_msa.c | 19 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local 23 LD_UB8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); 27 out1 = __msa_copy_u_d((v2i64)src1, 0); 40 LD_UB4(src, src_stride, src0, src1, src2, src3); 44 out1 = __msa_copy_u_d((v2i64)src1, 0); 52 LD_UB8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7); 56 out1 = __msa_copy_u_d((v2i64)src1, 0); 71 LD_UB4(src, src_stride, src0, src1, src2, src3); 74 out1 = __msa_copy_u_d((v2i64)src1, 0); 83 LD_UB2(src, src_stride, src0, src1); 102 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local 126 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local 156 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local [all...] |
H A D | variance_msa.c | 44 uint32_t src0, src1, src2, src3; local 53 LW4(src_ptr, src_stride, src0, src1, src2, src3); 58 INSERT_W4_UB(src0, src1, src2, src3, src); 73 v16u8 src0, src1, src2, src3; local 79 LD_UB4(src_ptr, src_stride, src0, src1, src2, src3); 84 PCKEV_D4_UB(src1, src0, src3, src2, ref1, ref0, ref3, ref2, src0, src1, 87 CALC_MSE_AVG_B(src1, ref1, var, avg); 140 v16u8 src0, src1, ref0, ref1; local 145 LD_UB2(src_ptr, 16, src0, src1); 184 v16u8 src0, src1, ref0, ref1; local 230 v16u8 src0, src1, src2, src3; local 267 v16u8 src0, src1, src2, src3; local 306 v8i16 src0, src1, src2, src3; local 340 uint32_t src0, src1, src2, src3; local 364 v16u8 src0, src1, src2, src3; local 423 v16u8 src0, src1, ref0, ref1; local 463 v16u8 src0, src1, src2, src3; local 492 uint32_t src0, src1, src2, src3; local [all...] |
H A D | vpx_convolve_msa.h | 33 #define HORIZ_8TAP_FILT(src0, src1, mask0, mask1, mask2, mask3, filt_h0, \ 39 VSHF_B4_SB(src0, src1, mask0, mask1, mask2, mask3, vec0_m, vec1_m, vec2_m, \ 50 #define HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, \ 57 VSHF_B2_SB(src0, src1, src2, src3, mask0, mask0, vec0_m, vec1_m); \ 59 VSHF_B2_SB(src0, src1, src2, src3, mask1, mask1, vec2_m, vec3_m); \ 61 VSHF_B2_SB(src0, src1, src2, src3, mask2, mask2, vec4_m, vec5_m); \ 63 VSHF_B2_SB(src0, src1, src2, src3, mask3, mask3, vec6_m, vec7_m); \ 68 #define HORIZ_8TAP_8WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, \ 75 VSHF_B2_SB(src0, src0, src1, src1, mask [all...] |
H A D | vpx_convolve8_horiz_msa.c | 19 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local 33 LD_SB4(src, src_stride, src0, src1, src2, src3); 34 XORI_B4_128_SB(src0, src1, src2, src3); 35 HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, mask2, mask3, 47 v16i8 src0, src1, src2, src3; local 62 LD_SB4(src, src_stride, src0, src1, src2, src3); 63 XORI_B4_128_SB(src0, src1, src2, src3); 65 HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, mask2, mask3, 67 LD_SB4(src, src_stride, src0, src1, src2, src3); 68 XORI_B4_128_SB(src0, src1, src 93 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local 124 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local 169 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local 207 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local 265 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local 320 v16i8 src0, src1, src2, src3, mask; local 342 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local 379 v16i8 src0, src1, src2, src3, mask; local 402 v16i8 src0, src1, src2, src3, mask, out0, out1; local 475 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local 540 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local 585 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local [all...] |
/external/libvpx/libvpx/vp8/common/mips/msa/ |
H A D | copymem_msa.c | 16 uint64_t src0, src1, src2, src3; local 18 LD4(src, src_stride, src0, src1, src2, src3); 19 SD4(src0, src1, src2, src3, dst, dst_stride); 24 uint64_t src0, src1, src2, src3; local 26 LD4(src, src_stride, src0, src1, src2, src3); 28 SD4(src0, src1, src2, src3, dst, dst_stride); 31 LD4(src, src_stride, src0, src1, src2, src3); 32 SD4(src0, src1, src2, src3, dst, dst_stride); 37 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local 40 LD_UB8(src, src_stride, src0, src1, src [all...] |
/external/pcre/dist2/src/sljit/ |
H A D | sljitNativePPC_32.c | 45 sljit_s32 dst, sljit_s32 src1, sljit_s32 src2) 52 SLJIT_ASSERT(src1 == TMP_REG1); 59 SLJIT_ASSERT(src1 == TMP_REG1); 74 SLJIT_ASSERT(src1 == TMP_REG1); 86 SLJIT_ASSERT(src1 == TMP_REG1); 90 SLJIT_ASSERT(src1 == TMP_REG1); 94 SLJIT_ASSERT(src1 == TMP_REG1); 101 return push_inst(compiler, ADDI | D(dst) | A(src1) | compiler->imm); 106 return push_inst(compiler, ADDIS | D(dst) | A(src1) | compiler->imm); 110 return push_inst(compiler, ADDIC | D(dst) | A(src1) | compile 44 emit_single_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags, sljit_s32 dst, sljit_s32 src1, sljit_s32 src2) argument [all...] |
/external/libxaac/decoder/ |
H A D | ixheaacd_vec_baisc_ops.h | 23 VOID ixheaacd_combine_fac(WORD32 *src1, WORD32 *src2, WORD32 *dest, WORD32 len, 26 WORD8 ixheaacd_windowing_long1(WORD32 *src1, WORD32 *src2, 31 WORD8 ixheaacd_windowing_long2(WORD32 *src1, const WORD32 *win_fwd, 37 WORD8 ixheaacd_windowing_long3(WORD32 *src1, const WORD32 *win_fwd, 43 VOID ixheaacd_windowing_short1(WORD32 *src1, WORD32 *src2, WORD32 *fp, 47 VOID ixheaacd_windowing_short2(WORD32 *src1, WORD32 *win_fwd, WORD32 *fp, 51 WORD8 ixheaacd_windowing_short3(WORD32 *src1, WORD32 *win_rev, WORD32 *fp, 54 WORD8 ixheaacd_windowing_short4(WORD32 *src1, WORD32 *win_fwd, WORD32 *fp,
|
H A D | ixheaacd_basic_ops.c | 56 VOID ixheaacd_combine_fac(WORD32 *src1, WORD32 *src2, WORD32 *dest, WORD32 len, argument 61 *dest = ixheaacd_add32_sat(*src1, ((*src2) >> (fac_q - output_q))); 63 src1++; 68 *dest = ixheaacd_add32_sat(*src1, ((*src2) << (output_q - fac_q))); 70 src1++; 76 WORD8 ixheaacd_windowing_long1(WORD32 *src1, WORD32 *src2, argument 86 ((ixheaacd_mult32_sh1(*src1, *win_fwd)) >> (shift1 - shift2)), 89 ((ixheaacd_mult32_sh1(-(*src1), *win_rev)) >> (shift1 - shift2)), 92 src1++; 103 ixheaacd_mult32_sh1(*src1, *win_fw 120 ixheaacd_windowing_long2(WORD32 *src1, const WORD32 *win_fwd, WORD32 *fac_data_out, WORD32 *over_lap, WORD32 *p_out_buffer, offset_lengths *ixheaacd_drc_offset, WORD8 shiftp, WORD8 shift_olap, WORD8 fac_q) argument 287 ixheaacd_windowing_long3(WORD32 *src1, const WORD32 *win_fwd, WORD32 *over_lap, WORD32 *p_out_buffer, const WORD32 *win_rev, offset_lengths *ixheaacd_drc_offset, WORD8 shiftp, WORD8 shift_olap) argument 358 ixheaacd_windowing_short1(WORD32 *src1, WORD32 *src2, WORD32 *fp, offset_lengths *ixheaacd_drc_offset, WORD8 shiftp, WORD8 shift_olap) argument 412 ixheaacd_windowing_short2(WORD32 *src1, WORD32 *win_fwd, WORD32 *fp, offset_lengths *ixheaacd_drc_offset, WORD8 shiftp, WORD8 shift_olap) argument 462 ixheaacd_windowing_short3(WORD32 *src1, WORD32 *win_rev, WORD32 *fp, WORD32 n_short, WORD8 shiftp, WORD8 shift_olap) argument 499 ixheaacd_windowing_short4(WORD32 *src1, WORD32 *win_fwd, WORD32 *fp, WORD32 *win_fwd1, WORD32 n_short, WORD32 flag, WORD8 shiftp, WORD8 shift_olap, WORD8 output_q) argument [all...] |
/external/opencv/cxcore/src/ |
H A D | cxcmp.cpp | 57 worktype a1 = _toggle_macro_(src1[x]), \ 67 worktype a1 = _toggle_macro_(src1[x*2]), \ 70 a1 = _toggle_macro_(src1[x*2+1]); \ 81 worktype a1 = _toggle_macro_(src1[x*3]), \ 84 a1 = _toggle_macro_(src1[x*3+1]); \ 88 a1 = _toggle_macro_(src1[x*3+2]); \ 99 worktype a1 = _toggle_macro_(src1[x*4]), \ 102 a1 = _toggle_macro_(src1[x*4+1]); \ 106 a1 = _toggle_macro_(src1[x*4+2]); \ 110 a1 = _toggle_macro_(src1[ 256 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local 355 CvMat srcstub1, *src1 = (CvMat*)srcarr; local 567 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local 705 CvMat srcstub1, *src1 = (CvMat*)srcarr; local 975 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local 1076 CvMat srcstub1, *src1 = (CvMat*)srcarr; local 1425 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local [all...] |
H A D | cxlogic.cpp | 63 ( const uchar* src1, int step1, const uchar* src2, int step2, \ 64 uchar* dst, int step, CvSize size ), (src1, step1, src2, step2, dst, step, size) )\ 66 for( ; size.height--; src1 += step1, src2 += step2, dst += step ) \ 70 if( (((size_t)src1 | (size_t)src2 | (size_t)dst) & 3) == 0 ) \ 74 int t0 = __op__(((const int*)(src1+i))[0], ((const int*)(src2+i))[0]);\ 75 int t1 = __op__(((const int*)(src1+i))[1], ((const int*)(src2+i))[1]);\ 80 t0 = __op__(((const int*)(src1+i))[2], ((const int*)(src2+i))[2]); \ 81 t1 = __op__(((const int*)(src1+i))[3], ((const int*)(src2+i))[3]); \ 89 int t = __op__(*(const int*)(src1+i), *(const int*)(src2+i)); \ 96 int t = __op__(((const uchar*)src1)[ 352 CvMat srcstub1, *src1 = (CvMat*)srcarr1; local 527 cvXor( const void* src1, const void* src2, void* dst, const void* mask ) argument 544 cvAnd( const void* src1, const void* src2, void* dst, const void* mask ) argument 562 cvOr( const void* src1, const void* src2, void* dst, const void* mask ) argument 573 IPCVAPI_IMPL( CvStatus, icvNot_8u_C1R, ( const uchar* src1, int step1, uchar* dst, int step, CvSize size ), (src1, step1, dst, step, size) ) argument [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86GenDAGISel.inc | 2439 /*5380*/ OPC_RecordChild1, // #3 = $src1
2456 // Src: (st (rotl:i8 (ld:i8 addr:iPTR:$dst)<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:i8):$src1), addr:iPTR:$dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 50
2457 // Dst: (ROL8mi:i32 addr:iPTR:$dst, (imm:i8):$src1)
2462 /*5428*/ OPC_RecordChild1, // #3 = $src1
2479 // Src: (st (rotl:i16 (ld:i16 addr:iPTR:$dst)<<P:Predicate_unindexedload>><<P:Predicate_loadi16>>, (imm:i8):$src1), addr:iPTR:$dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 50
2480 // Dst: (ROL16mi:i32 addr:iPTR:$dst, (imm:i8):$src1)
2484 /*5475*/ OPC_RecordChild1, // #3 = $src1
2501 // Src: (st (rotl:i32 (ld:i32 addr:iPTR:$dst)<<P:Predicate_unindexedload>><<P:Predicate_loadi32>>, (imm:i8):$src1), addr:iPTR:$dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>> - Complexity = 50
2502 // Dst: (ROL32mi:i32 addr:iPTR:$dst, (imm:i8):$src1)
2506 /*5522*/ OPC_RecordChild1, // #3 = $src1
[all...] |
/external/swiftshader/src/Shader/ |
H A D | ShaderCore.cpp | 659 void ShaderCore::add(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 661 dst.x = src0.x + src1.x; 662 dst.y = src0.y + src1.y; 663 dst.z = src0.z + src1.z; 664 dst.w = src0.w + src1.w; 667 void ShaderCore::iadd(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 669 dst.x = As<Float4>(As<Int4>(src0.x) + As<Int4>(src1.x)); 670 dst.y = As<Float4>(As<Int4>(src0.y) + As<Int4>(src1.y)); 671 dst.z = As<Float4>(As<Int4>(src0.z) + As<Int4>(src1.z)); 672 dst.w = As<Float4>(As<Int4>(src0.w) + As<Int4>(src1 675 sub(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 683 isub(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 691 mad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) argument 699 imad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) argument 707 mul(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 715 imul(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 733 div(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 741 idiv(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 754 udiv(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 767 mod(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 775 imod(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 788 umod(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 801 shl(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 809 ishr(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 817 ushr(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 866 dist1(Float4 &dst, const Vector4f &src0, const Vector4f &src1, bool pp) argument 871 dist2(Float4 &dst, const Vector4f &src0, const Vector4f &src1, bool pp) argument 879 dist3(Float4 &dst, const Vector4f &src0, const Vector4f &src1, bool pp) argument 888 dist4(Float4 &dst, const Vector4f &src0, const Vector4f &src1, bool pp) argument 898 dp1(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 908 dp2(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 918 dp2add(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) argument 928 dp3(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 938 dp4(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 948 min(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 956 imin(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 964 umin(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 972 max(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 980 imax(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 988 umax(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 996 slt(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 1082 att(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 1091 lrp(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) argument 1202 det2(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 1208 det3(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) argument 1214 det4(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2, const Vector4f &src3) argument 1289 powx(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, bool pp) argument 1299 pow(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, bool pp) argument 1307 crs(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 1547 atan2(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, bool pp) argument 1652 cmp0(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) argument 1660 select(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) argument 1668 extract(Float4 &dst, const Vector4f &src0, const Float4 &src1) argument 1697 cmp0(Float4 &dst, const Float4 &src0, const Float4 &src1, const Float4 &src2) argument 1703 cmp0i(Float4 &dst, const Float4 &src0, const Float4 &src1, const Float4 &src2) argument 1709 select(Float4 &dst, RValue<Int4> src0, const Float4 &src1, const Float4 &src2) argument 1715 cmp(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, Control control) argument 1760 icmp(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, Control control) argument 1805 ucmp(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, Control control) argument 1868 bitwise_or(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 1876 bitwise_xor(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 1884 bitwise_and(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 1892 equal(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument 1903 notEqual(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) argument [all...] |
H A D | ShaderCore.hpp | 233 void add(Vector4f &dst, const Vector4f &src0, const Vector4f &src1); 234 void iadd(Vector4f &dst, const Vector4f &src0, const Vector4f &src1); 235 void sub(Vector4f &dst, const Vector4f &src0, const Vector4f &src1); 236 void isub(Vector4f &dst, const Vector4f &src0, const Vector4f &src1); 237 void mad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2); 238 void imad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2); 239 void mul(Vector4f &dst, const Vector4f &src0, const Vector4f &src1); 240 void imul(Vector4f &dst, const Vector4f &src0, const Vector4f &src1); 242 void div(Vector4f &dst, const Vector4f &src0, const Vector4f &src1); 243 void idiv(Vector4f &dst, const Vector4f &src0, const Vector4f &src1); [all...] |
H A D | PixelProgram.hpp | 104 void M3X2(Vector4f &dst, Vector4f &src0, const Src &src1); 105 void M3X3(Vector4f &dst, Vector4f &src0, const Src &src1); 106 void M3X4(Vector4f &dst, Vector4f &src0, const Src &src1); 107 void M4X3(Vector4f &dst, Vector4f &src0, const Src &src1); 108 void M4X4(Vector4f &dst, Vector4f &src0, const Src &src1); 109 void TEX(Vector4f &dst, Vector4f &src0, const Src &src1, bool project, bool bias); 110 void TEXLOD(Vector4f &dst, Vector4f &src0, const Src &src1, Float4 &lod); 111 void TEXBIAS(Vector4f &dst, Vector4f &src0, const Src &src1, Float4 &bias); 112 void TEXSIZE(Vector4f &dst, Float4 &lod, const Src &src1); 114 void TEXOFFSET(Vector4f &dst, Vector4f &src0, const Src &src1, Vector4 [all...] |
/external/v8/src/ia32/ |
H A D | assembler-ia32.h | 1089 void vfmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { 1090 vfmadd132sd(dst, src1, Operand(src2)); 1092 void vfmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { 1093 vfmadd213sd(dst, src1, Operand(src2)); 1095 void vfmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { 1096 vfmadd231sd(dst, src1, Operand(src2)); 1098 void vfmadd132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) { 1099 vfmasd(0x99, dst, src1, src2); 1101 void vfmadd213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) { 1102 vfmasd(0xa9, dst, src1, src [all...] |
/external/vboot_reference/firmware/stub/ |
H A D | utility_stub.c | 20 int Memcmp(const void *src1, const void *src2, size_t n) argument 22 return memcmp(src1, src2, n);
|
/external/opencv/cv/src/ |
H A D | _cvmatrix.h | 63 #define icvAddMatrix_32f( src1, src2, dst, w, h ) \ 64 icvAddVector_32f( (src1), (src2), (dst), (w)*(h)) 66 #define icvSubMatrix_32f( src1, src2, dst, w, h ) \ 67 icvSubVector_32f( (src1), (src2), (dst), (w)*(h)) 91 CV_INLINE double icvDotProduct_32f( const float* src1, const float* src2, int len ) argument 94 for( int i = 0; i < len; i++ ) s += src1[i]*src2[i]; 102 CV_INLINE double icvDotProduct_64f( const double* src1, const double* src2, int len ) argument 105 for( int i = 0; i < len; i++ ) s += src1[i]*src2[i]; 113 CV_INLINE void icvMulVectors_32f( const float* src1, const float* src2, argument 118 dst[i] = src1[ 123 icvMulVectors_64d( const double* src1, const double* src2, double* dst, int len ) argument 134 icvAddVector_32f( const float* src1, const float* src2, float* dst, int len ) argument 144 icvAddVector_64d( const double* src1, const double* src2, double* dst, int len ) argument 155 icvSubVector_32f( const float* src1, const float* src2, float* dst, int len ) argument 165 icvSubVector_64d( const double* src1, const double* src2, double* dst, int len ) argument 283 icvMulMatrix_32f( const float* src1, int w1, int h1, const float* src2, int w2, int h2, float* dst ) argument 308 icvMulMatrix_64d( const double* src1, int w1, int h1, const double* src2, int w2, int h2, double* dst ) argument [all...] |
/external/libpng/mips/ |
H A D | filter_msa_intrinsics.c | 373 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local 377 LD_UB4(rp, 16, src0, src1, src2, src3); 381 ADD4(src0, src4, src1, src5, src2, src6, src3, src7, 382 src0, src1, src2, src3); 384 ST_UB4(src0, src1, src2, src3, rp, 16); 398 LD_UB4(rp, 16, src0, src1, src2, src3); 401 ADD4(src0, src4, src1, src5, src2, src6, src3, src7, 402 src0, src1, src2, src3); 404 ST_UB4(src0, src1, src2, src3, rp, 16); 409 LD_UB2(rp, 16, src0, src1); 465 v16u8 src0, src1, src2, src3, src4; local 505 v16u8 src0, src1, src2, src3, src4, dst0, dst1; local 550 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, dst0, dst1; local 603 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, dst0, dst1; local 661 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9; local 734 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, dst0, dst1; local [all...] |
/external/webp/src/dsp/ |
H A D | lossless_msa.c | 25 v16u8 src0, src1, src2, src3, dst0, dst1, dst2; \ 26 LD_UB4(psrc, 16, src0, src1, src2, src3); \ 27 VSHF_B2_UB(src0, src1, src1, src2, m0, m1, dst0, dst1); \ 35 v16u8 src0, src1, src2, dst0, dst1, dst2; \ 36 LD_UB3(psrc, 16, src0, src1, src2); \ 37 VSHF_B2_UB(src0, src1, src1, src2, m0, m1, dst0, dst1); \ 46 v16u8 src0, src1, src2 = { 0 }, dst0, dst1; \ 47 LD_UB2(psrc, 16, src0, src1); \ 121 v16u8 src1, dst1; local 257 v16u8 src1, dst1, tmp1; local 302 v16u8 src1, dst1; local [all...] |
/external/libxcam/modules/isp/ |
H A D | aiq3a_utils.cpp | 62 matrix_3x3_mutiply (double *dest, const double *src1, const double *src2) argument 64 dest[0] = src1[0] * src2[0] + src1[1] * src2[3] + src1[2] * src2[6]; 65 dest[1] = src1[0] * src2[1] + src1[1] * src2[4] + src1[2] * src2[7]; 66 dest[2] = src1[0] * src2[2] + src1[1] * src2[5] + src1[ [all...] |
/external/v8/src/x64/ |
H A D | assembler-x64.h | 1070 void vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2, 1072 void vinstr(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2, 1092 void v##instruction(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \ 1093 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \ 1095 void v##instruction(XMMRegister dst, XMMRegister src1, \ 1097 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \ 1143 void v##instruction(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \ 1144 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0); \ 1146 void v##instruction(XMMRegister dst, XMMRegister src1, \ 1148 vinstr(0x##opcode, dst, src1, src [all...] |