Searched refs:src_offset (Results 1 - 25 of 164) sorted by relevance

1234567

/external/adhd/cras/src/server/
H A Dlinear_resampler.c14 * src_offset - The accumulated offset for resampled src data.
23 unsigned int src_offset; member in struct:linear_resampler
60 lr->src_offset = 0;
85 if ((in_frames > lr->src_offset))
86 return 1 + (unsigned int)(in_frames - lr->src_offset);
98 out_frames = lr->f * (lr->src_offset + frames - 1);
131 if (src_pos > lr->src_offset)
132 src_pos -= lr->src_offset;
164 lr->src_offset += *src_frames;
166 while ((lr->src_offset > l
[all...]
H A Dcras_audio_area.h66 * src_offset - The offset of src audio area in frames.
74 unsigned int src_offset,
H A Dcras_audio_area.c29 unsigned int src_offset,
36 ncopy = MIN(src->frames - src_offset, dst->frames - dst_offset);
47 src_offset * src->channels[src_idx].step_bytes;
25 cras_audio_area_copy(const struct cras_audio_area *dst, unsigned int dst_offset, const struct cras_audio_format *dst_fmt, const struct cras_audio_area *src, unsigned int src_offset, float software_gain_scaler) argument
/external/mesa3d/src/gallium/drivers/i915/
H A Di915_blit.h37 unsigned src_offset,
H A Di915_blit.c93 unsigned src_offset,
110 src_buffer, src_pitch, src_offset, src_x, src_y,
157 OUT_RELOC_FENCED(src_buffer, I915_USAGE_2D_SOURCE, src_offset);
89 i915_copy_blit(struct i915_context *i915, unsigned cpp, unsigned short src_pitch, struct i915_winsys_buffer *src_buffer, unsigned src_offset, unsigned short dst_pitch, struct i915_winsys_buffer *dst_buffer, unsigned dst_offset, short src_x, short src_y, short dst_x, short dst_y, short w, short h) argument
/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dr200_blit.h37 intptr_t src_offset,
H A Dradeon_tex_copy.c84 intptr_t src_offset = rrb->draw_offset; local
92 x, y, rrb->base.Base.Width, rrb->base.Base.Height, (uint32_t) src_offset, rrb->pitch/rrb->cpp);
128 return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp,
/external/mesa3d/src/mesa/drivers/dri/radeon/
H A Dradeon_blit.h37 intptr_t src_offset,
H A Dradeon_tex_copy.c84 intptr_t src_offset = rrb->draw_offset; local
92 x, y, rrb->base.Base.Width, rrb->base.Base.Height, (uint32_t) src_offset, rrb->pitch/rrb->cpp);
128 return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp,
/external/mesa3d/src/gallium/drivers/r600/
H A Devergreen_hw_context.c35 uint64_t src_offset,
50 src_offset += rsrc->gpu_address;
53 if (!(dst_offset % 4) && !(src_offset % 4) && !(size % 4)) {
73 radeon_emit(cs, src_offset & 0xffffffff);
75 radeon_emit(cs, (src_offset >> 32UL) & 0xff);
77 src_offset += csize << shift;
31 evergreen_dma_copy_buffer(struct r600_context *rctx, struct pipe_resource *dst, struct pipe_resource *src, uint64_t dst_offset, uint64_t src_offset, uint64_t size) argument
/external/mesa3d/src/mesa/drivers/dri/i915/
H A Dintel_blit.h43 GLuint src_offset,
80 unsigned int src_offset,
/external/sfntly/cpp/src/sfntly/data/
H A Dgrowable_memory_byte_array.h40 int32_t src_offset,
42 return ByteArray::CopyTo(dst_offset, array, src_offset, length);
38 CopyTo(int32_t dst_offset, ByteArray* array, int32_t src_offset, int32_t length) argument
H A Dmemory_byte_array.h52 int32_t src_offset,
54 return ByteArray::CopyTo(dst_offset, array, src_offset, length);
50 CopyTo(int32_t dst_offset, ByteArray* array, int32_t src_offset, int32_t length) argument
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_eu_validate.c141 for (int src_offset = 0; src_offset < p->next_insn_offset - start_offset;
142 src_offset += sizeof(brw_inst)) {
144 const brw_inst *inst = store + src_offset;
179 annotation_insert_error(annotation, src_offset, error_msg.str);
H A Dintel_pixel_draw.c59 GLuint src_offset; local
107 src_offset = (GLintptr)pixels;
108 src_offset += _mesa_image_offset(2, unpack, width, height,
111 src_buffer = intel_bufferobj_buffer(brw, src, src_offset,
118 src_offset,
H A Dintel_blit.h36 GLuint src_offset,
86 unsigned int src_offset,
/external/strace/
H A Dfile_ioctl.c47 uint64_t src_offset; member in struct:file_clone_range
70 uint64_t src_offset; /* in - start of extent in source */ member in struct:file_dedupe_range
144 tprintf(", src_offset=%" PRIu64
147 (uint64_t) args.src_offset,
172 tprintf("src_offset=%" PRIu64
175 (uint64_t) args.src_offset,
/external/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_dma.c36 uint64_t src_offset,
51 src_offset += rsrc->gpu_address;
54 if (!(dst_offset % 4) && !(src_offset % 4) && !(size % 4)) {
72 radeon_emit(cs, src_offset);
74 radeon_emit(cs, (src_offset >> 32UL) & 0xff);
76 src_offset += count;
297 uint64_t dst_offset, src_offset; local
303 src_offset= rsrc->surface.level[src_level].offset;
304 src_offset += rsrc->surface.level[src_level].slice_size * src_box->z;
305 src_offset
32 si_dma_copy_buffer(struct si_context *ctx, struct pipe_resource *dst, struct pipe_resource *src, uint64_t dst_offset, uint64_t src_offset, uint64_t size) argument
[all...]
H A Dsi_cp_dma.c305 uint64_t dst_offset, uint64_t src_offset, unsigned size,
318 if (dst != src || dst_offset != src_offset) {
327 src_offset += r600_resource(src)->gpu_address;
343 if (src_offset % CP_DMA_ALIGNMENT) {
344 skipped_size = CP_DMA_ALIGNMENT - (src_offset % CP_DMA_ALIGNMENT);
358 main_src_offset = src_offset + skipped_size;
384 si_emit_cp_dma(sctx, dst_offset, src_offset, skipped_size,
397 if (dst_offset != src_offset)
303 si_copy_buffer(struct si_context *sctx, struct pipe_resource *dst, struct pipe_resource *src, uint64_t dst_offset, uint64_t src_offset, unsigned size, unsigned user_flags) argument
/external/mesa3d/src/mesa/state_tracker/
H A Dst_atom_array.c381 int src_offset, int format,
384 velement->src_offset = src_offset;
394 int src_offset, int format,
408 init_velement(&velements[idx], src_offset,
420 init_velement(&velements[idx], src_offset + 4 * sizeof(float),
426 init_velement(&velements[idx], src_offset, PIPE_FORMAT_R32G32_UINT,
433 init_velement(&velements[idx], src_offset,
499 unsigned src_offset; local
505 src_offset
380 init_velement(struct pipe_vertex_element *velement, int src_offset, int format, int instance_divisor, int vbo_index) argument
391 init_velement_lowered(struct st_context *st, const struct st_vertex_program *vp, struct pipe_vertex_element *velements, int src_offset, int format, int instance_divisor, int vbo_index, int nr_components, GLboolean doubles, GLuint *attr_idx) argument
[all...]
/external/mesa3d/src/gallium/drivers/vc4/kernel/
H A Dvc4_validate.c479 uint32_t src_offset = 0; local
481 while (src_offset < len) {
483 void *src_pkt = unvalidated + src_offset;
489 src_offset, cmd);
496 src_offset, cmd);
500 if (src_offset + info->len > len) {
503 src_offset, cmd, info->name, info->len,
504 src_offset + len);
515 src_offset, cmd, info->name);
519 src_offset
814 uint32_t src_offset = *(uint32_t *)(pkt_u + o); local
[all...]
/external/mesa3d/src/intel/vulkan/
H A DgenX_gpu_memcpy.c57 struct anv_bo *src, uint32_t src_offset,
64 assert(src_offset + size <= src->size);
68 bs = gcd_pow2_u64(bs, src_offset);
97 .BufferStartingAddress = { src, src_offset },
104 .EndAddress = { src, src_offset + size - 1 },
55 cmd_buffer_gpu_memcpy(struct anv_cmd_buffer *cmd_buffer, struct anv_bo *dst, uint32_t dst_offset, struct anv_bo *src, uint32_t src_offset, uint32_t size) argument
/external/valgrind/none/tests/s390x/
H A Dmvcl.c175 uint32_t dst_offset, dst_len, src_offset, src_len; local
266 for (src_offset = 0; src_offset < sizeof buf; ++src_offset)
267 for (src_len = 0; src_len <= sizeof buf - src_offset; ++src_len)
268 run_test(buf + dst_offset, dst_len, buf + src_offset, src_len, 'x');
/external/mesa3d/src/gallium/auxiliary/postprocess/
H A Dpp_program.c111 p->velem[0].src_offset = 0;
115 p->velem[1].src_offset = 1 * 4 * sizeof(float);
/external/mesa3d/src/gallium/auxiliary/util/
H A Du_draw.c86 if (element->src_offset >= buffer_size) {
91 buffer_size -= element->src_offset;

Completed in 627 milliseconds

1234567