/external/compiler-rt/lib/builtins/arm/ |
H A D | divmodsi4.S | 59 eor ip, r0, r0, asr #31 60 eor lr, r1, r1, asr #31 61 sub r0, ip, r0, asr #31 62 sub r1, lr, r1, asr #31 67 eor r0, r0, r4, asr #31 68 eor r1, r1, r5, asr #31 69 sub r0, r0, r4, asr #31 70 sub r1, r1, r5, asr #31
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H A D | divsi3.S | 54 eor r2, r0, r0, asr #31 55 eor r3, r1, r1, asr #31 56 sub r0, r2, r0, asr #31 57 sub r1, r3, r1, asr #31 61 eor r0, r0, r4, asr #31 62 sub r0, r0, r4, asr #31
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H A D | modsi3.S | 52 eor r2, r0, r0, asr #31 53 eor r3, r1, r1, asr #31 54 sub r0, r2, r0, asr #31 55 sub r1, r3, r1, asr #31 59 eor r0, r0, r4, asr #31 60 sub r0, r0, r4, asr #31
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H A D | comparesf2.S | 80 mvnlo r0, r1, asr #31 87 movhi r0, r1, asr #31 122 mvnlo r0, r1, asr #31 124 movhi r0, r1, asr #31
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/external/valgrind/none/tests/arm/ |
H A D | v6intThumb.stdout.exp | 2153 adds.w r1, r2, r3, asr #0 :: rd 0x5859704f rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000 2154 adds.w r1, r2, r3, asr #1 :: rd 0x44cd64bb rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000 2155 adds.w r1, r2, r3, asr #15 :: rd 0x3141a757 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000 2156 adds.w r1, r2, r3, asr #31 :: rd 0x31415927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000 2165 add.w r1, r2, r3, asr #0 :: rd 0x5859704f rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ 2166 add.w r1, r2, r3, asr #1 :: rd 0x44cd64bb rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ 2167 add.w r1, r2, r3, asr #15 :: rd 0x3141a757 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ 2168 add.w r1, r2, r3, asr #31 :: rd 0x31415927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000 NZ 2177 adds.w r1, r2, r3, asr #0 :: rd 0xc859704f rm 0x31415927, rn 0x97181728, c:v-in 0, cpsr 0x80000000 N 2178 adds.w r1, r2, r3, asr # [all...] |
/external/libxaac/decoder/armv7/ |
H A D | ixheaacd_expsubbandsamples.s | 58 EOR r1 , r4 , r4, asr #31 60 EORGE r1 , r8 , r8, asr #31 85 EOR r3 , r8 , r8, asr #31 88 EOR r3 , r9 , r9, asr #31 94 EORGE r3 , r8 , r8, asr #31 97 EORGE r3 , r9 , r9, asr #31
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H A D | ixheaacd_decorr_filter2.s | 165 MOV r7, r9, asr #15 166 MOV r8, r3, asr #15 172 MOV r14, r14, asr #16 173 MOV r1, r1, asr #16 190 MOV r3, r3, asr #15 195 MOV r9, r9, asr #15 197 SUB r3, r3, r14, asr #15 198 SUB r9, r9, r1, asr #15 205 ADD r14, r7, r14, asr #15 208 ADD r1, r8, r1, asr #1 [all...] |
H A D | ixheaacd_tns_ar_filter_fixed_32x16.s | 67 MOV r9, r8, asr r1 88 MOV r9, r8, asr r1 137 MOV r9, r8, asr r1 177 MOV r9, r8, asr r1 195 MOV r9, r8, asr r1 216 MOV r9, r8, asr r1 262 MOV r9, r8, asr r1
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/external/capstone/suite/MC/ARM/ |
H A D | arm-shift-encoding.s.cs | 7 0x40,0x00,0x90,0xe7 = ldr r0, [r0, r0, asr #32] 8 0x40,0x08,0x90,0xe7 = ldr r0, [r0, r0, asr #16] 16 0x40,0xf0,0xd0,0xf7 = pld [r0, r0, asr #32] 17 0x40,0xf8,0xd0,0xf7 = pld [r0, r0, asr #16] 25 0x40,0x00,0x80,0xe7 = str r0, [r0, r0, asr #32] 26 0x40,0x08,0x80,0xe7 = str r0, [r0, r0, asr #16] 38 0x4b,0x50,0xa4,0xe0 = adc r5, r4, r11, asr #32 39 0x4d,0x68,0xa3,0xe0 = adc r6, r3, sp, asr #16 47 0x44,0x00,0x55,0xe1 = cmp r5, r4, asr #32 48 0x43,0x08,0x56,0xe1 = cmp r6, r3, asr #1 [all...] |
H A D | thumb-shift-encoding.s.cs | 7 0x64,0xeb,0x2b,0x05 = sbc.w r5, r4, r11, asr #32 8 0x63,0xeb,0x2d,0x46 = sbc.w r6, r3, sp, asr #16 16 0x04,0xea,0x2b,0x05 = and.w r5, r4, r11, asr #32 17 0x03,0xea,0x2d,0x46 = and.w r6, r3, sp, asr #16
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H A D | basic-arm-instructions.s.cs | 20 0xc6,0x40,0xa5,0xe0 = adc r4, r5, r6, asr #1 21 0xc6,0x4f,0xa5,0xe0 = adc r4, r5, r6, asr #31 22 0x46,0x40,0xa5,0xe0 = adc r4, r5, r6, asr #32 27 0x58,0x69,0xa7,0xe0 = adc r6, r7, r8, asr r9 36 0xc5,0x40,0xa4,0xe0 = adc r4, r4, r5, asr #1 37 0xc5,0x4f,0xa4,0xe0 = adc r4, r4, r5, asr #31 38 0x45,0x40,0xa4,0xe0 = adc r4, r4, r5, asr #32 44 0x57,0x69,0xa6,0xe0 = adc r6, r6, r7, asr r9 52 0xc6,0x42,0x85,0xe0 = add r4, r5, r6, asr #5 57 0x58,0x69,0x87,0xe0 = add r6, r7, r8, asr r [all...] |
/external/llvm/test/MC/ARM/ |
H A D | arm-shift-encoding.s | 8 ldr r0, [r0, r0, asr #32] 9 ldr r0, [r0, r0, asr #16] 18 @ CHECK: ldr r0, [r0, r0, asr #32] @ encoding: [0x40,0x00,0x90,0xe7] 19 @ CHECK: ldr r0, [r0, r0, asr #16] @ encoding: [0x40,0x08,0x90,0xe7] 28 pld [r0, r0, asr #32] 29 pld [r0, r0, asr #16] 38 @ CHECK: [r0, r0, asr #32] @ encoding: [0x40,0xf0,0xd0,0xf7] 39 @ CHECK: [r0, r0, asr #16] @ encoding: [0x40,0xf8,0xd0,0xf7] 48 str r0, [r0, r0, asr #32] 49 str r0, [r0, r0, asr #1 [all...] |
H A D | thumb-shift-encoding.s | 12 sbc.w r5, r4, r11, asr #32 13 sbc.w r6, r3, r12, asr #16 22 @ CHECK: sbc.w r5, r4, r11, asr #32 @ encoding: [0x64,0xeb,0x2b,0x05] 23 @ CHECK: sbc.w r6, r3, r12, asr #16 @ encoding: [0x63,0xeb,0x2c,0x46] 32 and.w r5, r4, r11, asr #32 33 and.w r6, r3, r12, asr #16 42 @ CHECK: and.w r5, r4, r11, asr #32 @ encoding: [0x04,0xea,0x2b,0x05] 43 @ CHECK: and.w r6, r3, r12, asr #16 @ encoding: [0x03,0xea,0x2c,0x46]
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H A D | basic-thumb2-instructions-v8.s | 28 sbc.w r6, r3, sp, asr #16 29 and.w r6, r3, sp, asr #16 31 @ CHECK-V8: sbc.w r6, r3, sp, asr #16 @ encoding: [0x63,0xeb,0x2d,0x46] 32 @ CHECK-V8: and.w r6, r3, sp, asr #16 @ encoding: [0x03,0xea,0x2d,0x46]
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/external/llvm/test/MC/AArch64/ |
H A D | arm64-logical-encoding.s | 56 and w1, w2, w3, asr #2 57 and x1, x2, x3, asr #2 67 ; CHECK: and w1, w2, w3, asr #2 ; encoding: [0x41,0x08,0x83,0x0a] 68 ; CHECK: and x1, x2, x3, asr #2 ; encoding: [0x41,0x08,0x83,0x8a] 78 ands w1, w2, w3, asr #2 79 ands x1, x2, x3, asr #2 89 ; CHECK: ands w1, w2, w3, asr #2 ; encoding: [0x41,0x08,0x83,0x6a] 90 ; CHECK: ands x1, x2, x3, asr #2 ; encoding: [0x41,0x08,0x83,0xea] 100 bic w1, w2, w3, asr #3 101 bic x1, x2, x3, asr # [all...] |
H A D | basic-a64-diagnostics.s | 40 // CHECK-ERROR: error: expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 63] 58 // CHECK-ERROR: error: expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 63] 185 add x4, sp, x9, asr #5 191 // CHECK-ERROR-NEXT: add x4, sp, x9, asr #5 201 add w1, w2, w3, asr #-1 202 add w1, w2, w3, asr #32 207 add x1, x2, x3, asr #-1 208 add x1, x2, x3, asr #64 222 // CHECK-ERROR-NEXT: add w1, w2, w3, asr #-1 225 // CHECK-ERROR-NEXT: add w1, w2, w3, asr #3 [all...] |
/external/skia/tools/gpu/ |
H A D | TestContext.cpp | 41 auto asr = SkScopeExit(this->onPlatformGetAutoContextRestore()); local 43 return asr;
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/external/skqp/tools/gpu/ |
H A D | TestContext.cpp | 41 auto asr = SkScopeExit(this->onPlatformGetAutoContextRestore()); local 43 return asr;
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.h | 28 case ISD::SRA: return ARM_AM::asr;
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
H A D | basic-arm-instructions.s | 55 adc r4, r5, r6, asr #1 56 adc r4, r5, r6, asr #31 57 adc r4, r5, r6, asr #32 64 adc r6, r7, r8, asr r9 75 adc r4, r5, asr #1 76 adc r4, r5, asr #31 77 adc r4, r5, asr #32 83 adc r6, r7, asr r9 94 @ CHECK: adc r4, r5, r6, asr #1 @ encoding: [0xc6,0x40,0xa5,0xe0] 95 @ CHECK: adc r4, r5, r6, asr #3 [all...] |
H A D | diagnostics.s | 18 adc r4, r5, r6, asr #-1 19 adc r4, r5, r6, asr #33 39 @ CHECK-ERRORS: adc r4, r5, r6, asr #-1 42 @ CHECK-ERRORS: adc r4, r5, r6, asr #33 124 pkhtb r2, r2, r3, asr #0 125 pkhtb r2, r2, r3, asr #33 126 pkhbt r2, r2, r3, asr #3 136 @ CHECK-ERRORS: pkhtb r2, r2, r3, asr #0 139 @ CHECK-ERRORS: pkhtb r2, r2, r3, asr #33 142 @ CHECK-ERRORS: pkhbt r2, r2, r3, asr # [all...] |
/external/libhevc/common/arm/ |
H A D | ihevc_deblk_luma_vert.s | 75 asr r3,r3,#1 86 asr r2,r2,#1 202 asr r10,r5,#2 230 cmp r8,r5,asr #3 243 cmp r7,r10,asr #1 251 asr r10,r5,#2 283 cmp r8,r5,asr #3 294 cmp r7,r10,asr #1 332 add r8,r11,r11,asr #1 334 asr r [all...] |
/external/libhevc/common/arm64/ |
H A D | ihevc_deblk_luma_vert.s | 66 asr x3,x3,#1 79 asr x2,x2,#1 204 asr x10,x5,#2 233 cmp x8,x5,asr #3 246 cmp x7,x10,asr #1 254 asr x10,x5,#2 287 cmp x8,x5,asr #3 298 cmp x7,x10,asr #1 338 add x8,x11,x11,asr #1 340 asr x [all...] |
/external/libvpx/libvpx/build/make/ |
H A D | thumb.pm | 34 # "ldrb r4, [r9, lr, asr #1]" into "add r9, r9, lr, asr #1", 35 # "ldrb r9, [r9]", "sub r9, r9, lr, asr #1". 36 s/^(\s*)(ldrb)(\s+)(r\d+),\s*\[(\w+),\s*(\w+),\s*(asr #\d+)\]/$1add $3$5, $5, $6, $7\n$1$2$3$4, [$5]\n$1sub $3$5, $5, $6, $7/g;
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/external/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.h | 29 case ISD::SRA: return ARM_AM::asr;
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