instruction_set_features_mips.h revision bda1d606f2d31086874b68edd9254e3817d8049c
1/* 2 * Copyright (C) 2014 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17#ifndef ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_ 18#define ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_ 19 20#include "arch/instruction_set_features.h" 21#include "base/logging.h" 22#include "base/macros.h" 23 24namespace art { 25 26// Instruction set features relevant to the MIPS architecture. 27class MipsInstructionSetFeatures FINAL : public InstructionSetFeatures { 28 public: 29 // Process a CPU variant string like "r4000" and create InstructionSetFeatures. 30 static const MipsInstructionSetFeatures* FromVariant(const std::string& variant, 31 std::string* error_msg); 32 33 // Parse a bitmap and create an InstructionSetFeatures. 34 static const MipsInstructionSetFeatures* FromBitmap(uint32_t bitmap); 35 36 // Turn C pre-processor #defines into the equivalent instruction set features. 37 static const MipsInstructionSetFeatures* FromCppDefines(); 38 39 // Process /proc/cpuinfo and use kRuntimeISA to produce InstructionSetFeatures. 40 static const MipsInstructionSetFeatures* FromCpuInfo(); 41 42 // Process the auxiliary vector AT_HWCAP entry and use kRuntimeISA to produce 43 // InstructionSetFeatures. 44 static const MipsInstructionSetFeatures* FromHwcap(); 45 46 // Use assembly tests of the current runtime (ie kRuntimeISA) to determine the 47 // InstructionSetFeatures. This works around kernel bugs in AT_HWCAP and /proc/cpuinfo. 48 static const MipsInstructionSetFeatures* FromAssembly(); 49 50 bool Equals(const InstructionSetFeatures* other) const OVERRIDE; 51 52 InstructionSet GetInstructionSet() const OVERRIDE { 53 return kMips; 54 } 55 56 uint32_t AsBitmap() const OVERRIDE; 57 58 std::string GetFeatureString() const OVERRIDE; 59 60 // Is this an ISA revision greater than 2 opening up new opcodes. 61 bool IsMipsIsaRevGreaterThanEqual2() const { 62 return mips_isa_gte2_; 63 } 64 65 // Floating point double registers are encoded differently based on whether the Status.FR bit is 66 // set. When the FR bit is 0 then the FPU is 32-bit, 1 its 64-bit. Return true if the code should 67 // be generated assuming Status.FR is 0. 68 bool Is32BitFloatingPoint() const { 69 return fpu_32bit_; 70 } 71 72 bool IsR6() const { 73 return r6_; 74 } 75 76 virtual ~MipsInstructionSetFeatures() {} 77 78 protected: 79 // Parse a vector of the form "fpu32", "mips2" adding these to a new MipsInstructionSetFeatures. 80 virtual const InstructionSetFeatures* 81 AddFeaturesFromSplitString(const bool smp, const std::vector<std::string>& features, 82 std::string* error_msg) const OVERRIDE; 83 84 private: 85 MipsInstructionSetFeatures(bool smp, bool fpu_32bit, bool mips_isa_gte2, bool r6) 86 : InstructionSetFeatures(smp), 87 fpu_32bit_(fpu_32bit), 88 mips_isa_gte2_(mips_isa_gte2), 89 r6_(r6) { 90 // Sanity checks. 91 if (r6) { 92 CHECK(mips_isa_gte2); 93 CHECK(!fpu_32bit); 94 } 95 if (!mips_isa_gte2) { 96 CHECK(fpu_32bit); 97 } 98 } 99 100 // Bitmap positions for encoding features as a bitmap. 101 enum { 102 kSmpBitfield = 1, 103 kFpu32Bitfield = 2, 104 kIsaRevGte2Bitfield = 4, 105 kR6 = 8, 106 }; 107 108 const bool fpu_32bit_; 109 const bool mips_isa_gte2_; 110 const bool r6_; 111 112 DISALLOW_COPY_AND_ASSIGN(MipsInstructionSetFeatures); 113}; 114 115} // namespace art 116 117#endif // ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_ 118