kvm.h revision 6a9755d20a995756487bb1aafb7e954f4fd868a7
1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef __ARM_KVM_H__ 20#define __ARM_KVM_H__ 21#include <linux/types.h> 22#include <linux/psci.h> 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#include <asm/ptrace.h> 25#define __KVM_HAVE_GUEST_DEBUG 26#define __KVM_HAVE_IRQ_LINE 27#define __KVM_HAVE_READONLY_MEM 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define KVM_REG_SIZE(id) (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) 30#define KVM_ARM_SVC_sp svc_regs[0] 31#define KVM_ARM_SVC_lr svc_regs[1] 32#define KVM_ARM_SVC_spsr svc_regs[2] 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#define KVM_ARM_ABT_sp abt_regs[0] 35#define KVM_ARM_ABT_lr abt_regs[1] 36#define KVM_ARM_ABT_spsr abt_regs[2] 37#define KVM_ARM_UND_sp und_regs[0] 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39#define KVM_ARM_UND_lr und_regs[1] 40#define KVM_ARM_UND_spsr und_regs[2] 41#define KVM_ARM_IRQ_sp irq_regs[0] 42#define KVM_ARM_IRQ_lr irq_regs[1] 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44#define KVM_ARM_IRQ_spsr irq_regs[2] 45#define KVM_ARM_FIQ_r8 fiq_regs[0] 46#define KVM_ARM_FIQ_r9 fiq_regs[1] 47#define KVM_ARM_FIQ_r10 fiq_regs[2] 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49#define KVM_ARM_FIQ_fp fiq_regs[3] 50#define KVM_ARM_FIQ_ip fiq_regs[4] 51#define KVM_ARM_FIQ_sp fiq_regs[5] 52#define KVM_ARM_FIQ_lr fiq_regs[6] 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54#define KVM_ARM_FIQ_spsr fiq_regs[7] 55struct kvm_regs { 56 struct pt_regs usr_regs; 57 unsigned long svc_regs[3]; 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 unsigned long abt_regs[3]; 60 unsigned long und_regs[3]; 61 unsigned long irq_regs[3]; 62 unsigned long fiq_regs[8]; 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64}; 65#define KVM_ARM_TARGET_CORTEX_A15 0 66#define KVM_ARM_TARGET_CORTEX_A7 1 67#define KVM_ARM_NUM_TARGETS 2 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69#define KVM_ARM_DEVICE_TYPE_SHIFT 0 70#define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT) 71#define KVM_ARM_DEVICE_ID_SHIFT 16 72#define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT) 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74#define KVM_ARM_DEVICE_VGIC_V2 0 75#define KVM_VGIC_V2_ADDR_TYPE_DIST 0 76#define KVM_VGIC_V2_ADDR_TYPE_CPU 1 77#define KVM_VGIC_V2_DIST_SIZE 0x1000 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79#define KVM_VGIC_V2_CPU_SIZE 0x2000 80#define KVM_VGIC_V3_ADDR_TYPE_DIST 2 81#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3 82#define KVM_VGIC_V3_DIST_SIZE SZ_64K 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84#define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K) 85#define KVM_ARM_VCPU_POWER_OFF 0 86#define KVM_ARM_VCPU_PSCI_0_2 1 87struct kvm_vcpu_init { 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 __u32 target; 90 __u32 features[7]; 91}; 92struct kvm_sregs { 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94}; 95struct kvm_fpu { 96}; 97struct kvm_guest_debug_arch { 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99}; 100struct kvm_debug_exit_arch { 101}; 102struct kvm_sync_regs { 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104}; 105struct kvm_arch_memory_slot { 106}; 107#define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109#define KVM_REG_ARM_COPROC_SHIFT 16 110#define KVM_REG_ARM_32_OPC2_MASK 0x0000000000000007 111#define KVM_REG_ARM_32_OPC2_SHIFT 0 112#define KVM_REG_ARM_OPC1_MASK 0x0000000000000078 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114#define KVM_REG_ARM_OPC1_SHIFT 3 115#define KVM_REG_ARM_CRM_MASK 0x0000000000000780 116#define KVM_REG_ARM_CRM_SHIFT 7 117#define KVM_REG_ARM_32_CRN_MASK 0x0000000000007800 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119#define KVM_REG_ARM_32_CRN_SHIFT 11 120#define ARM_CP15_REG_SHIFT_MASK(x,n) (((x) << KVM_REG_ARM_ ##n ##_SHIFT) & KVM_REG_ARM_ ##n ##_MASK) 121#define __ARM_CP15_REG(op1,crn,crm,op2) (KVM_REG_ARM | (15 << KVM_REG_ARM_COPROC_SHIFT) | ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | ARM_CP15_REG_SHIFT_MASK(crn, 32_CRN) | ARM_CP15_REG_SHIFT_MASK(crm, CRM) | ARM_CP15_REG_SHIFT_MASK(op2, 32_OPC2)) 122#define ARM_CP15_REG32(...) (__ARM_CP15_REG(__VA_ARGS__) | KVM_REG_SIZE_U32) 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124#define __ARM_CP15_REG64(op1,crm) (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64) 125#define ARM_CP15_REG64(...) __ARM_CP15_REG64(__VA_ARGS__) 126#define KVM_REG_ARM_TIMER_CTL ARM_CP15_REG32(0, 14, 3, 1) 127#define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14) 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129#define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14) 130#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT) 131#define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / 4) 132#define KVM_REG_ARM_DEMUX (0x0011 << KVM_REG_ARM_COPROC_SHIFT) 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134#define KVM_REG_ARM_DEMUX_ID_MASK 0x000000000000FF00 135#define KVM_REG_ARM_DEMUX_ID_SHIFT 8 136#define KVM_REG_ARM_DEMUX_ID_CCSIDR (0x00 << KVM_REG_ARM_DEMUX_ID_SHIFT) 137#define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139#define KVM_REG_ARM_DEMUX_VAL_SHIFT 0 140#define KVM_REG_ARM_VFP (0x0012 << KVM_REG_ARM_COPROC_SHIFT) 141#define KVM_REG_ARM_VFP_MASK 0x000000000000FFFF 142#define KVM_REG_ARM_VFP_BASE_REG 0x0 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144#define KVM_REG_ARM_VFP_FPSID 0x1000 145#define KVM_REG_ARM_VFP_FPSCR 0x1001 146#define KVM_REG_ARM_VFP_MVFR1 0x1006 147#define KVM_REG_ARM_VFP_MVFR0 0x1007 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149#define KVM_REG_ARM_VFP_FPEXC 0x1008 150#define KVM_REG_ARM_VFP_FPINST 0x1009 151#define KVM_REG_ARM_VFP_FPINST2 0x100A 152#define KVM_DEV_ARM_VGIC_GRP_ADDR 0 153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1 155#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2 156#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32 157#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT) 158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0 160#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT) 161#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3 162#define KVM_DEV_ARM_VGIC_GRP_CTRL 4 163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 165#define KVM_ARM_IRQ_TYPE_SHIFT 24 166#define KVM_ARM_IRQ_TYPE_MASK 0xff 167#define KVM_ARM_IRQ_VCPU_SHIFT 16 168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169#define KVM_ARM_IRQ_VCPU_MASK 0xff 170#define KVM_ARM_IRQ_NUM_SHIFT 0 171#define KVM_ARM_IRQ_NUM_MASK 0xffff 172#define KVM_ARM_IRQ_TYPE_CPU 0 173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174#define KVM_ARM_IRQ_TYPE_SPI 1 175#define KVM_ARM_IRQ_TYPE_PPI 2 176#define KVM_ARM_IRQ_CPU_IRQ 0 177#define KVM_ARM_IRQ_CPU_FIQ 1 178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179#define KVM_ARM_IRQ_GIC_MAX 127 180#define KVM_NR_IRQCHIPS 1 181#define KVM_PSCI_FN_BASE 0x95c1ba5e 182#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n)) 183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184#define KVM_PSCI_FN_CPU_SUSPEND KVM_PSCI_FN(0) 185#define KVM_PSCI_FN_CPU_OFF KVM_PSCI_FN(1) 186#define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2) 187#define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3) 188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189#define KVM_PSCI_RET_SUCCESS PSCI_RET_SUCCESS 190#define KVM_PSCI_RET_NI PSCI_RET_NOT_SUPPORTED 191#define KVM_PSCI_RET_INVAL PSCI_RET_INVALID_PARAMS 192#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED 193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194#endif 195