kvm.h revision ba8d4f460b51161eb82cf1006cb34a3cc1389f47 
1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __ARM_KVM_H__
20#define __ARM_KVM_H__
21#include <linux/types.h>
22#include <linux/psci.h>
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#include <asm/ptrace.h>
25#define __KVM_HAVE_GUEST_DEBUG
26#define __KVM_HAVE_IRQ_LINE
27#define KVM_REG_SIZE(id)   (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define KVM_ARM_SVC_sp svc_regs[0]
30#define KVM_ARM_SVC_lr svc_regs[1]
31#define KVM_ARM_SVC_spsr svc_regs[2]
32#define KVM_ARM_ABT_sp abt_regs[0]
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define KVM_ARM_ABT_lr abt_regs[1]
35#define KVM_ARM_ABT_spsr abt_regs[2]
36#define KVM_ARM_UND_sp und_regs[0]
37#define KVM_ARM_UND_lr und_regs[1]
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define KVM_ARM_UND_spsr und_regs[2]
40#define KVM_ARM_IRQ_sp irq_regs[0]
41#define KVM_ARM_IRQ_lr irq_regs[1]
42#define KVM_ARM_IRQ_spsr irq_regs[2]
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define KVM_ARM_FIQ_r8 fiq_regs[0]
45#define KVM_ARM_FIQ_r9 fiq_regs[1]
46#define KVM_ARM_FIQ_r10 fiq_regs[2]
47#define KVM_ARM_FIQ_fp fiq_regs[3]
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#define KVM_ARM_FIQ_ip fiq_regs[4]
50#define KVM_ARM_FIQ_sp fiq_regs[5]
51#define KVM_ARM_FIQ_lr fiq_regs[6]
52#define KVM_ARM_FIQ_spsr fiq_regs[7]
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54struct kvm_regs {
55 struct pt_regs usr_regs;
56 unsigned long svc_regs[3];
57 unsigned long abt_regs[3];
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59 unsigned long und_regs[3];
60 unsigned long irq_regs[3];
61 unsigned long fiq_regs[8];
62};
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64#define KVM_ARM_TARGET_CORTEX_A15 0
65#define KVM_ARM_TARGET_CORTEX_A7 1
66#define KVM_ARM_NUM_TARGETS 2
67#define KVM_ARM_DEVICE_TYPE_SHIFT 0
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69#define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT)
70#define KVM_ARM_DEVICE_ID_SHIFT 16
71#define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT)
72#define KVM_ARM_DEVICE_VGIC_V2 0
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74#define KVM_VGIC_V2_ADDR_TYPE_DIST 0
75#define KVM_VGIC_V2_ADDR_TYPE_CPU 1
76#define KVM_VGIC_V2_DIST_SIZE 0x1000
77#define KVM_VGIC_V2_CPU_SIZE 0x2000
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79#define KVM_ARM_VCPU_POWER_OFF 0
80#define KVM_ARM_VCPU_PSCI_0_2 1
81struct kvm_vcpu_init {
82 __u32 target;
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84 __u32 features[7];
85};
86struct kvm_sregs {
87};
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89struct kvm_fpu {
90};
91struct kvm_guest_debug_arch {
92};
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94struct kvm_debug_exit_arch {
95};
96struct kvm_sync_regs {
97};
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99struct kvm_arch_memory_slot {
100};
101#define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000
102#define KVM_REG_ARM_COPROC_SHIFT 16
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104#define KVM_REG_ARM_32_OPC2_MASK 0x0000000000000007
105#define KVM_REG_ARM_32_OPC2_SHIFT 0
106#define KVM_REG_ARM_OPC1_MASK 0x0000000000000078
107#define KVM_REG_ARM_OPC1_SHIFT 3
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109#define KVM_REG_ARM_CRM_MASK 0x0000000000000780
110#define KVM_REG_ARM_CRM_SHIFT 7
111#define KVM_REG_ARM_32_CRN_MASK 0x0000000000007800
112#define KVM_REG_ARM_32_CRN_SHIFT 11
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114#define ARM_CP15_REG_SHIFT_MASK(x,n)   (((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK)
115#define __ARM_CP15_REG(op1,crn,crm,op2)   (KVM_REG_ARM | (15 << KVM_REG_ARM_COPROC_SHIFT) |   ARM_CP15_REG_SHIFT_MASK(op1, OPC1) |   ARM_CP15_REG_SHIFT_MASK(crn, 32_CRN) |   ARM_CP15_REG_SHIFT_MASK(crm, CRM) |   ARM_CP15_REG_SHIFT_MASK(op2, 32_OPC2))
116#define ARM_CP15_REG32(...) (__ARM_CP15_REG(__VA_ARGS__) | KVM_REG_SIZE_U32)
117#define __ARM_CP15_REG64(op1,crm)   (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64)
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119#define ARM_CP15_REG64(...) __ARM_CP15_REG64(__VA_ARGS__)
120#define KVM_REG_ARM_TIMER_CTL ARM_CP15_REG32(0, 14, 3, 1)
121#define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14)
122#define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14)
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT)
125#define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / 4)
126#define KVM_REG_ARM_DEMUX (0x0011 << KVM_REG_ARM_COPROC_SHIFT)
127#define KVM_REG_ARM_DEMUX_ID_MASK 0x000000000000FF00
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129#define KVM_REG_ARM_DEMUX_ID_SHIFT 8
130#define KVM_REG_ARM_DEMUX_ID_CCSIDR (0x00 << KVM_REG_ARM_DEMUX_ID_SHIFT)
131#define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF
132#define KVM_REG_ARM_DEMUX_VAL_SHIFT 0
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134#define KVM_REG_ARM_VFP (0x0012 << KVM_REG_ARM_COPROC_SHIFT)
135#define KVM_REG_ARM_VFP_MASK 0x000000000000FFFF
136#define KVM_REG_ARM_VFP_BASE_REG 0x0
137#define KVM_REG_ARM_VFP_FPSID 0x1000
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139#define KVM_REG_ARM_VFP_FPSCR 0x1001
140#define KVM_REG_ARM_VFP_MVFR1 0x1006
141#define KVM_REG_ARM_VFP_MVFR0 0x1007
142#define KVM_REG_ARM_VFP_FPEXC 0x1008
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144#define KVM_REG_ARM_VFP_FPINST 0x1009
145#define KVM_REG_ARM_VFP_FPINST2 0x100A
146#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
147#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2
150#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32
151#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
152#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
155#define KVM_ARM_IRQ_TYPE_SHIFT 24
156#define KVM_ARM_IRQ_TYPE_MASK 0xff
157#define KVM_ARM_IRQ_VCPU_SHIFT 16
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159#define KVM_ARM_IRQ_VCPU_MASK 0xff
160#define KVM_ARM_IRQ_NUM_SHIFT 0
161#define KVM_ARM_IRQ_NUM_MASK 0xffff
162#define KVM_ARM_IRQ_TYPE_CPU 0
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164#define KVM_ARM_IRQ_TYPE_SPI 1
165#define KVM_ARM_IRQ_TYPE_PPI 2
166#define KVM_ARM_IRQ_CPU_IRQ 0
167#define KVM_ARM_IRQ_CPU_FIQ 1
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169#define KVM_ARM_IRQ_GIC_MAX 127
170#define KVM_PSCI_FN_BASE 0x95c1ba5e
171#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n))
172#define KVM_PSCI_FN_CPU_SUSPEND KVM_PSCI_FN(0)
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174#define KVM_PSCI_FN_CPU_OFF KVM_PSCI_FN(1)
175#define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2)
176#define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3)
177#define KVM_PSCI_RET_SUCCESS PSCI_RET_SUCCESS
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179#define KVM_PSCI_RET_NI PSCI_RET_NOT_SUPPORTED
180#define KVM_PSCI_RET_INVAL PSCI_RET_INVALID_PARAMS
181#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED
182#endif
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184