kvm.h revision 49f525c47bd383cd6a87db8f067cddb3ab620d17
1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef __ARM_KVM_H__ 20#define __ARM_KVM_H__ 21#define KVM_SPSR_EL1 0 22#define KVM_SPSR_SVC KVM_SPSR_EL1 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#define KVM_SPSR_ABT 1 25#define KVM_SPSR_UND 2 26#define KVM_SPSR_IRQ 3 27#define KVM_SPSR_FIQ 4 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define KVM_NR_SPSR 5 30#ifndef __ASSEMBLY__ 31#include <linux/psci.h> 32#include <linux/types.h> 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#include <asm/ptrace.h> 35#define __KVM_HAVE_GUEST_DEBUG 36#define __KVM_HAVE_IRQ_LINE 37#define __KVM_HAVE_READONLY_MEM 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39#define KVM_REG_SIZE(id) (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) 40struct kvm_regs { 41 struct user_pt_regs regs; 42 __u64 sp_el1; 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 __u64 elr_el1; 45 __u64 spsr[KVM_NR_SPSR]; 46 struct user_fpsimd_state fp_regs; 47}; 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49#define KVM_ARM_TARGET_AEM_V8 0 50#define KVM_ARM_TARGET_FOUNDATION_V8 1 51#define KVM_ARM_TARGET_CORTEX_A57 2 52#define KVM_ARM_TARGET_XGENE_POTENZA 3 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54#define KVM_ARM_TARGET_CORTEX_A53 4 55#define KVM_ARM_TARGET_GENERIC_V8 5 56#define KVM_ARM_NUM_TARGETS 6 57#define KVM_ARM_DEVICE_TYPE_SHIFT 0 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59#define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT) 60#define KVM_ARM_DEVICE_ID_SHIFT 16 61#define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT) 62#define KVM_ARM_DEVICE_VGIC_V2 0 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64#define KVM_VGIC_V2_ADDR_TYPE_DIST 0 65#define KVM_VGIC_V2_ADDR_TYPE_CPU 1 66#define KVM_VGIC_V2_DIST_SIZE 0x1000 67#define KVM_VGIC_V2_CPU_SIZE 0x2000 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69#define KVM_VGIC_V3_ADDR_TYPE_DIST 2 70#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3 71#define KVM_VGIC_ITS_ADDR_TYPE 4 72#define KVM_VGIC_V3_DIST_SIZE SZ_64K 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74#define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K) 75#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K) 76#define KVM_ARM_VCPU_POWER_OFF 0 77#define KVM_ARM_VCPU_EL1_32BIT 1 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79#define KVM_ARM_VCPU_PSCI_0_2 2 80#define KVM_ARM_VCPU_PMU_V3 3 81struct kvm_vcpu_init { 82 __u32 target; 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 __u32 features[7]; 85}; 86struct kvm_sregs { 87}; 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89struct kvm_fpu { 90}; 91#define KVM_ARM_MAX_DBG_REGS 16 92struct kvm_guest_debug_arch { 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 __u64 dbg_bcr[KVM_ARM_MAX_DBG_REGS]; 95 __u64 dbg_bvr[KVM_ARM_MAX_DBG_REGS]; 96 __u64 dbg_wcr[KVM_ARM_MAX_DBG_REGS]; 97 __u64 dbg_wvr[KVM_ARM_MAX_DBG_REGS]; 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99}; 100struct kvm_debug_exit_arch { 101 __u32 hsr; 102 __u64 far; 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104}; 105#define KVM_GUESTDBG_USE_SW_BP (1 << 16) 106#define KVM_GUESTDBG_USE_HW (1 << 17) 107struct kvm_sync_regs { 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109}; 110struct kvm_arch_memory_slot { 111}; 112#define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114#define KVM_REG_ARM_COPROC_SHIFT 16 115#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT) 116#define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / sizeof(__u32)) 117#define KVM_REG_ARM_DEMUX (0x0011 << KVM_REG_ARM_COPROC_SHIFT) 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119#define KVM_REG_ARM_DEMUX_ID_MASK 0x000000000000FF00 120#define KVM_REG_ARM_DEMUX_ID_SHIFT 8 121#define KVM_REG_ARM_DEMUX_ID_CCSIDR (0x00 << KVM_REG_ARM_DEMUX_ID_SHIFT) 122#define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124#define KVM_REG_ARM_DEMUX_VAL_SHIFT 0 125#define KVM_REG_ARM64_SYSREG (0x0013 << KVM_REG_ARM_COPROC_SHIFT) 126#define KVM_REG_ARM64_SYSREG_OP0_MASK 0x000000000000c000 127#define KVM_REG_ARM64_SYSREG_OP0_SHIFT 14 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129#define KVM_REG_ARM64_SYSREG_OP1_MASK 0x0000000000003800 130#define KVM_REG_ARM64_SYSREG_OP1_SHIFT 11 131#define KVM_REG_ARM64_SYSREG_CRN_MASK 0x0000000000000780 132#define KVM_REG_ARM64_SYSREG_CRN_SHIFT 7 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134#define KVM_REG_ARM64_SYSREG_CRM_MASK 0x0000000000000078 135#define KVM_REG_ARM64_SYSREG_CRM_SHIFT 3 136#define KVM_REG_ARM64_SYSREG_OP2_MASK 0x0000000000000007 137#define KVM_REG_ARM64_SYSREG_OP2_SHIFT 0 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139#define ARM64_SYS_REG_SHIFT_MASK(x,n) (((x) << KVM_REG_ARM64_SYSREG_ ##n ##_SHIFT) & KVM_REG_ARM64_SYSREG_ ##n ##_MASK) 140#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) (KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG | ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | ARM64_SYS_REG_SHIFT_MASK(op2, OP2)) 141#define ARM64_SYS_REG(...) (__ARM64_SYS_REG(__VA_ARGS__) | KVM_REG_SIZE_U64) 142#define KVM_REG_ARM_TIMER_CTL ARM64_SYS_REG(3, 3, 14, 3, 1) 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144#define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2) 145#define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2) 146#define KVM_DEV_ARM_VGIC_GRP_ADDR 0 147#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2 150#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32 151#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT) 152#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0 153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT) 155#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3 156#define KVM_DEV_ARM_VGIC_GRP_CTRL 4 157#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159#define KVM_ARM_VCPU_PMU_V3_CTRL 0 160#define KVM_ARM_VCPU_PMU_V3_IRQ 0 161#define KVM_ARM_VCPU_PMU_V3_INIT 1 162#define KVM_ARM_IRQ_TYPE_SHIFT 24 163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164#define KVM_ARM_IRQ_TYPE_MASK 0xff 165#define KVM_ARM_IRQ_VCPU_SHIFT 16 166#define KVM_ARM_IRQ_VCPU_MASK 0xff 167#define KVM_ARM_IRQ_NUM_SHIFT 0 168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169#define KVM_ARM_IRQ_NUM_MASK 0xffff 170#define KVM_ARM_IRQ_TYPE_CPU 0 171#define KVM_ARM_IRQ_TYPE_SPI 1 172#define KVM_ARM_IRQ_TYPE_PPI 2 173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174#define KVM_ARM_IRQ_CPU_IRQ 0 175#define KVM_ARM_IRQ_CPU_FIQ 1 176#define KVM_ARM_IRQ_GIC_MAX 127 177#define KVM_NR_IRQCHIPS 1 178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179#define KVM_PSCI_FN_BASE 0x95c1ba5e 180#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n)) 181#define KVM_PSCI_FN_CPU_SUSPEND KVM_PSCI_FN(0) 182#define KVM_PSCI_FN_CPU_OFF KVM_PSCI_FN(1) 183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184#define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2) 185#define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3) 186#define KVM_PSCI_RET_SUCCESS PSCI_RET_SUCCESS 187#define KVM_PSCI_RET_NI PSCI_RET_NOT_SUPPORTED 188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189#define KVM_PSCI_RET_INVAL PSCI_RET_INVALID_PARAMS 190#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED 191#endif 192#endif 193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194