inst.h revision 96c1db7b9d601c31d103389cac074a6cce0d7633 
1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI_ASM_INST_H
20#define _UAPI_ASM_INST_H
21#include <asm/bitfield.h>
22enum major_op {
23  spec_op,
24  bcond_op,
25  j_op,
26  jal_op,
27  beq_op,
28  bne_op,
29  blez_op,
30  bgtz_op,
31  addi_op,
32  pop10_op = addi_op,
33  addiu_op,
34  slti_op,
35  sltiu_op,
36  andi_op,
37  ori_op,
38  xori_op,
39  lui_op,
40  cop0_op,
41  cop1_op,
42  cop2_op,
43  cop1x_op,
44  beql_op,
45  bnel_op,
46  blezl_op,
47  bgtzl_op,
48  daddi_op,
49  pop30_op = daddi_op,
50  daddiu_op,
51  ldl_op,
52  ldr_op,
53  spec2_op,
54  jalx_op,
55  mdmx_op,
56  msa_op = mdmx_op,
57  spec3_op,
58  lb_op,
59  lh_op,
60  lwl_op,
61  lw_op,
62  lbu_op,
63  lhu_op,
64  lwr_op,
65  lwu_op,
66  sb_op,
67  sh_op,
68  swl_op,
69  sw_op,
70  sdl_op,
71  sdr_op,
72  swr_op,
73  cache_op,
74  ll_op,
75  lwc1_op,
76  lwc2_op,
77  bc6_op = lwc2_op,
78  pref_op,
79  lld_op,
80  ldc1_op,
81  ldc2_op,
82  pop66_op = ldc2_op,
83  ld_op,
84  sc_op,
85  swc1_op,
86  swc2_op,
87  balc6_op = swc2_op,
88  major_3b_op,
89  scd_op,
90  sdc1_op,
91  sdc2_op,
92  pop76_op = sdc2_op,
93  sd_op
94};
95enum spec_op {
96  sll_op,
97  movc_op,
98  srl_op,
99  sra_op,
100  sllv_op,
101  pmon_op,
102  srlv_op,
103  srav_op,
104  jr_op,
105  jalr_op,
106  movz_op,
107  movn_op,
108  syscall_op,
109  break_op,
110  spim_op,
111  sync_op,
112  mfhi_op,
113  mthi_op,
114  mflo_op,
115  mtlo_op,
116  dsllv_op,
117  spec2_unused_op,
118  dsrlv_op,
119  dsrav_op,
120  mult_op,
121  multu_op,
122  div_op,
123  divu_op,
124  dmult_op,
125  dmultu_op,
126  ddiv_op,
127  ddivu_op,
128  add_op,
129  addu_op,
130  sub_op,
131  subu_op,
132  and_op,
133  or_op,
134  xor_op,
135  nor_op,
136  spec3_unused_op,
137  spec4_unused_op,
138  slt_op,
139  sltu_op,
140  dadd_op,
141  daddu_op,
142  dsub_op,
143  dsubu_op,
144  tge_op,
145  tgeu_op,
146  tlt_op,
147  tltu_op,
148  teq_op,
149  spec5_unused_op,
150  tne_op,
151  spec6_unused_op,
152  dsll_op,
153  spec7_unused_op,
154  dsrl_op,
155  dsra_op,
156  dsll32_op,
157  spec8_unused_op,
158  dsrl32_op,
159  dsra32_op
160};
161enum spec2_op {
162  madd_op,
163  maddu_op,
164  mul_op,
165  spec2_3_unused_op,
166  msub_op,
167  msubu_op,
168  clz_op = 0x20,
169  clo_op,
170  dclz_op = 0x24,
171  dclo_op,
172  sdbpp_op = 0x3f
173};
174enum spec3_op {
175  ext_op,
176  dextm_op,
177  dextu_op,
178  dext_op,
179  ins_op,
180  dinsm_op,
181  dinsu_op,
182  dins_op,
183  yield_op = 0x09,
184  lx_op = 0x0a,
185  lwle_op = 0x19,
186  lwre_op = 0x1a,
187  cachee_op = 0x1b,
188  sbe_op = 0x1c,
189  she_op = 0x1d,
190  sce_op = 0x1e,
191  swe_op = 0x1f,
192  bshfl_op = 0x20,
193  swle_op = 0x21,
194  swre_op = 0x22,
195  prefe_op = 0x23,
196  dbshfl_op = 0x24,
197  cache6_op = 0x25,
198  sc6_op = 0x26,
199  scd6_op = 0x27,
200  lbue_op = 0x28,
201  lhue_op = 0x29,
202  lbe_op = 0x2c,
203  lhe_op = 0x2d,
204  lle_op = 0x2e,
205  lwe_op = 0x2f,
206  pref6_op = 0x35,
207  ll6_op = 0x36,
208  lld6_op = 0x37,
209  rdhwr_op = 0x3b
210};
211enum mult_op {
212  mult_mult_op = 0x0,
213  mult_mul_op = 0x2,
214  mult_muh_op = 0x3,
215};
216enum multu_op {
217  multu_multu_op = 0x0,
218  multu_mulu_op = 0x2,
219  multu_muhu_op = 0x3,
220};
221enum div_op {
222  div_div_op = 0x0,
223  div_div6_op = 0x2,
224  div_mod_op = 0x3,
225};
226enum divu_op {
227  divu_divu_op = 0x0,
228  divu_divu6_op = 0x2,
229  divu_modu_op = 0x3,
230};
231enum dmult_op {
232  dmult_dmult_op = 0x0,
233  dmult_dmul_op = 0x2,
234  dmult_dmuh_op = 0x3,
235};
236enum dmultu_op {
237  dmultu_dmultu_op = 0x0,
238  dmultu_dmulu_op = 0x2,
239  dmultu_dmuhu_op = 0x3,
240};
241enum ddiv_op {
242  ddiv_ddiv_op = 0x0,
243  ddiv_ddiv6_op = 0x2,
244  ddiv_dmod_op = 0x3,
245};
246enum ddivu_op {
247  ddivu_ddivu_op = 0x0,
248  ddivu_ddivu6_op = 0x2,
249  ddivu_dmodu_op = 0x3,
250};
251enum rt_op {
252  bltz_op,
253  bgez_op,
254  bltzl_op,
255  bgezl_op,
256  spimi_op,
257  unused_rt_op_0x05,
258  unused_rt_op_0x06,
259  unused_rt_op_0x07,
260  tgei_op,
261  tgeiu_op,
262  tlti_op,
263  tltiu_op,
264  teqi_op,
265  unused_0x0d_rt_op,
266  tnei_op,
267  unused_0x0f_rt_op,
268  bltzal_op,
269  bgezal_op,
270  bltzall_op,
271  bgezall_op,
272  rt_op_0x14,
273  rt_op_0x15,
274  rt_op_0x16,
275  rt_op_0x17,
276  rt_op_0x18,
277  rt_op_0x19,
278  rt_op_0x1a,
279  rt_op_0x1b,
280  bposge32_op,
281  rt_op_0x1d,
282  rt_op_0x1e,
283  synci_op
284};
285enum cop_op {
286  mfc_op = 0x00,
287  dmfc_op = 0x01,
288  cfc_op = 0x02,
289  mfhc0_op = 0x02,
290  mfhc_op = 0x03,
291  mtc_op = 0x04,
292  dmtc_op = 0x05,
293  ctc_op = 0x06,
294  mthc0_op = 0x06,
295  mthc_op = 0x07,
296  bc_op = 0x08,
297  bc1eqz_op = 0x09,
298  mfmc0_op = 0x0b,
299  bc1nez_op = 0x0d,
300  wrpgpr_op = 0x0e,
301  cop_op = 0x10,
302  copm_op = 0x18
303};
304enum bcop_op {
305  bcf_op,
306  bct_op,
307  bcfl_op,
308  bctl_op
309};
310enum cop0_coi_func {
311  tlbr_op = 0x01,
312  tlbwi_op = 0x02,
313  tlbwr_op = 0x06,
314  tlbp_op = 0x08,
315  rfe_op = 0x10,
316  eret_op = 0x18,
317  wait_op = 0x20,
318};
319enum cop0_com_func {
320  tlbr1_op = 0x01,
321  tlbw_op = 0x02,
322  tlbp1_op = 0x08,
323  dctr_op = 0x09,
324  dctw_op = 0x0a
325};
326enum cop1_fmt {
327  s_fmt,
328  d_fmt,
329  e_fmt,
330  q_fmt,
331  w_fmt,
332  l_fmt
333};
334enum cop1_sdw_func {
335  fadd_op = 0x00,
336  fsub_op = 0x01,
337  fmul_op = 0x02,
338  fdiv_op = 0x03,
339  fsqrt_op = 0x04,
340  fabs_op = 0x05,
341  fmov_op = 0x06,
342  fneg_op = 0x07,
343  froundl_op = 0x08,
344  ftruncl_op = 0x09,
345  fceill_op = 0x0a,
346  ffloorl_op = 0x0b,
347  fround_op = 0x0c,
348  ftrunc_op = 0x0d,
349  fceil_op = 0x0e,
350  ffloor_op = 0x0f,
351  fsel_op = 0x10,
352  fmovc_op = 0x11,
353  fmovz_op = 0x12,
354  fmovn_op = 0x13,
355  fseleqz_op = 0x14,
356  frecip_op = 0x15,
357  frsqrt_op = 0x16,
358  fselnez_op = 0x17,
359  fmaddf_op = 0x18,
360  fmsubf_op = 0x19,
361  frint_op = 0x1a,
362  fclass_op = 0x1b,
363  fmin_op = 0x1c,
364  fmina_op = 0x1d,
365  fmax_op = 0x1e,
366  fmaxa_op = 0x1f,
367  fcvts_op = 0x20,
368  fcvtd_op = 0x21,
369  fcvte_op = 0x22,
370  fcvtw_op = 0x24,
371  fcvtl_op = 0x25,
372  fcmp_op = 0x30
373};
374enum cop1x_func {
375  lwxc1_op = 0x00,
376  ldxc1_op = 0x01,
377  swxc1_op = 0x08,
378  sdxc1_op = 0x09,
379  pfetch_op = 0x0f,
380  madd_s_op = 0x20,
381  madd_d_op = 0x21,
382  madd_e_op = 0x22,
383  msub_s_op = 0x28,
384  msub_d_op = 0x29,
385  msub_e_op = 0x2a,
386  nmadd_s_op = 0x30,
387  nmadd_d_op = 0x31,
388  nmadd_e_op = 0x32,
389  nmsub_s_op = 0x38,
390  nmsub_d_op = 0x39,
391  nmsub_e_op = 0x3a
392};
393enum mad_func {
394  madd_fp_op = 0x08,
395  msub_fp_op = 0x0a,
396  nmadd_fp_op = 0x0c,
397  nmsub_fp_op = 0x0e
398};
399enum ptw_func {
400  lwdir_op = 0x00,
401  lwpte_op = 0x01,
402  lddir_op = 0x02,
403  ldpte_op = 0x03,
404};
405enum lx_func {
406  lwx_op = 0x00,
407  lhx_op = 0x04,
408  lbux_op = 0x06,
409  ldx_op = 0x08,
410  lwux_op = 0x10,
411  lhux_op = 0x14,
412  lbx_op = 0x16,
413};
414enum bshfl_func {
415  wsbh_op = 0x2,
416  dshd_op = 0x5,
417  seb_op = 0x10,
418  seh_op = 0x18,
419};
420enum msa_func {
421  msa_elm_op = 0x19,
422};
423enum msa_elm {
424  msa_ctc_op = 0x3e,
425  msa_cfc_op = 0x7e,
426};
427enum msa_mi10_func {
428  msa_ld_op = 8,
429  msa_st_op = 9,
430};
431enum msa_2b_fmt {
432  msa_fmt_b = 0,
433  msa_fmt_h = 1,
434  msa_fmt_w = 2,
435  msa_fmt_d = 3,
436};
437enum mm_major_op {
438  mm_pool32a_op,
439  mm_pool16a_op,
440  mm_lbu16_op,
441  mm_move16_op,
442  mm_addi32_op,
443  mm_lbu32_op,
444  mm_sb32_op,
445  mm_lb32_op,
446  mm_pool32b_op,
447  mm_pool16b_op,
448  mm_lhu16_op,
449  mm_andi16_op,
450  mm_addiu32_op,
451  mm_lhu32_op,
452  mm_sh32_op,
453  mm_lh32_op,
454  mm_pool32i_op,
455  mm_pool16c_op,
456  mm_lwsp16_op,
457  mm_pool16d_op,
458  mm_ori32_op,
459  mm_pool32f_op,
460  mm_pool32s_op,
461  mm_reserved2_op,
462  mm_pool32c_op,
463  mm_lwgp16_op,
464  mm_lw16_op,
465  mm_pool16e_op,
466  mm_xori32_op,
467  mm_jals32_op,
468  mm_addiupc_op,
469  mm_reserved3_op,
470  mm_reserved4_op,
471  mm_pool16f_op,
472  mm_sb16_op,
473  mm_beqz16_op,
474  mm_slti32_op,
475  mm_beq32_op,
476  mm_swc132_op,
477  mm_lwc132_op,
478  mm_reserved5_op,
479  mm_reserved6_op,
480  mm_sh16_op,
481  mm_bnez16_op,
482  mm_sltiu32_op,
483  mm_bne32_op,
484  mm_sdc132_op,
485  mm_ldc132_op,
486  mm_reserved7_op,
487  mm_reserved8_op,
488  mm_swsp16_op,
489  mm_b16_op,
490  mm_andi32_op,
491  mm_j32_op,
492  mm_sd32_op,
493  mm_ld32_op,
494  mm_reserved11_op,
495  mm_reserved12_op,
496  mm_sw16_op,
497  mm_li16_op,
498  mm_jalx32_op,
499  mm_jal32_op,
500  mm_sw32_op,
501  mm_lw32_op,
502};
503enum mm_32i_minor_op {
504  mm_bltz_op,
505  mm_bltzal_op,
506  mm_bgez_op,
507  mm_bgezal_op,
508  mm_blez_op,
509  mm_bnezc_op,
510  mm_bgtz_op,
511  mm_beqzc_op,
512  mm_tlti_op,
513  mm_tgei_op,
514  mm_tltiu_op,
515  mm_tgeiu_op,
516  mm_tnei_op,
517  mm_lui_op,
518  mm_teqi_op,
519  mm_reserved13_op,
520  mm_synci_op,
521  mm_bltzals_op,
522  mm_reserved14_op,
523  mm_bgezals_op,
524  mm_bc2f_op,
525  mm_bc2t_op,
526  mm_reserved15_op,
527  mm_reserved16_op,
528  mm_reserved17_op,
529  mm_reserved18_op,
530  mm_bposge64_op,
531  mm_bposge32_op,
532  mm_bc1f_op,
533  mm_bc1t_op,
534  mm_reserved19_op,
535  mm_reserved20_op,
536  mm_bc1any2f_op,
537  mm_bc1any2t_op,
538  mm_bc1any4f_op,
539  mm_bc1any4t_op,
540};
541enum mm_32a_minor_op {
542  mm_sll32_op = 0x000,
543  mm_ins_op = 0x00c,
544  mm_sllv32_op = 0x010,
545  mm_ext_op = 0x02c,
546  mm_pool32axf_op = 0x03c,
547  mm_srl32_op = 0x040,
548  mm_sra_op = 0x080,
549  mm_srlv32_op = 0x090,
550  mm_rotr_op = 0x0c0,
551  mm_lwxs_op = 0x118,
552  mm_addu32_op = 0x150,
553  mm_subu32_op = 0x1d0,
554  mm_wsbh_op = 0x1ec,
555  mm_mul_op = 0x210,
556  mm_and_op = 0x250,
557  mm_or32_op = 0x290,
558  mm_xor32_op = 0x310,
559  mm_slt_op = 0x350,
560  mm_sltu_op = 0x390,
561};
562enum mm_32b_func {
563  mm_lwc2_func = 0x0,
564  mm_lwp_func = 0x1,
565  mm_ldc2_func = 0x2,
566  mm_ldp_func = 0x4,
567  mm_lwm32_func = 0x5,
568  mm_cache_func = 0x6,
569  mm_ldm_func = 0x7,
570  mm_swc2_func = 0x8,
571  mm_swp_func = 0x9,
572  mm_sdc2_func = 0xa,
573  mm_sdp_func = 0xc,
574  mm_swm32_func = 0xd,
575  mm_sdm_func = 0xf,
576};
577enum mm_32c_func {
578  mm_pref_func = 0x2,
579  mm_ll_func = 0x3,
580  mm_swr_func = 0x9,
581  mm_sc_func = 0xb,
582  mm_lwu_func = 0xe,
583};
584enum mm_32axf_minor_op {
585  mm_mfc0_op = 0x003,
586  mm_mtc0_op = 0x00b,
587  mm_tlbp_op = 0x00d,
588  mm_mfhi32_op = 0x035,
589  mm_jalr_op = 0x03c,
590  mm_tlbr_op = 0x04d,
591  mm_mflo32_op = 0x075,
592  mm_jalrhb_op = 0x07c,
593  mm_tlbwi_op = 0x08d,
594  mm_mthi32_op = 0x0b5,
595  mm_tlbwr_op = 0x0cd,
596  mm_mtlo32_op = 0x0f5,
597  mm_di_op = 0x11d,
598  mm_jalrs_op = 0x13c,
599  mm_jalrshb_op = 0x17c,
600  mm_sync_op = 0x1ad,
601  mm_syscall_op = 0x22d,
602  mm_wait_op = 0x24d,
603  mm_eret_op = 0x3cd,
604  mm_divu_op = 0x5dc,
605};
606enum mm_32f_minor_op {
607  mm_32f_00_op = 0x00,
608  mm_32f_01_op = 0x01,
609  mm_32f_02_op = 0x02,
610  mm_32f_10_op = 0x08,
611  mm_32f_11_op = 0x09,
612  mm_32f_12_op = 0x0a,
613  mm_32f_20_op = 0x10,
614  mm_32f_30_op = 0x18,
615  mm_32f_40_op = 0x20,
616  mm_32f_41_op = 0x21,
617  mm_32f_42_op = 0x22,
618  mm_32f_50_op = 0x28,
619  mm_32f_51_op = 0x29,
620  mm_32f_52_op = 0x2a,
621  mm_32f_60_op = 0x30,
622  mm_32f_70_op = 0x38,
623  mm_32f_73_op = 0x3b,
624  mm_32f_74_op = 0x3c,
625};
626enum mm_32f_10_minor_op {
627  mm_lwxc1_op = 0x1,
628  mm_swxc1_op,
629  mm_ldxc1_op,
630  mm_sdxc1_op,
631  mm_luxc1_op,
632  mm_suxc1_op,
633};
634enum mm_32f_func {
635  mm_lwxc1_func = 0x048,
636  mm_swxc1_func = 0x088,
637  mm_ldxc1_func = 0x0c8,
638  mm_sdxc1_func = 0x108,
639};
640enum mm_32f_40_minor_op {
641  mm_fmovf_op,
642  mm_fmovt_op,
643};
644enum mm_32f_60_minor_op {
645  mm_fadd_op,
646  mm_fsub_op,
647  mm_fmul_op,
648  mm_fdiv_op,
649};
650enum mm_32f_70_minor_op {
651  mm_fmovn_op,
652  mm_fmovz_op,
653};
654enum mm_32f_73_minor_op {
655  mm_fmov0_op = 0x01,
656  mm_fcvtl_op = 0x04,
657  mm_movf0_op = 0x05,
658  mm_frsqrt_op = 0x08,
659  mm_ffloorl_op = 0x0c,
660  mm_fabs0_op = 0x0d,
661  mm_fcvtw_op = 0x24,
662  mm_movt0_op = 0x25,
663  mm_fsqrt_op = 0x28,
664  mm_ffloorw_op = 0x2c,
665  mm_fneg0_op = 0x2d,
666  mm_cfc1_op = 0x40,
667  mm_frecip_op = 0x48,
668  mm_fceill_op = 0x4c,
669  mm_fcvtd0_op = 0x4d,
670  mm_ctc1_op = 0x60,
671  mm_fceilw_op = 0x6c,
672  mm_fcvts0_op = 0x6d,
673  mm_mfc1_op = 0x80,
674  mm_fmov1_op = 0x81,
675  mm_movf1_op = 0x85,
676  mm_ftruncl_op = 0x8c,
677  mm_fabs1_op = 0x8d,
678  mm_mtc1_op = 0xa0,
679  mm_movt1_op = 0xa5,
680  mm_ftruncw_op = 0xac,
681  mm_fneg1_op = 0xad,
682  mm_mfhc1_op = 0xc0,
683  mm_froundl_op = 0xcc,
684  mm_fcvtd1_op = 0xcd,
685  mm_mthc1_op = 0xe0,
686  mm_froundw_op = 0xec,
687  mm_fcvts1_op = 0xed,
688};
689enum mm_32s_minor_op {
690  mm_32s_elm_op = 0x16,
691};
692enum mm_16c_minor_op {
693  mm_lwm16_op = 0x04,
694  mm_swm16_op = 0x05,
695  mm_jr16_op = 0x0c,
696  mm_jrc_op = 0x0d,
697  mm_jalr16_op = 0x0e,
698  mm_jalrs16_op = 0x0f,
699  mm_jraddiusp_op = 0x18,
700};
701enum mm_16d_minor_op {
702  mm_addius5_func,
703  mm_addiusp_func,
704};
705enum MIPS16e_ops {
706  MIPS16e_jal_op = 003,
707  MIPS16e_ld_op = 007,
708  MIPS16e_i8_op = 014,
709  MIPS16e_sd_op = 017,
710  MIPS16e_lb_op = 020,
711  MIPS16e_lh_op = 021,
712  MIPS16e_lwsp_op = 022,
713  MIPS16e_lw_op = 023,
714  MIPS16e_lbu_op = 024,
715  MIPS16e_lhu_op = 025,
716  MIPS16e_lwpc_op = 026,
717  MIPS16e_lwu_op = 027,
718  MIPS16e_sb_op = 030,
719  MIPS16e_sh_op = 031,
720  MIPS16e_swsp_op = 032,
721  MIPS16e_sw_op = 033,
722  MIPS16e_rr_op = 035,
723  MIPS16e_extend_op = 036,
724  MIPS16e_i64_op = 037,
725};
726enum MIPS16e_i64_func {
727  MIPS16e_ldsp_func,
728  MIPS16e_sdsp_func,
729  MIPS16e_sdrasp_func,
730  MIPS16e_dadjsp_func,
731  MIPS16e_ldpc_func,
732};
733enum MIPS16e_rr_func {
734  MIPS16e_jr_func,
735};
736enum MIPS6e_i8_func {
737  MIPS16e_swrasp_func = 02,
738};
739#define MM_NOP16 0x0c00
740struct j_format {
741  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int target : 26,;
742 ))
743};
744struct i_format {
745  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(signed int simmediate : 16,;
746 ))))
747};
748struct u_format {
749  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int uimmediate : 16,;
750 ))))
751};
752struct c_format {
753  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(unsigned int c_op : 3, __BITFIELD_FIELD(unsigned int cache : 2, __BITFIELD_FIELD(unsigned int simmediate : 16,;
754 )))))
755};
756struct r_format {
757  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int rd : 5, __BITFIELD_FIELD(unsigned int re : 5, __BITFIELD_FIELD(unsigned int func : 6,;
758 ))))))
759};
760struct c0r_format {
761  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int rd : 5, __BITFIELD_FIELD(unsigned int z : 8, __BITFIELD_FIELD(unsigned int sel : 3,;
762 ))))))
763};
764struct mfmc0_format {
765  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int rd : 5, __BITFIELD_FIELD(unsigned int re : 5, __BITFIELD_FIELD(unsigned int sc : 1, __BITFIELD_FIELD(unsigned int : 2, __BITFIELD_FIELD(unsigned int sel : 3,;
766 ))))))))
767};
768struct co_format {
769  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int co : 1, __BITFIELD_FIELD(unsigned int code : 19, __BITFIELD_FIELD(unsigned int func : 6,;
770 ))))
771};
772struct p_format {
773  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int rd : 5, __BITFIELD_FIELD(unsigned int re : 5, __BITFIELD_FIELD(unsigned int func : 6,;
774 ))))))
775};
776struct f_format {
777  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int : 1, __BITFIELD_FIELD(unsigned int fmt : 4, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int rd : 5, __BITFIELD_FIELD(unsigned int re : 5, __BITFIELD_FIELD(unsigned int func : 6,;
778 )))))))
779};
780struct ma_format {
781  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int fr : 5, __BITFIELD_FIELD(unsigned int ft : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int fd : 5, __BITFIELD_FIELD(unsigned int func : 4, __BITFIELD_FIELD(unsigned int fmt : 2,;
782 )))))))
783};
784struct b_format {
785  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int code : 20, __BITFIELD_FIELD(unsigned int func : 6,;
786 )))
787};
788struct ps_format {
789  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(unsigned int ft : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int fd : 5, __BITFIELD_FIELD(unsigned int func : 6,;
790 ))))))
791};
792struct v_format {
793  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int sel : 4, __BITFIELD_FIELD(unsigned int fmt : 1, __BITFIELD_FIELD(unsigned int vt : 5, __BITFIELD_FIELD(unsigned int vs : 5, __BITFIELD_FIELD(unsigned int vd : 5, __BITFIELD_FIELD(unsigned int func : 6,;
794 )))))))
795};
796struct msa_mi10_format {
797  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(signed int s10 : 10, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(unsigned int wd : 5, __BITFIELD_FIELD(unsigned int func : 4, __BITFIELD_FIELD(unsigned int df : 2,;
798 ))))))
799};
800struct spec3_format {
801  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(signed int simmediate : 9, __BITFIELD_FIELD(unsigned int func : 7,;
802 )))))
803};
804struct fb_format {
805  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int bc : 5, __BITFIELD_FIELD(unsigned int cc : 3, __BITFIELD_FIELD(unsigned int flag : 2, __BITFIELD_FIELD(signed int simmediate : 16,;
806 )))))
807};
808struct fp0_format {
809  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int fmt : 5, __BITFIELD_FIELD(unsigned int ft : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int fd : 5, __BITFIELD_FIELD(unsigned int func : 6,;
810 ))))))
811};
812struct mm_fp0_format {
813  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int ft : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int fd : 5, __BITFIELD_FIELD(unsigned int fmt : 3, __BITFIELD_FIELD(unsigned int op : 2, __BITFIELD_FIELD(unsigned int func : 6,;
814 )))))))
815};
816struct fp1_format {
817  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int op : 5, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int fd : 5, __BITFIELD_FIELD(unsigned int func : 6,;
818 ))))))
819};
820struct mm_fp1_format {
821  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int fmt : 2, __BITFIELD_FIELD(unsigned int op : 8, __BITFIELD_FIELD(unsigned int func : 6,;
822 ))))))
823};
824struct mm_fp2_format {
825  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int fd : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int cc : 3, __BITFIELD_FIELD(unsigned int zero : 2, __BITFIELD_FIELD(unsigned int fmt : 2, __BITFIELD_FIELD(unsigned int op : 3, __BITFIELD_FIELD(unsigned int func : 6,;
826 ))))))))
827};
828struct mm_fp3_format {
829  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int fmt : 3, __BITFIELD_FIELD(unsigned int op : 7, __BITFIELD_FIELD(unsigned int func : 6,;
830 ))))))
831};
832struct mm_fp4_format {
833  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int cc : 3, __BITFIELD_FIELD(unsigned int fmt : 3, __BITFIELD_FIELD(unsigned int cond : 4, __BITFIELD_FIELD(unsigned int func : 6,;
834 )))))))
835};
836struct mm_fp5_format {
837  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int index : 5, __BITFIELD_FIELD(unsigned int base : 5, __BITFIELD_FIELD(unsigned int fd : 5, __BITFIELD_FIELD(unsigned int op : 5, __BITFIELD_FIELD(unsigned int func : 6,;
838 ))))))
839};
840struct fp6_format {
841  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int fr : 5, __BITFIELD_FIELD(unsigned int ft : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int fd : 5, __BITFIELD_FIELD(unsigned int func : 6,;
842 ))))))
843};
844struct mm_fp6_format {
845  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int ft : 5, __BITFIELD_FIELD(unsigned int fs : 5, __BITFIELD_FIELD(unsigned int fd : 5, __BITFIELD_FIELD(unsigned int fr : 5, __BITFIELD_FIELD(unsigned int func : 6,;
846 ))))))
847};
848struct mm_i_format {
849  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(unsigned int rs : 5, __BITFIELD_FIELD(signed int simmediate : 16,;
850 ))))
851};
852struct mm_m_format {
853  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rd : 5, __BITFIELD_FIELD(unsigned int base : 5, __BITFIELD_FIELD(unsigned int func : 4, __BITFIELD_FIELD(signed int simmediate : 12,;
854 )))))
855};
856struct mm_x_format {
857  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int index : 5, __BITFIELD_FIELD(unsigned int base : 5, __BITFIELD_FIELD(unsigned int rd : 5, __BITFIELD_FIELD(unsigned int func : 11,;
858 )))))
859};
860struct mm_a_format {
861  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 3, __BITFIELD_FIELD(signed int simmediate : 23,;
862 )))
863};
864struct mm_b0_format {
865  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(signed int simmediate : 10, __BITFIELD_FIELD(unsigned int : 16,;
866 )))
867};
868struct mm_b1_format {
869  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rs : 3, __BITFIELD_FIELD(signed int simmediate : 7, __BITFIELD_FIELD(unsigned int : 16,;
870 ))))
871};
872struct mm16_m_format {
873  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int func : 4, __BITFIELD_FIELD(unsigned int rlist : 2, __BITFIELD_FIELD(unsigned int imm : 4, __BITFIELD_FIELD(unsigned int : 16,;
874 )))))
875};
876struct mm16_rb_format {
877  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rt : 3, __BITFIELD_FIELD(unsigned int base : 3, __BITFIELD_FIELD(signed int simmediate : 4, __BITFIELD_FIELD(unsigned int : 16,;
878 )))))
879};
880struct mm16_r3_format {
881  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rt : 3, __BITFIELD_FIELD(signed int simmediate : 7, __BITFIELD_FIELD(unsigned int : 16,;
882 ))))
883};
884struct mm16_r5_format {
885  __BITFIELD_FIELD(unsigned int opcode : 6, __BITFIELD_FIELD(unsigned int rt : 5, __BITFIELD_FIELD(signed int simmediate : 5, __BITFIELD_FIELD(unsigned int : 16,;
886 ))))
887};
888struct m16e_rr {
889  __BITFIELD_FIELD(unsigned int opcode : 5, __BITFIELD_FIELD(unsigned int rx : 3, __BITFIELD_FIELD(unsigned int nd : 1, __BITFIELD_FIELD(unsigned int l : 1, __BITFIELD_FIELD(unsigned int ra : 1, __BITFIELD_FIELD(unsigned int func : 5,;
890 ))))))
891};
892struct m16e_jal {
893  __BITFIELD_FIELD(unsigned int opcode : 5, __BITFIELD_FIELD(unsigned int x : 1, __BITFIELD_FIELD(unsigned int imm20_16 : 5, __BITFIELD_FIELD(signed int imm25_21 : 5,;
894 ))))
895};
896struct m16e_i64 {
897  __BITFIELD_FIELD(unsigned int opcode : 5, __BITFIELD_FIELD(unsigned int func : 3, __BITFIELD_FIELD(unsigned int imm : 8,;
898 )))
899};
900struct m16e_ri64 {
901  __BITFIELD_FIELD(unsigned int opcode : 5, __BITFIELD_FIELD(unsigned int func : 3, __BITFIELD_FIELD(unsigned int ry : 3, __BITFIELD_FIELD(unsigned int imm : 5,;
902 ))))
903};
904struct m16e_ri {
905  __BITFIELD_FIELD(unsigned int opcode : 5, __BITFIELD_FIELD(unsigned int rx : 3, __BITFIELD_FIELD(unsigned int imm : 8,;
906 )))
907};
908struct m16e_rri {
909  __BITFIELD_FIELD(unsigned int opcode : 5, __BITFIELD_FIELD(unsigned int rx : 3, __BITFIELD_FIELD(unsigned int ry : 3, __BITFIELD_FIELD(unsigned int imm : 5,;
910 ))))
911};
912struct m16e_i8 {
913  __BITFIELD_FIELD(unsigned int opcode : 5, __BITFIELD_FIELD(unsigned int func : 3, __BITFIELD_FIELD(unsigned int imm : 8,;
914 )))
915};
916union mips_instruction {
917  unsigned int word;
918  unsigned short halfword[2];
919  unsigned char byte[4];
920  struct j_format j_format;
921  struct i_format i_format;
922  struct u_format u_format;
923  struct c_format c_format;
924  struct r_format r_format;
925  struct c0r_format c0r_format;
926  struct mfmc0_format mfmc0_format;
927  struct co_format co_format;
928  struct p_format p_format;
929  struct f_format f_format;
930  struct ma_format ma_format;
931  struct msa_mi10_format msa_mi10_format;
932  struct b_format b_format;
933  struct ps_format ps_format;
934  struct v_format v_format;
935  struct spec3_format spec3_format;
936  struct fb_format fb_format;
937  struct fp0_format fp0_format;
938  struct mm_fp0_format mm_fp0_format;
939  struct fp1_format fp1_format;
940  struct mm_fp1_format mm_fp1_format;
941  struct mm_fp2_format mm_fp2_format;
942  struct mm_fp3_format mm_fp3_format;
943  struct mm_fp4_format mm_fp4_format;
944  struct mm_fp5_format mm_fp5_format;
945  struct fp6_format fp6_format;
946  struct mm_fp6_format mm_fp6_format;
947  struct mm_i_format mm_i_format;
948  struct mm_m_format mm_m_format;
949  struct mm_x_format mm_x_format;
950  struct mm_a_format mm_a_format;
951  struct mm_b0_format mm_b0_format;
952  struct mm_b1_format mm_b1_format;
953  struct mm16_m_format mm16_m_format;
954  struct mm16_rb_format mm16_rb_format;
955  struct mm16_r3_format mm16_r3_format;
956  struct mm16_r5_format mm16_r5_format;
957};
958union mips16e_instruction {
959  unsigned int full : 16;
960  struct m16e_rr rr;
961  struct m16e_jal jal;
962  struct m16e_i64 i64;
963  struct m16e_ri64 ri64;
964  struct m16e_ri ri;
965  struct m16e_rri rri;
966  struct m16e_i8 i8;
967};
968#endif
969