i810_drm.h revision 106b3a8a7dc03c19a45e322de425ac56aafac358 
1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _I810_DRM_H_
20#define _I810_DRM_H_
21#include "drm.h"
22#ifdef __cplusplus
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#endif
25#ifndef _I810_DEFINES_
26#define _I810_DEFINES_
27#define I810_DMA_BUF_ORDER 12
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define I810_DMA_BUF_SZ (1 << I810_DMA_BUF_ORDER)
30#define I810_DMA_BUF_NR 256
31#define I810_NR_SAREA_CLIPRECTS 8
32#define I810_NR_TEX_REGIONS 64
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define I810_LOG_MIN_TEX_REGION_SIZE 16
35#endif
36#define I810_UPLOAD_TEX0IMAGE 0x1
37#define I810_UPLOAD_TEX1IMAGE 0x2
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define I810_UPLOAD_CTX 0x4
40#define I810_UPLOAD_BUFFERS 0x8
41#define I810_UPLOAD_TEX0 0x10
42#define I810_UPLOAD_TEX1 0x20
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define I810_UPLOAD_CLIPRECTS 0x40
45#define I810_DESTREG_DI0 0
46#define I810_DESTREG_DI1 1
47#define I810_DESTREG_DV0 2
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#define I810_DESTREG_DV1 3
50#define I810_DESTREG_DR0 4
51#define I810_DESTREG_DR1 5
52#define I810_DESTREG_DR2 6
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54#define I810_DESTREG_DR3 7
55#define I810_DESTREG_DR4 8
56#define I810_DEST_SETUP_SIZE 10
57#define I810_CTXREG_CF0 0
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59#define I810_CTXREG_CF1 1
60#define I810_CTXREG_ST0 2
61#define I810_CTXREG_ST1 3
62#define I810_CTXREG_VF 4
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64#define I810_CTXREG_MT 5
65#define I810_CTXREG_MC0 6
66#define I810_CTXREG_MC1 7
67#define I810_CTXREG_MC2 8
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69#define I810_CTXREG_MA0 9
70#define I810_CTXREG_MA1 10
71#define I810_CTXREG_MA2 11
72#define I810_CTXREG_SDM 12
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74#define I810_CTXREG_FOG 13
75#define I810_CTXREG_B1 14
76#define I810_CTXREG_B2 15
77#define I810_CTXREG_LCS 16
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79#define I810_CTXREG_PV 17
80#define I810_CTXREG_ZA 18
81#define I810_CTXREG_AA 19
82#define I810_CTX_SETUP_SIZE 20
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84#define I810_TEXREG_MI0 0
85#define I810_TEXREG_MI1 1
86#define I810_TEXREG_MI2 2
87#define I810_TEXREG_MI3 3
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89#define I810_TEXREG_MF 4
90#define I810_TEXREG_MLC 5
91#define I810_TEXREG_MLL 6
92#define I810_TEXREG_MCS 7
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94#define I810_TEX_SETUP_SIZE 8
95#define I810_FRONT 0x1
96#define I810_BACK 0x2
97#define I810_DEPTH 0x4
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99typedef enum _drm_i810_init_func {
100  I810_INIT_DMA = 0x01,
101  I810_CLEANUP_DMA = 0x02,
102  I810_INIT_DMA_1_4 = 0x03
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104} drm_i810_init_func_t;
105typedef struct _drm_i810_init {
106  drm_i810_init_func_t func;
107  unsigned int mmio_offset;
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109  unsigned int buffers_offset;
110  int sarea_priv_offset;
111  unsigned int ring_start;
112  unsigned int ring_end;
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114  unsigned int ring_size;
115  unsigned int front_offset;
116  unsigned int back_offset;
117  unsigned int depth_offset;
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119  unsigned int overlay_offset;
120  unsigned int overlay_physical;
121  unsigned int w;
122  unsigned int h;
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124  unsigned int pitch;
125  unsigned int pitch_bits;
126} drm_i810_init_t;
127typedef struct _drm_i810_pre12_init {
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129  drm_i810_init_func_t func;
130  unsigned int mmio_offset;
131  unsigned int buffers_offset;
132  int sarea_priv_offset;
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134  unsigned int ring_start;
135  unsigned int ring_end;
136  unsigned int ring_size;
137  unsigned int front_offset;
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139  unsigned int back_offset;
140  unsigned int depth_offset;
141  unsigned int w;
142  unsigned int h;
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144  unsigned int pitch;
145  unsigned int pitch_bits;
146} drm_i810_pre12_init_t;
147typedef struct _drm_i810_tex_region {
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149  unsigned char next, prev;
150  unsigned char in_use;
151  int age;
152} drm_i810_tex_region_t;
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154typedef struct _drm_i810_sarea {
155  unsigned int ContextState[I810_CTX_SETUP_SIZE];
156  unsigned int BufferState[I810_DEST_SETUP_SIZE];
157  unsigned int TexState[2][I810_TEX_SETUP_SIZE];
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159  unsigned int dirty;
160  unsigned int nbox;
161  struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS];
162  drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1];
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164  int texAge;
165  int last_enqueue;
166  int last_dispatch;
167  int last_quiescent;
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169  int ctxOwner;
170  int vertex_prim;
171  int pf_enabled;
172  int pf_active;
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174  int pf_current_page;
175} drm_i810_sarea_t;
176#define DRM_I810_INIT 0x00
177#define DRM_I810_VERTEX 0x01
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179#define DRM_I810_CLEAR 0x02
180#define DRM_I810_FLUSH 0x03
181#define DRM_I810_GETAGE 0x04
182#define DRM_I810_GETBUF 0x05
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184#define DRM_I810_SWAP 0x06
185#define DRM_I810_COPY 0x07
186#define DRM_I810_DOCOPY 0x08
187#define DRM_I810_OV0INFO 0x09
188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189#define DRM_I810_FSTATUS 0x0a
190#define DRM_I810_OV0FLIP 0x0b
191#define DRM_I810_MC 0x0c
192#define DRM_I810_RSTATUS 0x0d
193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194#define DRM_I810_FLIP 0x0e
195#define DRM_IOCTL_I810_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t)
196#define DRM_IOCTL_I810_VERTEX DRM_IOW(DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t)
197#define DRM_IOCTL_I810_CLEAR DRM_IOW(DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t)
198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199#define DRM_IOCTL_I810_FLUSH DRM_IO(DRM_COMMAND_BASE + DRM_I810_FLUSH)
200#define DRM_IOCTL_I810_GETAGE DRM_IO(DRM_COMMAND_BASE + DRM_I810_GETAGE)
201#define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t)
202#define DRM_IOCTL_I810_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_I810_SWAP)
203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204#define DRM_IOCTL_I810_COPY DRM_IOW(DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t)
205#define DRM_IOCTL_I810_DOCOPY DRM_IO(DRM_COMMAND_BASE + DRM_I810_DOCOPY)
206#define DRM_IOCTL_I810_OV0INFO DRM_IOR(DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t)
207#define DRM_IOCTL_I810_FSTATUS DRM_IO(DRM_COMMAND_BASE + DRM_I810_FSTATUS)
208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209#define DRM_IOCTL_I810_OV0FLIP DRM_IO(DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
210#define DRM_IOCTL_I810_MC DRM_IOW(DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t)
211#define DRM_IOCTL_I810_RSTATUS DRM_IO(DRM_COMMAND_BASE + DRM_I810_RSTATUS)
212#define DRM_IOCTL_I810_FLIP DRM_IO(DRM_COMMAND_BASE + DRM_I810_FLIP)
213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214typedef struct _drm_i810_clear {
215  int clear_color;
216  int clear_depth;
217  int flags;
218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219} drm_i810_clear_t;
220typedef struct _drm_i810_vertex {
221  int idx;
222  int used;
223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224  int discard;
225} drm_i810_vertex_t;
226typedef struct _drm_i810_copy_t {
227  int idx;
228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229  int used;
230  void * address;
231} drm_i810_copy_t;
232#define PR_TRIANGLES (0x0 << 18)
233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234#define PR_TRISTRIP_0 (0x1 << 18)
235#define PR_TRISTRIP_1 (0x2 << 18)
236#define PR_TRIFAN (0x3 << 18)
237#define PR_POLYGON (0x4 << 18)
238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239#define PR_LINES (0x5 << 18)
240#define PR_LINESTRIP (0x6 << 18)
241#define PR_RECTS (0x7 << 18)
242#define PR_MASK (0x7 << 18)
243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244typedef struct drm_i810_dma {
245  void * __linux_virtual;
246  int request_idx;
247  int request_size;
248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249  int granted;
250} drm_i810_dma_t;
251typedef struct _drm_i810_overlay_t {
252  unsigned int offset;
253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254  unsigned int physical;
255} drm_i810_overlay_t;
256typedef struct _drm_i810_mc {
257  int idx;
258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259  int used;
260  int num_blocks;
261  int * length;
262  unsigned int last_render;
263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264} drm_i810_mc_t;
265#ifdef __cplusplus
266#endif
267#endif
268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269