mga_drm.h revision 96c1db7b9d601c31d103389cac074a6cce0d7633
1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __MGA_DRM_H__
20#define __MGA_DRM_H__
21#include "drm.h"
22#ifdef __cplusplus
23#endif
24#ifndef __MGA_SAREA_DEFINES__
25#define __MGA_SAREA_DEFINES__
26#define MGA_F 0x1
27#define MGA_A 0x2
28#define MGA_S 0x4
29#define MGA_T2 0x8
30#define MGA_WARP_TGZ 0
31#define MGA_WARP_TGZF (MGA_F)
32#define MGA_WARP_TGZA (MGA_A)
33#define MGA_WARP_TGZAF (MGA_F | MGA_A)
34#define MGA_WARP_TGZS (MGA_S)
35#define MGA_WARP_TGZSF (MGA_S | MGA_F)
36#define MGA_WARP_TGZSA (MGA_S | MGA_A)
37#define MGA_WARP_TGZSAF (MGA_S | MGA_F | MGA_A)
38#define MGA_WARP_T2GZ (MGA_T2)
39#define MGA_WARP_T2GZF (MGA_T2 | MGA_F)
40#define MGA_WARP_T2GZA (MGA_T2 | MGA_A)
41#define MGA_WARP_T2GZAF (MGA_T2 | MGA_A | MGA_F)
42#define MGA_WARP_T2GZS (MGA_T2 | MGA_S)
43#define MGA_WARP_T2GZSF (MGA_T2 | MGA_S | MGA_F)
44#define MGA_WARP_T2GZSA (MGA_T2 | MGA_S | MGA_A)
45#define MGA_WARP_T2GZSAF (MGA_T2 | MGA_S | MGA_F | MGA_A)
46#define MGA_MAX_G200_PIPES 8
47#define MGA_MAX_G400_PIPES 16
48#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
49#define MGA_WARP_UCODE_SIZE 32768
50#define MGA_CARD_TYPE_G200 1
51#define MGA_CARD_TYPE_G400 2
52#define MGA_CARD_TYPE_G450 3
53#define MGA_CARD_TYPE_G550 4
54#define MGA_FRONT 0x1
55#define MGA_BACK 0x2
56#define MGA_DEPTH 0x4
57#define MGA_UPLOAD_CONTEXT 0x1
58#define MGA_UPLOAD_TEX0 0x2
59#define MGA_UPLOAD_TEX1 0x4
60#define MGA_UPLOAD_PIPE 0x8
61#define MGA_UPLOAD_TEX0IMAGE 0x10
62#define MGA_UPLOAD_TEX1IMAGE 0x20
63#define MGA_UPLOAD_2D 0x40
64#define MGA_WAIT_AGE 0x80
65#define MGA_UPLOAD_CLIPRECTS 0x100
66#define MGA_BUFFER_SIZE (1 << 16)
67#define MGA_NUM_BUFFERS 128
68#define MGA_NR_SAREA_CLIPRECTS 8
69#define MGA_CARD_HEAP 0
70#define MGA_AGP_HEAP 1
71#define MGA_NR_TEX_HEAPS 2
72#define MGA_NR_TEX_REGIONS 16
73#define MGA_LOG_MIN_TEX_REGION_SIZE 16
74#define DRM_MGA_IDLE_RETRY 2048
75#endif
76typedef struct {
77  unsigned int dstorg;
78  unsigned int maccess;
79  unsigned int plnwt;
80  unsigned int dwgctl;
81  unsigned int alphactrl;
82  unsigned int fogcolor;
83  unsigned int wflag;
84  unsigned int tdualstage0;
85  unsigned int tdualstage1;
86  unsigned int fcol;
87  unsigned int stencil;
88  unsigned int stencilctl;
89} drm_mga_context_regs_t;
90typedef struct {
91  unsigned int pitch;
92} drm_mga_server_regs_t;
93typedef struct {
94  unsigned int texctl;
95  unsigned int texctl2;
96  unsigned int texfilter;
97  unsigned int texbordercol;
98  unsigned int texorg;
99  unsigned int texwidth;
100  unsigned int texheight;
101  unsigned int texorg1;
102  unsigned int texorg2;
103  unsigned int texorg3;
104  unsigned int texorg4;
105} drm_mga_texture_regs_t;
106typedef struct {
107  unsigned int head;
108  unsigned int wrap;
109} drm_mga_age_t;
110typedef struct _drm_mga_sarea {
111  drm_mga_context_regs_t context_state;
112  drm_mga_server_regs_t server_state;
113  drm_mga_texture_regs_t tex_state[2];
114  unsigned int warp_pipe;
115  unsigned int dirty;
116  unsigned int vertsize;
117  struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS];
118  unsigned int nbox;
119  unsigned int req_drawable;
120  unsigned int req_draw_buffer;
121  unsigned int exported_drawable;
122  unsigned int exported_index;
123  unsigned int exported_stamp;
124  unsigned int exported_buffers;
125  unsigned int exported_nfront;
126  unsigned int exported_nback;
127  int exported_back_x, exported_front_x, exported_w;
128  int exported_back_y, exported_front_y, exported_h;
129  struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS];
130  unsigned int status[4];
131  unsigned int last_wrap;
132  drm_mga_age_t last_frame;
133  unsigned int last_enqueue;
134  unsigned int last_dispatch;
135  unsigned int last_quiescent;
136  struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1];
137  unsigned int texAge[MGA_NR_TEX_HEAPS];
138  int ctxOwner;
139} drm_mga_sarea_t;
140#define DRM_MGA_INIT 0x00
141#define DRM_MGA_FLUSH 0x01
142#define DRM_MGA_RESET 0x02
143#define DRM_MGA_SWAP 0x03
144#define DRM_MGA_CLEAR 0x04
145#define DRM_MGA_VERTEX 0x05
146#define DRM_MGA_INDICES 0x06
147#define DRM_MGA_ILOAD 0x07
148#define DRM_MGA_BLIT 0x08
149#define DRM_MGA_GETPARAM 0x09
150#define DRM_MGA_SET_FENCE 0x0a
151#define DRM_MGA_WAIT_FENCE 0x0b
152#define DRM_MGA_DMA_BOOTSTRAP 0x0c
153#define DRM_IOCTL_MGA_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t)
154#define DRM_IOCTL_MGA_FLUSH DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_FLUSH, struct drm_lock)
155#define DRM_IOCTL_MGA_RESET DRM_IO(DRM_COMMAND_BASE + DRM_MGA_RESET)
156#define DRM_IOCTL_MGA_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_MGA_SWAP)
157#define DRM_IOCTL_MGA_CLEAR DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t)
158#define DRM_IOCTL_MGA_VERTEX DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t)
159#define DRM_IOCTL_MGA_INDICES DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t)
160#define DRM_IOCTL_MGA_ILOAD DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t)
161#define DRM_IOCTL_MGA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t)
162#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t)
163#define DRM_IOCTL_MGA_SET_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, __u32)
164#define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, __u32)
165#define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t)
166typedef struct _drm_mga_warp_index {
167  int installed;
168  unsigned long phys_addr;
169  int size;
170} drm_mga_warp_index_t;
171typedef struct drm_mga_init {
172  enum {
173    MGA_INIT_DMA = 0x01,
174    MGA_CLEANUP_DMA = 0x02
175  } func;
176  unsigned long sarea_priv_offset;
177  int chipset;
178  int sgram;
179  unsigned int maccess;
180  unsigned int fb_cpp;
181  unsigned int front_offset, front_pitch;
182  unsigned int back_offset, back_pitch;
183  unsigned int depth_cpp;
184  unsigned int depth_offset, depth_pitch;
185  unsigned int texture_offset[MGA_NR_TEX_HEAPS];
186  unsigned int texture_size[MGA_NR_TEX_HEAPS];
187  unsigned long fb_offset;
188  unsigned long mmio_offset;
189  unsigned long status_offset;
190  unsigned long warp_offset;
191  unsigned long primary_offset;
192  unsigned long buffers_offset;
193} drm_mga_init_t;
194typedef struct drm_mga_dma_bootstrap {
195  unsigned long texture_handle;
196  __u32 texture_size;
197  __u32 primary_size;
198  __u32 secondary_bin_count;
199  __u32 secondary_bin_size;
200  __u32 agp_mode;
201  __u8 agp_size;
202} drm_mga_dma_bootstrap_t;
203typedef struct drm_mga_clear {
204  unsigned int flags;
205  unsigned int clear_color;
206  unsigned int clear_depth;
207  unsigned int color_mask;
208  unsigned int depth_mask;
209} drm_mga_clear_t;
210typedef struct drm_mga_vertex {
211  int idx;
212  int used;
213  int discard;
214} drm_mga_vertex_t;
215typedef struct drm_mga_indices {
216  int idx;
217  unsigned int start;
218  unsigned int end;
219  int discard;
220} drm_mga_indices_t;
221typedef struct drm_mga_iload {
222  int idx;
223  unsigned int dstorg;
224  unsigned int length;
225} drm_mga_iload_t;
226typedef struct _drm_mga_blit {
227  unsigned int planemask;
228  unsigned int srcorg;
229  unsigned int dstorg;
230  int src_pitch, dst_pitch;
231  int delta_sx, delta_sy;
232  int delta_dx, delta_dy;
233  int height, ydir;
234  int source_pitch, dest_pitch;
235} drm_mga_blit_t;
236#define MGA_PARAM_IRQ_NR 1
237#define MGA_PARAM_CARD_TYPE 2
238typedef struct drm_mga_getparam {
239  int param;
240  void __user * value;
241} drm_mga_getparam_t;
242#ifdef __cplusplus
243#endif
244#endif
245