msm_drm.h revision 38062f954c637861348dd8078cefb73554e6f12c
1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __MSM_DRM_H__
20#define __MSM_DRM_H__
21#include <stddef.h>
22#include <drm/drm.h>
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define MSM_PIPE_NONE 0x00
25#define MSM_PIPE_2D0 0x01
26#define MSM_PIPE_2D1 0x02
27#define MSM_PIPE_3D0 0x10
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29struct drm_msm_timespec {
30 int64_t tv_sec;
31 int64_t tv_nsec;
32};
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define MSM_PARAM_GPU_ID 0x01
35#define MSM_PARAM_GMEM_SIZE 0x02
36struct drm_msm_param {
37 uint32_t pipe;
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39 uint32_t param;
40 uint64_t value;
41};
42#define MSM_BO_SCANOUT 0x00000001
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define MSM_BO_GPU_READONLY 0x00000002
45#define MSM_BO_CACHE_MASK 0x000f0000
46#define MSM_BO_CACHED 0x00010000
47#define MSM_BO_WC 0x00020000
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#define MSM_BO_UNCACHED 0x00040000
50struct drm_msm_gem_new {
51 uint64_t size;
52 uint32_t flags;
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54 uint32_t handle;
55};
56struct drm_msm_gem_info {
57 uint32_t handle;
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59 uint32_t pad;
60 uint64_t offset;
61};
62#define MSM_PREP_READ 0x01
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64#define MSM_PREP_WRITE 0x02
65#define MSM_PREP_NOSYNC 0x04
66struct drm_msm_gem_cpu_prep {
67 uint32_t handle;
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69 uint32_t op;
70 struct drm_msm_timespec timeout;
71};
72struct drm_msm_gem_cpu_fini {
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74 uint32_t handle;
75};
76struct drm_msm_gem_submit_reloc {
77 uint32_t submit_offset;
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79 uint32_t or;
80 int32_t shift;
81 uint32_t reloc_idx;
82 uint64_t reloc_offset;
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84};
85#define MSM_SUBMIT_CMD_BUF 0x0001
86#define MSM_SUBMIT_CMD_IB_TARGET_BUF 0x0002
87#define MSM_SUBMIT_CMD_CTX_RESTORE_BUF 0x0003
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89struct drm_msm_gem_submit_cmd {
90 uint32_t type;
91 uint32_t submit_idx;
92 uint32_t submit_offset;
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94 uint32_t size;
95 uint32_t pad;
96 uint32_t nr_relocs;
97 uint64_t __user relocs;
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99};
100#define MSM_SUBMIT_BO_READ 0x0001
101#define MSM_SUBMIT_BO_WRITE 0x0002
102struct drm_msm_gem_submit_bo {
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104 uint32_t flags;
105 uint32_t handle;
106 uint64_t presumed;
107};
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109struct drm_msm_gem_submit {
110 uint32_t pipe;
111 uint32_t fence;
112 uint32_t nr_bos;
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114 uint32_t nr_cmds;
115 uint64_t __user bos;
116 uint64_t __user cmds;
117};
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119struct drm_msm_wait_fence {
120 uint32_t fence;
121 uint32_t pad;
122 struct drm_msm_timespec timeout;
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124};
125#define DRM_MSM_GET_PARAM 0x00
126#define DRM_MSM_GEM_NEW 0x02
127#define DRM_MSM_GEM_INFO 0x03
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129#define DRM_MSM_GEM_CPU_PREP 0x04
130#define DRM_MSM_GEM_CPU_FINI 0x05
131#define DRM_MSM_GEM_SUBMIT 0x06
132#define DRM_MSM_WAIT_FENCE 0x07
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134#define DRM_MSM_NUM_IOCTLS 0x08
135#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
136#define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
137#define DRM_IOCTL_MSM_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_INFO, struct drm_msm_gem_info)
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139#define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_gem_cpu_prep)
140#define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini)
141#define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit)
142#define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence)
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144#endif
145