msm_drm.h revision 49f525c47bd383cd6a87db8f067cddb3ab620d17 
1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __MSM_DRM_H__
20#define __MSM_DRM_H__
21#include "drm.h"
22#ifdef __cplusplus
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#endif
25#define MSM_PIPE_NONE 0x00
26#define MSM_PIPE_2D0 0x01
27#define MSM_PIPE_2D1 0x02
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define MSM_PIPE_3D0 0x10
30struct drm_msm_timespec {
31  __s64 tv_sec;
32  __s64 tv_nsec;
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34};
35#define MSM_PARAM_GPU_ID 0x01
36#define MSM_PARAM_GMEM_SIZE 0x02
37#define MSM_PARAM_CHIP_ID 0x03
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define MSM_PARAM_MAX_FREQ 0x04
40#define MSM_PARAM_TIMESTAMP 0x05
41struct drm_msm_param {
42  __u32 pipe;
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44  __u32 param;
45  __u64 value;
46};
47#define MSM_BO_SCANOUT 0x00000001
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#define MSM_BO_GPU_READONLY 0x00000002
50#define MSM_BO_CACHE_MASK 0x000f0000
51#define MSM_BO_CACHED 0x00010000
52#define MSM_BO_WC 0x00020000
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54#define MSM_BO_UNCACHED 0x00040000
55#define MSM_BO_FLAGS (MSM_BO_SCANOUT | MSM_BO_GPU_READONLY | MSM_BO_CACHED | MSM_BO_WC | MSM_BO_UNCACHED)
56struct drm_msm_gem_new {
57  __u64 size;
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59  __u32 flags;
60  __u32 handle;
61};
62struct drm_msm_gem_info {
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64  __u32 handle;
65  __u32 pad;
66  __u64 offset;
67};
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69#define MSM_PREP_READ 0x01
70#define MSM_PREP_WRITE 0x02
71#define MSM_PREP_NOSYNC 0x04
72#define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC)
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74struct drm_msm_gem_cpu_prep {
75  __u32 handle;
76  __u32 op;
77  struct drm_msm_timespec timeout;
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79};
80struct drm_msm_gem_cpu_fini {
81  __u32 handle;
82};
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84struct drm_msm_gem_submit_reloc {
85  __u32 submit_offset;
86  __u32 or;
87  __s32 shift;
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89  __u32 reloc_idx;
90  __u64 reloc_offset;
91};
92#define MSM_SUBMIT_CMD_BUF 0x0001
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94#define MSM_SUBMIT_CMD_IB_TARGET_BUF 0x0002
95#define MSM_SUBMIT_CMD_CTX_RESTORE_BUF 0x0003
96struct drm_msm_gem_submit_cmd {
97  __u32 type;
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99  __u32 submit_idx;
100  __u32 submit_offset;
101  __u32 size;
102  __u32 pad;
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104  __u32 nr_relocs;
105  __u64 __user relocs;
106};
107#define MSM_SUBMIT_BO_READ 0x0001
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109#define MSM_SUBMIT_BO_WRITE 0x0002
110#define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE)
111struct drm_msm_gem_submit_bo {
112  __u32 flags;
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114  __u32 handle;
115  __u64 presumed;
116};
117struct drm_msm_gem_submit {
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119  __u32 pipe;
120  __u32 fence;
121  __u32 nr_bos;
122  __u32 nr_cmds;
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124  __u64 __user bos;
125  __u64 __user cmds;
126};
127struct drm_msm_wait_fence {
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129  __u32 fence;
130  __u32 pad;
131  struct drm_msm_timespec timeout;
132};
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134#define MSM_MADV_WILLNEED 0
135#define MSM_MADV_DONTNEED 1
136#define __MSM_MADV_PURGED 2
137struct drm_msm_gem_madvise {
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139  __u32 handle;
140  __u32 madv;
141  __u32 retained;
142};
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144#define DRM_MSM_GET_PARAM 0x00
145#define DRM_MSM_GEM_NEW 0x02
146#define DRM_MSM_GEM_INFO 0x03
147#define DRM_MSM_GEM_CPU_PREP 0x04
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149#define DRM_MSM_GEM_CPU_FINI 0x05
150#define DRM_MSM_GEM_SUBMIT 0x06
151#define DRM_MSM_WAIT_FENCE 0x07
152#define DRM_MSM_GEM_MADVISE 0x08
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154#define DRM_MSM_NUM_IOCTLS 0x09
155#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
156#define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
157#define DRM_IOCTL_MSM_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_INFO, struct drm_msm_gem_info)
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159#define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_gem_cpu_prep)
160#define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini)
161#define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit)
162#define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence)
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164#define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise)
165#ifdef __cplusplus
166#endif
167#endif
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169