vc4_drm.h revision 49f525c47bd383cd6a87db8f067cddb3ab620d17 
1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI_VC4_DRM_H_
20#define _UAPI_VC4_DRM_H_
21#include "drm.h"
22#ifdef __cplusplus
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#endif
25#define DRM_VC4_SUBMIT_CL 0x00
26#define DRM_VC4_WAIT_SEQNO 0x01
27#define DRM_VC4_WAIT_BO 0x02
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define DRM_VC4_CREATE_BO 0x03
30#define DRM_VC4_MMAP_BO 0x04
31#define DRM_VC4_CREATE_SHADER_BO 0x05
32#define DRM_VC4_GET_HANG_STATE 0x06
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define DRM_VC4_GET_PARAM 0x07
35#define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl)
36#define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno)
37#define DRM_IOCTL_VC4_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_BO, struct drm_vc4_wait_bo)
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define DRM_IOCTL_VC4_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_BO, struct drm_vc4_create_bo)
40#define DRM_IOCTL_VC4_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_MMAP_BO, struct drm_vc4_mmap_bo)
41#define DRM_IOCTL_VC4_CREATE_SHADER_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_SHADER_BO, struct drm_vc4_create_shader_bo)
42#define DRM_IOCTL_VC4_GET_HANG_STATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_HANG_STATE, struct drm_vc4_get_hang_state)
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define DRM_IOCTL_VC4_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param)
45struct drm_vc4_submit_rcl_surface {
46  __u32 hindex;
47  __u32 offset;
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49  __u16 bits;
50#define VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES (1 << 0)
51  __u16 flags;
52};
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54struct drm_vc4_submit_cl {
55  __u64 bin_cl;
56  __u64 shader_rec;
57  __u64 uniforms;
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59  __u64 bo_handles;
60  __u32 bin_cl_size;
61  __u32 shader_rec_size;
62  __u32 shader_rec_count;
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64  __u32 uniforms_size;
65  __u32 bo_handle_count;
66  __u16 width;
67  __u16 height;
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69  __u8 min_x_tile;
70  __u8 min_y_tile;
71  __u8 max_x_tile;
72  __u8 max_y_tile;
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74  struct drm_vc4_submit_rcl_surface color_read;
75  struct drm_vc4_submit_rcl_surface color_write;
76  struct drm_vc4_submit_rcl_surface zs_read;
77  struct drm_vc4_submit_rcl_surface zs_write;
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79  struct drm_vc4_submit_rcl_surface msaa_color_write;
80  struct drm_vc4_submit_rcl_surface msaa_zs_write;
81  __u32 clear_color[2];
82  __u32 clear_z;
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84  __u8 clear_s;
85  __u32 pad : 24;
86#define VC4_SUBMIT_CL_USE_CLEAR_COLOR (1 << 0)
87  __u32 flags;
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89  __u64 seqno;
90};
91struct drm_vc4_wait_seqno {
92  __u64 seqno;
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94  __u64 timeout_ns;
95};
96struct drm_vc4_wait_bo {
97  __u32 handle;
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99  __u32 pad;
100  __u64 timeout_ns;
101};
102struct drm_vc4_create_bo {
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104  __u32 size;
105  __u32 flags;
106  __u32 handle;
107  __u32 pad;
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109};
110struct drm_vc4_mmap_bo {
111  __u32 handle;
112  __u32 flags;
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114  __u64 offset;
115};
116struct drm_vc4_create_shader_bo {
117  __u32 size;
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119  __u32 flags;
120  __u64 data;
121  __u32 handle;
122  __u32 pad;
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124};
125struct drm_vc4_get_hang_state_bo {
126  __u32 handle;
127  __u32 paddr;
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129  __u32 size;
130  __u32 pad;
131};
132struct drm_vc4_get_hang_state {
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134  __u64 bo;
135  __u32 bo_count;
136  __u32 start_bin, start_render;
137  __u32 ct0ca, ct0ea;
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139  __u32 ct1ca, ct1ea;
140  __u32 ct0cs, ct1cs;
141  __u32 ct0ra0, ct1ra0;
142  __u32 bpca, bpcs;
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144  __u32 bpoa, bpos;
145  __u32 vpmbase;
146  __u32 dbge;
147  __u32 fdbgo;
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149  __u32 fdbgb;
150  __u32 fdbgr;
151  __u32 fdbgs;
152  __u32 errstat;
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154  __u32 pad[16];
155};
156#define DRM_VC4_PARAM_V3D_IDENT0 0
157#define DRM_VC4_PARAM_V3D_IDENT1 1
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159#define DRM_VC4_PARAM_V3D_IDENT2 2
160#define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3
161struct drm_vc4_get_param {
162  __u32 param;
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164  __u32 pad;
165  __u64 value;
166};
167#ifdef __cplusplus
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169#endif
170#endif
171