vmwgfx_drm.h revision ba8d4f460b51161eb82cf1006cb34a3cc1389f47 
1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __VMWGFX_DRM_H__
20#define __VMWGFX_DRM_H__
21#include <drm.h>
22#define DRM_VMW_MAX_SURFACE_FACES 6
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define DRM_VMW_MAX_MIP_LEVELS 24
25#define DRM_VMW_GET_PARAM 0
26#define DRM_VMW_ALLOC_DMABUF 1
27#define DRM_VMW_UNREF_DMABUF 2
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define DRM_VMW_CURSOR_BYPASS 3
30#define DRM_VMW_CONTROL_STREAM 4
31#define DRM_VMW_CLAIM_STREAM 5
32#define DRM_VMW_UNREF_STREAM 6
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define DRM_VMW_CREATE_CONTEXT 7
35#define DRM_VMW_UNREF_CONTEXT 8
36#define DRM_VMW_CREATE_SURFACE 9
37#define DRM_VMW_UNREF_SURFACE 10
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define DRM_VMW_REF_SURFACE 11
40#define DRM_VMW_EXECBUF 12
41#define DRM_VMW_GET_3D_CAP 13
42#define DRM_VMW_FENCE_WAIT 14
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define DRM_VMW_FENCE_SIGNALED 15
45#define DRM_VMW_FENCE_UNREF 16
46#define DRM_VMW_FENCE_EVENT 17
47#define DRM_VMW_PRESENT 18
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#define DRM_VMW_PRESENT_READBACK 19
50#define DRM_VMW_UPDATE_LAYOUT 20
51#define DRM_VMW_CREATE_SHADER 21
52#define DRM_VMW_UNREF_SHADER 22
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54#define DRM_VMW_GB_SURFACE_CREATE 23
55#define DRM_VMW_GB_SURFACE_REF 24
56#define DRM_VMW_SYNCCPU 25
57#define DRM_VMW_PARAM_NUM_STREAMS 0
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
60#define DRM_VMW_PARAM_3D 2
61#define DRM_VMW_PARAM_HW_CAPS 3
62#define DRM_VMW_PARAM_FIFO_CAPS 4
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64#define DRM_VMW_PARAM_MAX_FB_SIZE 5
65#define DRM_VMW_PARAM_FIFO_HW_VERSION 6
66#define DRM_VMW_PARAM_MAX_SURF_MEMORY 7
67#define DRM_VMW_PARAM_3D_CAPS_SIZE 8
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69#define DRM_VMW_PARAM_MAX_MOB_MEMORY 9
70#define DRM_VMW_PARAM_MAX_MOB_SIZE 10
71enum drm_vmw_handle_type {
72 DRM_VMW_HANDLE_LEGACY = 0,
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74 DRM_VMW_HANDLE_PRIME = 1
75};
76struct drm_vmw_getparam_arg {
77 uint64_t value;
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79 uint32_t param;
80 uint32_t pad64;
81};
82struct drm_vmw_context_arg {
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84 int32_t cid;
85 uint32_t pad64;
86};
87struct drm_vmw_surface_create_req {
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89 uint32_t flags;
90 uint32_t format;
91 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
92 uint64_t size_addr;
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94 int32_t shareable;
95 int32_t scanout;
96};
97struct drm_vmw_surface_arg {
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99 int32_t sid;
100 enum drm_vmw_handle_type handle_type;
101};
102struct drm_vmw_size {
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104 uint32_t width;
105 uint32_t height;
106 uint32_t depth;
107 uint32_t pad64;
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109};
110union drm_vmw_surface_create_arg {
111 struct drm_vmw_surface_arg rep;
112 struct drm_vmw_surface_create_req req;
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114};
115union drm_vmw_surface_reference_arg {
116 struct drm_vmw_surface_create_req rep;
117 struct drm_vmw_surface_arg req;
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119};
120#define DRM_VMW_EXECBUF_VERSION 1
121struct drm_vmw_execbuf_arg {
122 uint64_t commands;
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124 uint32_t command_size;
125 uint32_t throttle_us;
126 uint64_t fence_rep;
127 uint32_t version;
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129 uint32_t flags;
130};
131struct drm_vmw_fence_rep {
132 uint32_t handle;
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134 uint32_t mask;
135 uint32_t seqno;
136 uint32_t passed_seqno;
137 uint32_t pad64;
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139 int32_t error;
140};
141struct drm_vmw_alloc_dmabuf_req {
142 uint32_t size;
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144 uint32_t pad64;
145};
146struct drm_vmw_dmabuf_rep {
147 uint64_t map_handle;
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149 uint32_t handle;
150 uint32_t cur_gmr_id;
151 uint32_t cur_gmr_offset;
152 uint32_t pad64;
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154};
155union drm_vmw_alloc_dmabuf_arg {
156 struct drm_vmw_alloc_dmabuf_req req;
157 struct drm_vmw_dmabuf_rep rep;
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159};
160struct drm_vmw_unref_dmabuf_arg {
161 uint32_t handle;
162 uint32_t pad64;
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164};
165struct drm_vmw_rect {
166 int32_t x;
167 int32_t y;
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169 uint32_t w;
170 uint32_t h;
171};
172struct drm_vmw_control_stream_arg {
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174 uint32_t stream_id;
175 uint32_t enabled;
176 uint32_t flags;
177 uint32_t color_key;
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179 uint32_t handle;
180 uint32_t offset;
181 int32_t format;
182 uint32_t size;
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184 uint32_t width;
185 uint32_t height;
186 uint32_t pitch[3];
187 uint32_t pad64;
188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189 struct drm_vmw_rect src;
190 struct drm_vmw_rect dst;
191};
192#define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194#define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
195struct drm_vmw_cursor_bypass_arg {
196 uint32_t flags;
197 uint32_t crtc_id;
198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199 int32_t xpos;
200 int32_t ypos;
201 int32_t xhot;
202 int32_t yhot;
203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204};
205struct drm_vmw_stream_arg {
206 uint32_t stream_id;
207 uint32_t pad64;
208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209};
210struct drm_vmw_get_3d_cap_arg {
211 uint64_t buffer;
212 uint32_t max_size;
213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214 uint32_t pad64;
215};
216#define DRM_VMW_FENCE_FLAG_EXEC (1 << 0)
217#define DRM_VMW_FENCE_FLAG_QUERY (1 << 1)
218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219#define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
220struct drm_vmw_fence_wait_arg {
221 uint32_t handle;
222 int32_t cookie_valid;
223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224 uint64_t kernel_cookie;
225 uint64_t timeout_us;
226 int32_t lazy;
227 int32_t flags;
228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229 int32_t wait_options;
230 int32_t pad64;
231};
232struct drm_vmw_fence_signaled_arg {
233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234 uint32_t handle;
235 uint32_t flags;
236 int32_t signaled;
237 uint32_t passed_seqno;
238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239 uint32_t signaled_flags;
240 uint32_t pad64;
241};
242struct drm_vmw_fence_arg {
243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244 uint32_t handle;
245 uint32_t pad64;
246};
247#define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249struct drm_vmw_event_fence {
250 struct drm_event base;
251 uint64_t user_data;
252 uint32_t tv_sec;
253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254 uint32_t tv_usec;
255};
256#define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
257struct drm_vmw_fence_event_arg {
258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259 uint64_t fence_rep;
260 uint64_t user_data;
261 uint32_t handle;
262 uint32_t flags;
263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264};
265struct drm_vmw_present_arg {
266 uint32_t fb_id;
267 uint32_t sid;
268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269 int32_t dest_x;
270 int32_t dest_y;
271 uint64_t clips_ptr;
272 uint32_t num_clips;
273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
274 uint32_t pad64;
275};
276struct drm_vmw_present_readback_arg {
277 uint32_t fb_id;
278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
279 uint32_t num_clips;
280 uint64_t clips_ptr;
281 uint64_t fence_rep;
282};
283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
284struct drm_vmw_update_layout_arg {
285 uint32_t num_outputs;
286 uint32_t pad64;
287 uint64_t rects;
288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
289};
290enum drm_vmw_shader_type {
291 drm_vmw_shader_type_vs = 0,
292 drm_vmw_shader_type_ps,
293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
294 drm_vmw_shader_type_gs
295};
296struct drm_vmw_shader_create_arg {
297 enum drm_vmw_shader_type shader_type;
298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
299 uint32_t size;
300 uint32_t buffer_handle;
301 uint32_t shader_handle;
302 uint64_t offset;
303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
304};
305struct drm_vmw_shader_arg {
306 uint32_t handle;
307 uint32_t pad64;
308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
309};
310enum drm_vmw_surface_flags {
311 drm_vmw_surface_flag_shareable = (1 << 0),
312 drm_vmw_surface_flag_scanout = (1 << 1),
313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
314 drm_vmw_surface_flag_create_buffer = (1 << 2)
315};
316struct drm_vmw_gb_surface_create_req {
317 uint32_t svga3d_flags;
318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
319 uint32_t format;
320 uint32_t mip_levels;
321 enum drm_vmw_surface_flags drm_surface_flags;
322 uint32_t multisample_count;
323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
324 uint32_t autogen_filter;
325 uint32_t buffer_handle;
326 uint32_t pad64;
327 struct drm_vmw_size base_size;
328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
329};
330struct drm_vmw_gb_surface_create_rep {
331 uint32_t handle;
332 uint32_t backup_size;
333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
334 uint32_t buffer_handle;
335 uint32_t buffer_size;
336 uint64_t buffer_map_handle;
337};
338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
339union drm_vmw_gb_surface_create_arg {
340 struct drm_vmw_gb_surface_create_rep rep;
341 struct drm_vmw_gb_surface_create_req req;
342};
343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
344struct drm_vmw_gb_surface_ref_rep {
345 struct drm_vmw_gb_surface_create_req creq;
346 struct drm_vmw_gb_surface_create_rep crep;
347};
348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
349union drm_vmw_gb_surface_reference_arg {
350 struct drm_vmw_gb_surface_ref_rep rep;
351 struct drm_vmw_surface_arg req;
352};
353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
354enum drm_vmw_synccpu_flags {
355 drm_vmw_synccpu_read = (1 << 0),
356 drm_vmw_synccpu_write = (1 << 1),
357 drm_vmw_synccpu_dontblock = (1 << 2),
358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
359 drm_vmw_synccpu_allow_cs = (1 << 3)
360};
361enum drm_vmw_synccpu_op {
362 drm_vmw_synccpu_grab,
363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
364 drm_vmw_synccpu_release
365};
366struct drm_vmw_synccpu_arg {
367 enum drm_vmw_synccpu_op op;
368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
369 enum drm_vmw_synccpu_flags flags;
370 uint32_t handle;
371 uint32_t pad64;
372};
373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
374#endif
375