vmw_pvrdma-abi.h revision 1308ad3ab33294c3abfd96da12b6df58b381ce52
1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __VMW_PVRDMA_ABI_H__
20#define __VMW_PVRDMA_ABI_H__
21#include <linux/types.h>
22#define PVRDMA_UVERBS_ABI_VERSION 3
23#define PVRDMA_UAR_HANDLE_MASK 0x00FFFFFF
24#define PVRDMA_UAR_QP_OFFSET 0
25#define PVRDMA_UAR_QP_SEND BIT(30)
26#define PVRDMA_UAR_QP_RECV BIT(31)
27#define PVRDMA_UAR_CQ_OFFSET 4
28#define PVRDMA_UAR_CQ_ARM_SOL BIT(29)
29#define PVRDMA_UAR_CQ_ARM BIT(30)
30#define PVRDMA_UAR_CQ_POLL BIT(31)
31enum pvrdma_wr_opcode {
32  PVRDMA_WR_RDMA_WRITE,
33  PVRDMA_WR_RDMA_WRITE_WITH_IMM,
34  PVRDMA_WR_SEND,
35  PVRDMA_WR_SEND_WITH_IMM,
36  PVRDMA_WR_RDMA_READ,
37  PVRDMA_WR_ATOMIC_CMP_AND_SWP,
38  PVRDMA_WR_ATOMIC_FETCH_AND_ADD,
39  PVRDMA_WR_LSO,
40  PVRDMA_WR_SEND_WITH_INV,
41  PVRDMA_WR_RDMA_READ_WITH_INV,
42  PVRDMA_WR_LOCAL_INV,
43  PVRDMA_WR_FAST_REG_MR,
44  PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP,
45  PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD,
46  PVRDMA_WR_BIND_MW,
47  PVRDMA_WR_REG_SIG_MR,
48};
49enum pvrdma_wc_status {
50  PVRDMA_WC_SUCCESS,
51  PVRDMA_WC_LOC_LEN_ERR,
52  PVRDMA_WC_LOC_QP_OP_ERR,
53  PVRDMA_WC_LOC_EEC_OP_ERR,
54  PVRDMA_WC_LOC_PROT_ERR,
55  PVRDMA_WC_WR_FLUSH_ERR,
56  PVRDMA_WC_MW_BIND_ERR,
57  PVRDMA_WC_BAD_RESP_ERR,
58  PVRDMA_WC_LOC_ACCESS_ERR,
59  PVRDMA_WC_REM_INV_REQ_ERR,
60  PVRDMA_WC_REM_ACCESS_ERR,
61  PVRDMA_WC_REM_OP_ERR,
62  PVRDMA_WC_RETRY_EXC_ERR,
63  PVRDMA_WC_RNR_RETRY_EXC_ERR,
64  PVRDMA_WC_LOC_RDD_VIOL_ERR,
65  PVRDMA_WC_REM_INV_RD_REQ_ERR,
66  PVRDMA_WC_REM_ABORT_ERR,
67  PVRDMA_WC_INV_EECN_ERR,
68  PVRDMA_WC_INV_EEC_STATE_ERR,
69  PVRDMA_WC_FATAL_ERR,
70  PVRDMA_WC_RESP_TIMEOUT_ERR,
71  PVRDMA_WC_GENERAL_ERR,
72};
73enum pvrdma_wc_opcode {
74  PVRDMA_WC_SEND,
75  PVRDMA_WC_RDMA_WRITE,
76  PVRDMA_WC_RDMA_READ,
77  PVRDMA_WC_COMP_SWAP,
78  PVRDMA_WC_FETCH_ADD,
79  PVRDMA_WC_BIND_MW,
80  PVRDMA_WC_LSO,
81  PVRDMA_WC_LOCAL_INV,
82  PVRDMA_WC_FAST_REG_MR,
83  PVRDMA_WC_MASKED_COMP_SWAP,
84  PVRDMA_WC_MASKED_FETCH_ADD,
85  PVRDMA_WC_RECV = 1 << 7,
86  PVRDMA_WC_RECV_RDMA_WITH_IMM,
87};
88enum pvrdma_wc_flags {
89  PVRDMA_WC_GRH = 1 << 0,
90  PVRDMA_WC_WITH_IMM = 1 << 1,
91  PVRDMA_WC_WITH_INVALIDATE = 1 << 2,
92  PVRDMA_WC_IP_CSUM_OK = 1 << 3,
93  PVRDMA_WC_WITH_SMAC = 1 << 4,
94  PVRDMA_WC_WITH_VLAN = 1 << 5,
95  PVRDMA_WC_WITH_NETWORK_HDR_TYPE = 1 << 6,
96  PVRDMA_WC_FLAGS_MAX = PVRDMA_WC_WITH_NETWORK_HDR_TYPE,
97};
98struct pvrdma_alloc_ucontext_resp {
99  __u32 qp_tab_size;
100  __u32 reserved;
101};
102struct pvrdma_alloc_pd_resp {
103  __u32 pdn;
104  __u32 reserved;
105};
106struct pvrdma_create_cq {
107  __u64 buf_addr;
108  __u32 buf_size;
109  __u32 reserved;
110};
111struct pvrdma_create_cq_resp {
112  __u32 cqn;
113  __u32 reserved;
114};
115struct pvrdma_resize_cq {
116  __u64 buf_addr;
117  __u32 buf_size;
118  __u32 reserved;
119};
120struct pvrdma_create_srq {
121  __u64 buf_addr;
122};
123struct pvrdma_create_srq_resp {
124  __u32 srqn;
125  __u32 reserved;
126};
127struct pvrdma_create_qp {
128  __u64 rbuf_addr;
129  __u64 sbuf_addr;
130  __u32 rbuf_size;
131  __u32 sbuf_size;
132  __u64 qp_addr;
133};
134struct pvrdma_ex_cmp_swap {
135  __u64 swap_val;
136  __u64 compare_val;
137  __u64 swap_mask;
138  __u64 compare_mask;
139};
140struct pvrdma_ex_fetch_add {
141  __u64 add_val;
142  __u64 field_boundary;
143};
144struct pvrdma_av {
145  __u32 port_pd;
146  __u32 sl_tclass_flowlabel;
147  __u8 dgid[16];
148  __u8 src_path_bits;
149  __u8 gid_index;
150  __u8 stat_rate;
151  __u8 hop_limit;
152  __u8 dmac[6];
153  __u8 reserved[6];
154};
155struct pvrdma_sge {
156  __u64 addr;
157  __u32 length;
158  __u32 lkey;
159};
160struct pvrdma_rq_wqe_hdr {
161  __u64 wr_id;
162  __u32 num_sge;
163  __u32 total_len;
164};
165struct pvrdma_sq_wqe_hdr {
166  __u64 wr_id;
167  __u32 num_sge;
168  __u32 total_len;
169  __u32 opcode;
170  __u32 send_flags;
171  union {
172    __be32 imm_data;
173    __u32 invalidate_rkey;
174  } ex;
175  __u32 reserved;
176  union {
177    struct {
178      __u64 remote_addr;
179      __u32 rkey;
180      __u8 reserved[4];
181    } rdma;
182    struct {
183      __u64 remote_addr;
184      __u64 compare_add;
185      __u64 swap;
186      __u32 rkey;
187      __u32 reserved;
188    } atomic;
189    struct {
190      __u64 remote_addr;
191      __u32 log_arg_sz;
192      __u32 rkey;
193      union {
194        struct pvrdma_ex_cmp_swap cmp_swap;
195        struct pvrdma_ex_fetch_add fetch_add;
196      } wr_data;
197    } masked_atomics;
198    struct {
199      __u64 iova_start;
200      __u64 pl_pdir_dma;
201      __u32 page_shift;
202      __u32 page_list_len;
203      __u32 length;
204      __u32 access_flags;
205      __u32 rkey;
206    } fast_reg;
207    struct {
208      __u32 remote_qpn;
209      __u32 remote_qkey;
210      struct pvrdma_av av;
211    } ud;
212  } wr;
213};
214struct pvrdma_cqe {
215  __u64 wr_id;
216  __u64 qp;
217  __u32 opcode;
218  __u32 status;
219  __u32 byte_len;
220  __be32 imm_data;
221  __u32 src_qp;
222  __u32 wc_flags;
223  __u32 vendor_err;
224  __u16 pkey_index;
225  __u16 slid;
226  __u8 sl;
227  __u8 dlid_path_bits;
228  __u8 port_num;
229  __u8 smac[6];
230  __u8 network_hdr_type;
231  __u8 reserved2[6];
232};
233#endif
234