1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef _UAPI__SOUND_ASOUND_H 20#define _UAPI__SOUND_ASOUND_H 21#ifdef __linux__ 22#include <linux/types.h> 23#else 24#include <sys/ioctl.h> 25#endif 26#include <stdlib.h> 27#define SNDRV_PROTOCOL_VERSION(major,minor,subminor) (((major) << 16) | ((minor) << 8) | (subminor)) 28#define SNDRV_PROTOCOL_MAJOR(version) (((version) >> 16) & 0xffff) 29#define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff) 30#define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff) 31#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion,uversion) (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion))) 32struct snd_aes_iec958 { 33 unsigned char status[24]; 34 unsigned char subcode[147]; 35 unsigned char pad; 36 unsigned char dig_subframe[4]; 37}; 38struct snd_cea_861_aud_if { 39 unsigned char db1_ct_cc; 40 unsigned char db2_sf_ss; 41 unsigned char db3; 42 unsigned char db4_ca; 43 unsigned char db5_dminh_lsv; 44}; 45#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1) 46enum { 47 SNDRV_HWDEP_IFACE_OPL2 = 0, 48 SNDRV_HWDEP_IFACE_OPL3, 49 SNDRV_HWDEP_IFACE_OPL4, 50 SNDRV_HWDEP_IFACE_SB16CSP, 51 SNDRV_HWDEP_IFACE_EMU10K1, 52 SNDRV_HWDEP_IFACE_YSS225, 53 SNDRV_HWDEP_IFACE_ICS2115, 54 SNDRV_HWDEP_IFACE_SSCAPE, 55 SNDRV_HWDEP_IFACE_VX, 56 SNDRV_HWDEP_IFACE_MIXART, 57 SNDRV_HWDEP_IFACE_USX2Y, 58 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, 59 SNDRV_HWDEP_IFACE_BLUETOOTH, 60 SNDRV_HWDEP_IFACE_USX2Y_PCM, 61 SNDRV_HWDEP_IFACE_PCXHR, 62 SNDRV_HWDEP_IFACE_SB_RC, 63 SNDRV_HWDEP_IFACE_HDA, 64 SNDRV_HWDEP_IFACE_USB_STREAM, 65 SNDRV_HWDEP_IFACE_FW_DICE, 66 SNDRV_HWDEP_IFACE_FW_FIREWORKS, 67 SNDRV_HWDEP_IFACE_FW_BEBOB, 68 SNDRV_HWDEP_IFACE_FW_OXFW, 69 SNDRV_HWDEP_IFACE_FW_DIGI00X, 70 SNDRV_HWDEP_IFACE_FW_TASCAM, 71 SNDRV_HWDEP_IFACE_LINE6, 72 SNDRV_HWDEP_IFACE_FW_MOTU, 73 SNDRV_HWDEP_IFACE_FW_FIREFACE, 74 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE 75}; 76struct snd_hwdep_info { 77 unsigned int device; 78 int card; 79 unsigned char id[64]; 80 unsigned char name[80]; 81 int iface; 82 unsigned char reserved[64]; 83}; 84struct snd_hwdep_dsp_status { 85 unsigned int version; 86 unsigned char id[32]; 87 unsigned int num_dsps; 88 unsigned int dsp_loaded; 89 unsigned int chip_ready; 90 unsigned char reserved[16]; 91}; 92struct snd_hwdep_dsp_image { 93 unsigned int index; 94 unsigned char name[64]; 95 unsigned char __user * image; 96 size_t length; 97 unsigned long driver_data; 98}; 99#define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int) 100#define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info) 101#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status) 102#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image) 103#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 14) 104typedef unsigned long snd_pcm_uframes_t; 105typedef signed long snd_pcm_sframes_t; 106enum { 107 SNDRV_PCM_CLASS_GENERIC = 0, 108 SNDRV_PCM_CLASS_MULTI, 109 SNDRV_PCM_CLASS_MODEM, 110 SNDRV_PCM_CLASS_DIGITIZER, 111 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER, 112}; 113enum { 114 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, 115 SNDRV_PCM_SUBCLASS_MULTI_MIX, 116 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX, 117}; 118enum { 119 SNDRV_PCM_STREAM_PLAYBACK = 0, 120 SNDRV_PCM_STREAM_CAPTURE, 121 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE, 122}; 123typedef int __bitwise snd_pcm_access_t; 124#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) 125#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1) 126#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2) 127#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3) 128#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4) 129#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED 130typedef int __bitwise snd_pcm_format_t; 131#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0) 132#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1) 133#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2) 134#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3) 135#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4) 136#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5) 137#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) 138#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) 139#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) 140#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) 141#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10) 142#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11) 143#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12) 144#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13) 145#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14) 146#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15) 147#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16) 148#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17) 149#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) 150#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) 151#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20) 152#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21) 153#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22) 154#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23) 155#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24) 156#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31) 157#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32) 158#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33) 159#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34) 160#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35) 161#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36) 162#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37) 163#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38) 164#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39) 165#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40) 166#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41) 167#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42) 168#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43) 169#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44) 170#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45) 171#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46) 172#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47) 173#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48) 174#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49) 175#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50) 176#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51) 177#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52) 178#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE 179#ifdef SNDRV_LITTLE_ENDIAN 180#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE 181#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE 182#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE 183#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE 184#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE 185#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE 186#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE 187#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE 188#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE 189#endif 190#ifdef SNDRV_BIG_ENDIAN 191#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE 192#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE 193#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE 194#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE 195#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE 196#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE 197#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE 198#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE 199#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE 200#endif 201typedef int __bitwise snd_pcm_subformat_t; 202#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0) 203#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD 204#define SNDRV_PCM_INFO_MMAP 0x00000001 205#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 206#define SNDRV_PCM_INFO_DOUBLE 0x00000004 207#define SNDRV_PCM_INFO_BATCH 0x00000010 208#define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020 209#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 210#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 211#define SNDRV_PCM_INFO_COMPLEX 0x00000400 212#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 213#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 214#define SNDRV_PCM_INFO_RESUME 0x00040000 215#define SNDRV_PCM_INFO_PAUSE 0x00080000 216#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 217#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 218#define SNDRV_PCM_INFO_SYNC_START 0x00400000 219#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 220#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000 221#define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000 222#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 223#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 224#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 225#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 226#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 227typedef int __bitwise snd_pcm_state_t; 228#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) 229#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1) 230#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2) 231#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3) 232#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4) 233#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5) 234#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6) 235#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7) 236#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8) 237#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED 238enum { 239 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000, 240 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000, 241 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000, 242}; 243union snd_pcm_sync_id { 244 unsigned char id[16]; 245 unsigned short id16[8]; 246 unsigned int id32[4]; 247}; 248struct snd_pcm_info { 249 unsigned int device; 250 unsigned int subdevice; 251 int stream; 252 int card; 253 unsigned char id[64]; 254 unsigned char name[80]; 255 unsigned char subname[32]; 256 int dev_class; 257 int dev_subclass; 258 unsigned int subdevices_count; 259 unsigned int subdevices_avail; 260 union snd_pcm_sync_id sync; 261 unsigned char reserved[64]; 262}; 263typedef int snd_pcm_hw_param_t; 264#define SNDRV_PCM_HW_PARAM_ACCESS 0 265#define SNDRV_PCM_HW_PARAM_FORMAT 1 266#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 267#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS 268#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT 269#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 270#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 271#define SNDRV_PCM_HW_PARAM_CHANNELS 10 272#define SNDRV_PCM_HW_PARAM_RATE 11 273#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 274#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 275#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 276#define SNDRV_PCM_HW_PARAM_PERIODS 15 277#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 278#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 279#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 280#define SNDRV_PCM_HW_PARAM_TICK_TIME 19 281#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS 282#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME 283#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1 << 0) 284#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1 << 1) 285#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1 << 2) 286struct snd_interval { 287 unsigned int min, max; 288 unsigned int openmin : 1, openmax : 1, integer : 1, empty : 1; 289}; 290#define SNDRV_MASK_MAX 256 291struct snd_mask { 292 __u32 bits[(SNDRV_MASK_MAX + 31) / 32]; 293}; 294struct snd_pcm_hw_params { 295 unsigned int flags; 296 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - SNDRV_PCM_HW_PARAM_FIRST_MASK + 1]; 297 struct snd_mask mres[5]; 298 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL - SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1]; 299 struct snd_interval ires[9]; 300 unsigned int rmask; 301 unsigned int cmask; 302 unsigned int info; 303 unsigned int msbits; 304 unsigned int rate_num; 305 unsigned int rate_den; 306 snd_pcm_uframes_t fifo_size; 307 unsigned char reserved[64]; 308}; 309enum { 310 SNDRV_PCM_TSTAMP_NONE = 0, 311 SNDRV_PCM_TSTAMP_ENABLE, 312 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE, 313}; 314struct snd_pcm_sw_params { 315 int tstamp_mode; 316 unsigned int period_step; 317 unsigned int sleep_min; 318 snd_pcm_uframes_t avail_min; 319 snd_pcm_uframes_t xfer_align; 320 snd_pcm_uframes_t start_threshold; 321 snd_pcm_uframes_t stop_threshold; 322 snd_pcm_uframes_t silence_threshold; 323 snd_pcm_uframes_t silence_size; 324 snd_pcm_uframes_t boundary; 325 unsigned int proto; 326 unsigned int tstamp_type; 327 unsigned char reserved[56]; 328}; 329struct snd_pcm_channel_info { 330 unsigned int channel; 331 __kernel_off_t offset; 332 unsigned int first; 333 unsigned int step; 334}; 335enum { 336 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0, 337 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1, 338 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2, 339 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3, 340 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4, 341 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5, 342 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED 343}; 344struct snd_pcm_status { 345 snd_pcm_state_t state; 346 struct timespec trigger_tstamp; 347 struct timespec tstamp; 348 snd_pcm_uframes_t appl_ptr; 349 snd_pcm_uframes_t hw_ptr; 350 snd_pcm_sframes_t delay; 351 snd_pcm_uframes_t avail; 352 snd_pcm_uframes_t avail_max; 353 snd_pcm_uframes_t overrange; 354 snd_pcm_state_t suspended_state; 355 __u32 audio_tstamp_data; 356 struct timespec audio_tstamp; 357 struct timespec driver_tstamp; 358 __u32 audio_tstamp_accuracy; 359 unsigned char reserved[52 - 2 * sizeof(struct timespec)]; 360}; 361struct snd_pcm_mmap_status { 362 snd_pcm_state_t state; 363 int pad1; 364 snd_pcm_uframes_t hw_ptr; 365 struct timespec tstamp; 366 snd_pcm_state_t suspended_state; 367 struct timespec audio_tstamp; 368}; 369struct snd_pcm_mmap_control { 370 snd_pcm_uframes_t appl_ptr; 371 snd_pcm_uframes_t avail_min; 372}; 373#define SNDRV_PCM_SYNC_PTR_HWSYNC (1 << 0) 374#define SNDRV_PCM_SYNC_PTR_APPL (1 << 1) 375#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1 << 2) 376struct snd_pcm_sync_ptr { 377 unsigned int flags; 378 union { 379 struct snd_pcm_mmap_status status; 380 unsigned char reserved[64]; 381 } s; 382 union { 383 struct snd_pcm_mmap_control control; 384 unsigned char reserved[64]; 385 } c; 386}; 387struct snd_xferi { 388 snd_pcm_sframes_t result; 389 void __user * buf; 390 snd_pcm_uframes_t frames; 391}; 392struct snd_xfern { 393 snd_pcm_sframes_t result; 394 void __user * __user * bufs; 395 snd_pcm_uframes_t frames; 396}; 397enum { 398 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, 399 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, 400 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 401 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 402}; 403enum { 404 SNDRV_CHMAP_UNKNOWN = 0, 405 SNDRV_CHMAP_NA, 406 SNDRV_CHMAP_MONO, 407 SNDRV_CHMAP_FL, 408 SNDRV_CHMAP_FR, 409 SNDRV_CHMAP_RL, 410 SNDRV_CHMAP_RR, 411 SNDRV_CHMAP_FC, 412 SNDRV_CHMAP_LFE, 413 SNDRV_CHMAP_SL, 414 SNDRV_CHMAP_SR, 415 SNDRV_CHMAP_RC, 416 SNDRV_CHMAP_FLC, 417 SNDRV_CHMAP_FRC, 418 SNDRV_CHMAP_RLC, 419 SNDRV_CHMAP_RRC, 420 SNDRV_CHMAP_FLW, 421 SNDRV_CHMAP_FRW, 422 SNDRV_CHMAP_FLH, 423 SNDRV_CHMAP_FCH, 424 SNDRV_CHMAP_FRH, 425 SNDRV_CHMAP_TC, 426 SNDRV_CHMAP_TFL, 427 SNDRV_CHMAP_TFR, 428 SNDRV_CHMAP_TFC, 429 SNDRV_CHMAP_TRL, 430 SNDRV_CHMAP_TRR, 431 SNDRV_CHMAP_TRC, 432 SNDRV_CHMAP_TFLC, 433 SNDRV_CHMAP_TFRC, 434 SNDRV_CHMAP_TSL, 435 SNDRV_CHMAP_TSR, 436 SNDRV_CHMAP_LLFE, 437 SNDRV_CHMAP_RLFE, 438 SNDRV_CHMAP_BC, 439 SNDRV_CHMAP_BLC, 440 SNDRV_CHMAP_BRC, 441 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC, 442}; 443#define SNDRV_CHMAP_POSITION_MASK 0xffff 444#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16) 445#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16) 446#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int) 447#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info) 448#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int) 449#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int) 450#define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int) 451#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params) 452#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params) 453#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12) 454#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params) 455#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status) 456#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t) 457#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22) 458#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr) 459#define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status) 460#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info) 461#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40) 462#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41) 463#define SNDRV_PCM_IOCTL_START _IO('A', 0x42) 464#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43) 465#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44) 466#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int) 467#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t) 468#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47) 469#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48) 470#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t) 471#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi) 472#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi) 473#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern) 474#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern) 475#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int) 476#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61) 477#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0) 478enum { 479 SNDRV_RAWMIDI_STREAM_OUTPUT = 0, 480 SNDRV_RAWMIDI_STREAM_INPUT, 481 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT, 482}; 483#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001 484#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002 485#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004 486struct snd_rawmidi_info { 487 unsigned int device; 488 unsigned int subdevice; 489 int stream; 490 int card; 491 unsigned int flags; 492 unsigned char id[64]; 493 unsigned char name[80]; 494 unsigned char subname[32]; 495 unsigned int subdevices_count; 496 unsigned int subdevices_avail; 497 unsigned char reserved[64]; 498}; 499struct snd_rawmidi_params { 500 int stream; 501 size_t buffer_size; 502 size_t avail_min; 503 unsigned int no_active_sensing : 1; 504 unsigned char reserved[16]; 505}; 506struct snd_rawmidi_status { 507 int stream; 508 struct timespec tstamp; 509 size_t avail; 510 size_t xruns; 511 unsigned char reserved[16]; 512}; 513#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int) 514#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info) 515#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params) 516#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status) 517#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int) 518#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int) 519#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6) 520enum { 521 SNDRV_TIMER_CLASS_NONE = - 1, 522 SNDRV_TIMER_CLASS_SLAVE = 0, 523 SNDRV_TIMER_CLASS_GLOBAL, 524 SNDRV_TIMER_CLASS_CARD, 525 SNDRV_TIMER_CLASS_PCM, 526 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM, 527}; 528enum { 529 SNDRV_TIMER_SCLASS_NONE = 0, 530 SNDRV_TIMER_SCLASS_APPLICATION, 531 SNDRV_TIMER_SCLASS_SEQUENCER, 532 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 533 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 534}; 535#define SNDRV_TIMER_GLOBAL_SYSTEM 0 536#define SNDRV_TIMER_GLOBAL_RTC 1 537#define SNDRV_TIMER_GLOBAL_HPET 2 538#define SNDRV_TIMER_GLOBAL_HRTIMER 3 539#define SNDRV_TIMER_FLG_SLAVE (1 << 0) 540struct snd_timer_id { 541 int dev_class; 542 int dev_sclass; 543 int card; 544 int device; 545 int subdevice; 546}; 547struct snd_timer_ginfo { 548 struct snd_timer_id tid; 549 unsigned int flags; 550 int card; 551 unsigned char id[64]; 552 unsigned char name[80]; 553 unsigned long reserved0; 554 unsigned long resolution; 555 unsigned long resolution_min; 556 unsigned long resolution_max; 557 unsigned int clients; 558 unsigned char reserved[32]; 559}; 560struct snd_timer_gparams { 561 struct snd_timer_id tid; 562 unsigned long period_num; 563 unsigned long period_den; 564 unsigned char reserved[32]; 565}; 566struct snd_timer_gstatus { 567 struct snd_timer_id tid; 568 unsigned long resolution; 569 unsigned long resolution_num; 570 unsigned long resolution_den; 571 unsigned char reserved[32]; 572}; 573struct snd_timer_select { 574 struct snd_timer_id id; 575 unsigned char reserved[32]; 576}; 577struct snd_timer_info { 578 unsigned int flags; 579 int card; 580 unsigned char id[64]; 581 unsigned char name[80]; 582 unsigned long reserved0; 583 unsigned long resolution; 584 unsigned char reserved[64]; 585}; 586#define SNDRV_TIMER_PSFLG_AUTO (1 << 0) 587#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1 << 1) 588#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1 << 2) 589struct snd_timer_params { 590 unsigned int flags; 591 unsigned int ticks; 592 unsigned int queue_size; 593 unsigned int reserved0; 594 unsigned int filter; 595 unsigned char reserved[60]; 596}; 597struct snd_timer_status { 598 struct timespec tstamp; 599 unsigned int resolution; 600 unsigned int lost; 601 unsigned int overrun; 602 unsigned int queue; 603 unsigned char reserved[64]; 604}; 605#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int) 606#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id) 607#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int) 608#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo) 609#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams) 610#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus) 611#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select) 612#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info) 613#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params) 614#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status) 615#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0) 616#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1) 617#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2) 618#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3) 619struct snd_timer_read { 620 unsigned int resolution; 621 unsigned int ticks; 622}; 623enum { 624 SNDRV_TIMER_EVENT_RESOLUTION = 0, 625 SNDRV_TIMER_EVENT_TICK, 626 SNDRV_TIMER_EVENT_START, 627 SNDRV_TIMER_EVENT_STOP, 628 SNDRV_TIMER_EVENT_CONTINUE, 629 SNDRV_TIMER_EVENT_PAUSE, 630 SNDRV_TIMER_EVENT_EARLY, 631 SNDRV_TIMER_EVENT_SUSPEND, 632 SNDRV_TIMER_EVENT_RESUME, 633 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10, 634 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10, 635 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10, 636 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10, 637 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10, 638 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10, 639}; 640struct snd_timer_tread { 641 int event; 642 struct timespec tstamp; 643 unsigned int val; 644}; 645#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7) 646struct snd_ctl_card_info { 647 int card; 648 int pad; 649 unsigned char id[16]; 650 unsigned char driver[16]; 651 unsigned char name[32]; 652 unsigned char longname[80]; 653 unsigned char reserved_[16]; 654 unsigned char mixername[80]; 655 unsigned char components[128]; 656}; 657typedef int __bitwise snd_ctl_elem_type_t; 658#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) 659#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1) 660#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2) 661#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3) 662#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) 663#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) 664#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) 665#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64 666typedef int __bitwise snd_ctl_elem_iface_t; 667#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) 668#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1) 669#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2) 670#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3) 671#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4) 672#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5) 673#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6) 674#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER 675#define SNDRV_CTL_ELEM_ACCESS_READ (1 << 0) 676#define SNDRV_CTL_ELEM_ACCESS_WRITE (1 << 1) 677#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE) 678#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1 << 2) 679#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1 << 3) 680#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1 << 4) 681#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1 << 5) 682#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ | SNDRV_CTL_ELEM_ACCESS_TLV_WRITE) 683#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1 << 6) 684#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1 << 8) 685#define SNDRV_CTL_ELEM_ACCESS_LOCK (1 << 9) 686#define SNDRV_CTL_ELEM_ACCESS_OWNER (1 << 10) 687#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1 << 28) 688#define SNDRV_CTL_ELEM_ACCESS_USER (1 << 29) 689#define SNDRV_CTL_POWER_D0 0x0000 690#define SNDRV_CTL_POWER_D1 0x0100 691#define SNDRV_CTL_POWER_D2 0x0200 692#define SNDRV_CTL_POWER_D3 0x0300 693#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3 | 0x0000) 694#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3 | 0x0001) 695#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44 696struct snd_ctl_elem_id { 697 unsigned int numid; 698 snd_ctl_elem_iface_t iface; 699 unsigned int device; 700 unsigned int subdevice; 701 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 702 unsigned int index; 703}; 704struct snd_ctl_elem_list { 705 unsigned int offset; 706 unsigned int space; 707 unsigned int used; 708 unsigned int count; 709 struct snd_ctl_elem_id __user * pids; 710 unsigned char reserved[50]; 711}; 712struct snd_ctl_elem_info { 713 struct snd_ctl_elem_id id; 714 snd_ctl_elem_type_t type; 715 unsigned int access; 716 unsigned int count; 717 __kernel_pid_t owner; 718 union { 719 struct { 720 long min; 721 long max; 722 long step; 723 } integer; 724 struct { 725 long long min; 726 long long max; 727 long long step; 728 } integer64; 729 struct { 730 unsigned int items; 731 unsigned int item; 732 char name[64]; 733 __u64 names_ptr; 734 unsigned int names_length; 735 } enumerated; 736 unsigned char reserved[128]; 737 } value; 738 union { 739 unsigned short d[4]; 740 unsigned short * d_ptr; 741 } dimen; 742 unsigned char reserved[64 - 4 * sizeof(unsigned short)]; 743}; 744struct snd_ctl_elem_value { 745 struct snd_ctl_elem_id id; 746 unsigned int indirect : 1; 747 union { 748 union { 749 long value[128]; 750 long * value_ptr; 751 } integer; 752 union { 753 long long value[64]; 754 long long * value_ptr; 755 } integer64; 756 union { 757 unsigned int item[128]; 758 unsigned int * item_ptr; 759 } enumerated; 760 union { 761 unsigned char data[512]; 762 unsigned char * data_ptr; 763 } bytes; 764 struct snd_aes_iec958 iec958; 765 } value; 766 struct timespec tstamp; 767 unsigned char reserved[128 - sizeof(struct timespec)]; 768}; 769struct snd_ctl_tlv { 770 unsigned int numid; 771 unsigned int length; 772 unsigned int tlv[0]; 773}; 774#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int) 775#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info) 776#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list) 777#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info) 778#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value) 779#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value) 780#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id) 781#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id) 782#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int) 783#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info) 784#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info) 785#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id) 786#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv) 787#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv) 788#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv) 789#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int) 790#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info) 791#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int) 792#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info) 793#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int) 794#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int) 795#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info) 796#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int) 797#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int) 798#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int) 799enum sndrv_ctl_event_type { 800 SNDRV_CTL_EVENT_ELEM = 0, 801 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM, 802}; 803#define SNDRV_CTL_EVENT_MASK_VALUE (1 << 0) 804#define SNDRV_CTL_EVENT_MASK_INFO (1 << 1) 805#define SNDRV_CTL_EVENT_MASK_ADD (1 << 2) 806#define SNDRV_CTL_EVENT_MASK_TLV (1 << 3) 807#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) 808struct snd_ctl_event { 809 int type; 810 union { 811 struct { 812 unsigned int mask; 813 struct snd_ctl_elem_id id; 814 } elem; 815 unsigned char data8[60]; 816 } data; 817}; 818#define SNDRV_CTL_NAME_NONE "" 819#define SNDRV_CTL_NAME_PLAYBACK "Playback " 820#define SNDRV_CTL_NAME_CAPTURE "Capture " 821#define SNDRV_CTL_NAME_IEC958_NONE "" 822#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch" 823#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume" 824#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default" 825#define SNDRV_CTL_NAME_IEC958_MASK "Mask" 826#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask" 827#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask" 828#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream" 829#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_ ##direction SNDRV_CTL_NAME_IEC958_ ##what 830#endif 831