1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef _UAPI__LINUX_MDIO_H__ 20#define _UAPI__LINUX_MDIO_H__ 21#include <linux/types.h> 22#include <linux/mii.h> 23#define MDIO_MMD_PMAPMD 1 24#define MDIO_MMD_WIS 2 25#define MDIO_MMD_PCS 3 26#define MDIO_MMD_PHYXS 4 27#define MDIO_MMD_DTEXS 5 28#define MDIO_MMD_TC 6 29#define MDIO_MMD_AN 7 30#define MDIO_MMD_C22EXT 29 31#define MDIO_MMD_VEND1 30 32#define MDIO_MMD_VEND2 31 33#define MDIO_CTRL1 MII_BMCR 34#define MDIO_STAT1 MII_BMSR 35#define MDIO_DEVID1 MII_PHYSID1 36#define MDIO_DEVID2 MII_PHYSID2 37#define MDIO_SPEED 4 38#define MDIO_DEVS1 5 39#define MDIO_DEVS2 6 40#define MDIO_CTRL2 7 41#define MDIO_STAT2 8 42#define MDIO_PMA_TXDIS 9 43#define MDIO_PMA_RXDET 10 44#define MDIO_PMA_EXTABLE 11 45#define MDIO_PKGID1 14 46#define MDIO_PKGID2 15 47#define MDIO_AN_ADVERTISE 16 48#define MDIO_AN_LPA 19 49#define MDIO_PCS_EEE_ABLE 20 50#define MDIO_PCS_EEE_WK_ERR 22 51#define MDIO_PHYXS_LNSTAT 24 52#define MDIO_AN_EEE_ADV 60 53#define MDIO_AN_EEE_LPABLE 61 54#define MDIO_PMA_10GBT_SWAPPOL 130 55#define MDIO_PMA_10GBT_TXPWR 131 56#define MDIO_PMA_10GBT_SNR 133 57#define MDIO_PMA_10GBR_FECABLE 170 58#define MDIO_PCS_10GBX_STAT1 24 59#define MDIO_PCS_10GBRT_STAT1 32 60#define MDIO_PCS_10GBRT_STAT2 33 61#define MDIO_AN_10GBT_CTRL 32 62#define MDIO_AN_10GBT_STAT 33 63#define MDIO_PMA_LASI_RXCTRL 0x9000 64#define MDIO_PMA_LASI_TXCTRL 0x9001 65#define MDIO_PMA_LASI_CTRL 0x9002 66#define MDIO_PMA_LASI_RXSTAT 0x9003 67#define MDIO_PMA_LASI_TXSTAT 0x9004 68#define MDIO_PMA_LASI_STAT 0x9005 69#define MDIO_CTRL1_SPEEDSELEXT (BMCR_SPEED1000 | BMCR_SPEED100) 70#define MDIO_CTRL1_SPEEDSEL (MDIO_CTRL1_SPEEDSELEXT | 0x003c) 71#define MDIO_CTRL1_FULLDPLX BMCR_FULLDPLX 72#define MDIO_CTRL1_LPOWER BMCR_PDOWN 73#define MDIO_CTRL1_RESET BMCR_RESET 74#define MDIO_PMA_CTRL1_LOOPBACK 0x0001 75#define MDIO_PMA_CTRL1_SPEED1000 BMCR_SPEED1000 76#define MDIO_PMA_CTRL1_SPEED100 BMCR_SPEED100 77#define MDIO_PCS_CTRL1_LOOPBACK BMCR_LOOPBACK 78#define MDIO_PHYXS_CTRL1_LOOPBACK BMCR_LOOPBACK 79#define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART 80#define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE 81#define MDIO_AN_CTRL1_XNP 0x2000 82#define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400 83#define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00) 84#define MDIO_CTRL1_SPEED10P2B (MDIO_CTRL1_SPEEDSELEXT | 0x04) 85#define MDIO_STAT1_LPOWERABLE 0x0002 86#define MDIO_STAT1_LSTATUS BMSR_LSTATUS 87#define MDIO_STAT1_FAULT 0x0080 88#define MDIO_AN_STAT1_LPABLE 0x0001 89#define MDIO_AN_STAT1_ABLE BMSR_ANEGCAPABLE 90#define MDIO_AN_STAT1_RFAULT BMSR_RFAULT 91#define MDIO_AN_STAT1_COMPLETE BMSR_ANEGCOMPLETE 92#define MDIO_AN_STAT1_PAGE 0x0040 93#define MDIO_AN_STAT1_XNP 0x0080 94#define MDIO_SPEED_10G 0x0001 95#define MDIO_PMA_SPEED_2B 0x0002 96#define MDIO_PMA_SPEED_10P 0x0004 97#define MDIO_PMA_SPEED_1000 0x0010 98#define MDIO_PMA_SPEED_100 0x0020 99#define MDIO_PMA_SPEED_10 0x0040 100#define MDIO_PCS_SPEED_10P2B 0x0002 101#define MDIO_DEVS_PRESENT(devad) (1 << (devad)) 102#define MDIO_DEVS_PMAPMD MDIO_DEVS_PRESENT(MDIO_MMD_PMAPMD) 103#define MDIO_DEVS_WIS MDIO_DEVS_PRESENT(MDIO_MMD_WIS) 104#define MDIO_DEVS_PCS MDIO_DEVS_PRESENT(MDIO_MMD_PCS) 105#define MDIO_DEVS_PHYXS MDIO_DEVS_PRESENT(MDIO_MMD_PHYXS) 106#define MDIO_DEVS_DTEXS MDIO_DEVS_PRESENT(MDIO_MMD_DTEXS) 107#define MDIO_DEVS_TC MDIO_DEVS_PRESENT(MDIO_MMD_TC) 108#define MDIO_DEVS_AN MDIO_DEVS_PRESENT(MDIO_MMD_AN) 109#define MDIO_DEVS_C22EXT MDIO_DEVS_PRESENT(MDIO_MMD_C22EXT) 110#define MDIO_PMA_CTRL2_TYPE 0x000f 111#define MDIO_PMA_CTRL2_10GBCX4 0x0000 112#define MDIO_PMA_CTRL2_10GBEW 0x0001 113#define MDIO_PMA_CTRL2_10GBLW 0x0002 114#define MDIO_PMA_CTRL2_10GBSW 0x0003 115#define MDIO_PMA_CTRL2_10GBLX4 0x0004 116#define MDIO_PMA_CTRL2_10GBER 0x0005 117#define MDIO_PMA_CTRL2_10GBLR 0x0006 118#define MDIO_PMA_CTRL2_10GBSR 0x0007 119#define MDIO_PMA_CTRL2_10GBLRM 0x0008 120#define MDIO_PMA_CTRL2_10GBT 0x0009 121#define MDIO_PMA_CTRL2_10GBKX4 0x000a 122#define MDIO_PMA_CTRL2_10GBKR 0x000b 123#define MDIO_PMA_CTRL2_1000BT 0x000c 124#define MDIO_PMA_CTRL2_1000BKX 0x000d 125#define MDIO_PMA_CTRL2_100BTX 0x000e 126#define MDIO_PMA_CTRL2_10BT 0x000f 127#define MDIO_PCS_CTRL2_TYPE 0x0003 128#define MDIO_PCS_CTRL2_10GBR 0x0000 129#define MDIO_PCS_CTRL2_10GBX 0x0001 130#define MDIO_PCS_CTRL2_10GBW 0x0002 131#define MDIO_PCS_CTRL2_10GBT 0x0003 132#define MDIO_STAT2_RXFAULT 0x0400 133#define MDIO_STAT2_TXFAULT 0x0800 134#define MDIO_STAT2_DEVPRST 0xc000 135#define MDIO_STAT2_DEVPRST_VAL 0x8000 136#define MDIO_PMA_STAT2_LBABLE 0x0001 137#define MDIO_PMA_STAT2_10GBEW 0x0002 138#define MDIO_PMA_STAT2_10GBLW 0x0004 139#define MDIO_PMA_STAT2_10GBSW 0x0008 140#define MDIO_PMA_STAT2_10GBLX4 0x0010 141#define MDIO_PMA_STAT2_10GBER 0x0020 142#define MDIO_PMA_STAT2_10GBLR 0x0040 143#define MDIO_PMA_STAT2_10GBSR 0x0080 144#define MDIO_PMD_STAT2_TXDISAB 0x0100 145#define MDIO_PMA_STAT2_EXTABLE 0x0200 146#define MDIO_PMA_STAT2_RXFLTABLE 0x1000 147#define MDIO_PMA_STAT2_TXFLTABLE 0x2000 148#define MDIO_PCS_STAT2_10GBR 0x0001 149#define MDIO_PCS_STAT2_10GBX 0x0002 150#define MDIO_PCS_STAT2_10GBW 0x0004 151#define MDIO_PCS_STAT2_RXFLTABLE 0x1000 152#define MDIO_PCS_STAT2_TXFLTABLE 0x2000 153#define MDIO_PMD_TXDIS_GLOBAL 0x0001 154#define MDIO_PMD_TXDIS_0 0x0002 155#define MDIO_PMD_TXDIS_1 0x0004 156#define MDIO_PMD_TXDIS_2 0x0008 157#define MDIO_PMD_TXDIS_3 0x0010 158#define MDIO_PMD_RXDET_GLOBAL 0x0001 159#define MDIO_PMD_RXDET_0 0x0002 160#define MDIO_PMD_RXDET_1 0x0004 161#define MDIO_PMD_RXDET_2 0x0008 162#define MDIO_PMD_RXDET_3 0x0010 163#define MDIO_PMA_EXTABLE_10GCX4 0x0001 164#define MDIO_PMA_EXTABLE_10GBLRM 0x0002 165#define MDIO_PMA_EXTABLE_10GBT 0x0004 166#define MDIO_PMA_EXTABLE_10GBKX4 0x0008 167#define MDIO_PMA_EXTABLE_10GBKR 0x0010 168#define MDIO_PMA_EXTABLE_1000BT 0x0020 169#define MDIO_PMA_EXTABLE_1000BKX 0x0040 170#define MDIO_PMA_EXTABLE_100BTX 0x0080 171#define MDIO_PMA_EXTABLE_10BT 0x0100 172#define MDIO_PHYXS_LNSTAT_SYNC0 0x0001 173#define MDIO_PHYXS_LNSTAT_SYNC1 0x0002 174#define MDIO_PHYXS_LNSTAT_SYNC2 0x0004 175#define MDIO_PHYXS_LNSTAT_SYNC3 0x0008 176#define MDIO_PHYXS_LNSTAT_ALIGN 0x1000 177#define MDIO_PMA_10GBT_SWAPPOL_ABNX 0x0001 178#define MDIO_PMA_10GBT_SWAPPOL_CDNX 0x0002 179#define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100 180#define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200 181#define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400 182#define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800 183#define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 184#define MDIO_PMA_10GBT_SNR_BIAS 0x8000 185#define MDIO_PMA_10GBT_SNR_MAX 127 186#define MDIO_PMA_10GBR_FECABLE_ABLE 0x0001 187#define MDIO_PMA_10GBR_FECABLE_ERRABLE 0x0002 188#define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 189#define MDIO_PCS_10GBRT_STAT2_ERR 0x00ff 190#define MDIO_PCS_10GBRT_STAT2_BER 0x3f00 191#define MDIO_AN_10GBT_CTRL_ADV10G 0x1000 192#define MDIO_AN_10GBT_STAT_LPTRR 0x0200 193#define MDIO_AN_10GBT_STAT_LPLTABLE 0x0400 194#define MDIO_AN_10GBT_STAT_LP10G 0x0800 195#define MDIO_AN_10GBT_STAT_REMOK 0x1000 196#define MDIO_AN_10GBT_STAT_LOCOK 0x2000 197#define MDIO_AN_10GBT_STAT_MS 0x4000 198#define MDIO_AN_10GBT_STAT_MSFLT 0x8000 199#define MDIO_AN_EEE_ADV_100TX 0x0002 200#define MDIO_AN_EEE_ADV_1000T 0x0004 201#define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX 202#define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T 203#define MDIO_EEE_10GT 0x0008 204#define MDIO_EEE_1000KX 0x0010 205#define MDIO_EEE_10GKX4 0x0020 206#define MDIO_EEE_10GKR 0x0040 207#define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001 208#define MDIO_PMA_LASI_RX_PCSLFLT 0x0008 209#define MDIO_PMA_LASI_RX_PMALFLT 0x0010 210#define MDIO_PMA_LASI_RX_OPTICPOWERFLT 0x0020 211#define MDIO_PMA_LASI_RX_WISLFLT 0x0200 212#define MDIO_PMA_LASI_TX_PHYXSLFLT 0x0001 213#define MDIO_PMA_LASI_TX_PCSLFLT 0x0008 214#define MDIO_PMA_LASI_TX_PMALFLT 0x0010 215#define MDIO_PMA_LASI_TX_LASERPOWERFLT 0x0080 216#define MDIO_PMA_LASI_TX_LASERTEMPFLT 0x0100 217#define MDIO_PMA_LASI_TX_LASERBICURRFLT 0x0200 218#define MDIO_PMA_LASI_LSALARM 0x0001 219#define MDIO_PMA_LASI_TXALARM 0x0002 220#define MDIO_PMA_LASI_RXALARM 0x0004 221#define MDIO_PHY_ID_C45 0x8000 222#define MDIO_PHY_ID_PRTAD 0x03e0 223#define MDIO_PHY_ID_DEVAD 0x001f 224#define MDIO_PHY_ID_C45_MASK (MDIO_PHY_ID_C45 | MDIO_PHY_ID_PRTAD | MDIO_PHY_ID_DEVAD) 225#endif 226