1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPIVFIO_H
20#define _UAPIVFIO_H
21#include <linux/types.h>
22#include <linux/ioctl.h>
23#define VFIO_API_VERSION 0
24#define VFIO_TYPE1_IOMMU 1
25#define VFIO_SPAPR_TCE_IOMMU 2
26#define VFIO_TYPE1v2_IOMMU 3
27#define VFIO_DMA_CC_IOMMU 4
28#define VFIO_EEH 5
29#define VFIO_TYPE1_NESTING_IOMMU 6
30#define VFIO_SPAPR_TCE_v2_IOMMU 7
31#define VFIO_NOIOMMU_IOMMU 8
32#define VFIO_TYPE (';')
33#define VFIO_BASE 100
34struct vfio_info_cap_header {
35  __u16 id;
36  __u16 version;
37  __u32 next;
38};
39#define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0)
40#define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1)
41#define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2)
42struct vfio_group_status {
43  __u32 argsz;
44  __u32 flags;
45#define VFIO_GROUP_FLAGS_VIABLE (1 << 0)
46#define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1)
47};
48#define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3)
49#define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4)
50#define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5)
51#define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6)
52struct vfio_device_info {
53  __u32 argsz;
54  __u32 flags;
55#define VFIO_DEVICE_FLAGS_RESET (1 << 0)
56#define VFIO_DEVICE_FLAGS_PCI (1 << 1)
57#define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2)
58#define VFIO_DEVICE_FLAGS_AMBA (1 << 3)
59#define VFIO_DEVICE_FLAGS_CCW (1 << 4)
60  __u32 num_regions;
61  __u32 num_irqs;
62};
63#define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7)
64#define VFIO_DEVICE_API_PCI_STRING "vfio-pci"
65#define VFIO_DEVICE_API_PLATFORM_STRING "vfio-platform"
66#define VFIO_DEVICE_API_AMBA_STRING "vfio-amba"
67#define VFIO_DEVICE_API_CCW_STRING "vfio-ccw"
68struct vfio_region_info {
69  __u32 argsz;
70  __u32 flags;
71#define VFIO_REGION_INFO_FLAG_READ (1 << 0)
72#define VFIO_REGION_INFO_FLAG_WRITE (1 << 1)
73#define VFIO_REGION_INFO_FLAG_MMAP (1 << 2)
74#define VFIO_REGION_INFO_FLAG_CAPS (1 << 3)
75  __u32 index;
76  __u32 cap_offset;
77  __u64 size;
78  __u64 offset;
79};
80#define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8)
81#define VFIO_REGION_INFO_CAP_SPARSE_MMAP 1
82struct vfio_region_sparse_mmap_area {
83  __u64 offset;
84  __u64 size;
85};
86struct vfio_region_info_cap_sparse_mmap {
87  struct vfio_info_cap_header header;
88  __u32 nr_areas;
89  __u32 reserved;
90  struct vfio_region_sparse_mmap_area areas[];
91};
92#define VFIO_REGION_INFO_CAP_TYPE 2
93struct vfio_region_info_cap_type {
94  struct vfio_info_cap_header header;
95  __u32 type;
96  __u32 subtype;
97};
98#define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
99#define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff)
100#define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
101#define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
102#define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3)
103struct vfio_irq_info {
104  __u32 argsz;
105  __u32 flags;
106#define VFIO_IRQ_INFO_EVENTFD (1 << 0)
107#define VFIO_IRQ_INFO_MASKABLE (1 << 1)
108#define VFIO_IRQ_INFO_AUTOMASKED (1 << 2)
109#define VFIO_IRQ_INFO_NORESIZE (1 << 3)
110  __u32 index;
111  __u32 count;
112};
113#define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9)
114struct vfio_irq_set {
115  __u32 argsz;
116  __u32 flags;
117#define VFIO_IRQ_SET_DATA_NONE (1 << 0)
118#define VFIO_IRQ_SET_DATA_BOOL (1 << 1)
119#define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2)
120#define VFIO_IRQ_SET_ACTION_MASK (1 << 3)
121#define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4)
122#define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5)
123  __u32 index;
124  __u32 start;
125  __u32 count;
126  __u8 data[];
127};
128#define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10)
129#define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_DATA_BOOL | VFIO_IRQ_SET_DATA_EVENTFD)
130#define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | VFIO_IRQ_SET_ACTION_UNMASK | VFIO_IRQ_SET_ACTION_TRIGGER)
131#define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11)
132enum {
133  VFIO_PCI_BAR0_REGION_INDEX,
134  VFIO_PCI_BAR1_REGION_INDEX,
135  VFIO_PCI_BAR2_REGION_INDEX,
136  VFIO_PCI_BAR3_REGION_INDEX,
137  VFIO_PCI_BAR4_REGION_INDEX,
138  VFIO_PCI_BAR5_REGION_INDEX,
139  VFIO_PCI_ROM_REGION_INDEX,
140  VFIO_PCI_CONFIG_REGION_INDEX,
141  VFIO_PCI_VGA_REGION_INDEX,
142  VFIO_PCI_NUM_REGIONS = 9
143};
144enum {
145  VFIO_PCI_INTX_IRQ_INDEX,
146  VFIO_PCI_MSI_IRQ_INDEX,
147  VFIO_PCI_MSIX_IRQ_INDEX,
148  VFIO_PCI_ERR_IRQ_INDEX,
149  VFIO_PCI_REQ_IRQ_INDEX,
150  VFIO_PCI_NUM_IRQS
151};
152enum {
153  VFIO_CCW_CONFIG_REGION_INDEX,
154  VFIO_CCW_NUM_REGIONS
155};
156enum {
157  VFIO_CCW_IO_IRQ_INDEX,
158  VFIO_CCW_NUM_IRQS
159};
160struct vfio_pci_dependent_device {
161  __u32 group_id;
162  __u16 segment;
163  __u8 bus;
164  __u8 devfn;
165};
166struct vfio_pci_hot_reset_info {
167  __u32 argsz;
168  __u32 flags;
169  __u32 count;
170  struct vfio_pci_dependent_device devices[];
171};
172#define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
173struct vfio_pci_hot_reset {
174  __u32 argsz;
175  __u32 flags;
176  __u32 count;
177  __s32 group_fds[];
178};
179#define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13)
180struct vfio_iommu_type1_info {
181  __u32 argsz;
182  __u32 flags;
183#define VFIO_IOMMU_INFO_PGSIZES (1 << 0)
184  __u64 iova_pgsizes;
185};
186#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
187struct vfio_iommu_type1_dma_map {
188  __u32 argsz;
189  __u32 flags;
190#define VFIO_DMA_MAP_FLAG_READ (1 << 0)
191#define VFIO_DMA_MAP_FLAG_WRITE (1 << 1)
192  __u64 vaddr;
193  __u64 iova;
194  __u64 size;
195};
196#define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13)
197struct vfio_iommu_type1_dma_unmap {
198  __u32 argsz;
199  __u32 flags;
200  __u64 iova;
201  __u64 size;
202};
203#define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14)
204#define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15)
205#define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16)
206struct vfio_iommu_spapr_tce_ddw_info {
207  __u64 pgsizes;
208  __u32 max_dynamic_windows_supported;
209  __u32 levels;
210};
211struct vfio_iommu_spapr_tce_info {
212  __u32 argsz;
213  __u32 flags;
214#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0)
215  __u32 dma32_window_start;
216  __u32 dma32_window_size;
217  struct vfio_iommu_spapr_tce_ddw_info ddw;
218};
219#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
220struct vfio_eeh_pe_err {
221  __u32 type;
222  __u32 func;
223  __u64 addr;
224  __u64 mask;
225};
226struct vfio_eeh_pe_op {
227  __u32 argsz;
228  __u32 flags;
229  __u32 op;
230  union {
231    struct vfio_eeh_pe_err err;
232  };
233};
234#define VFIO_EEH_PE_DISABLE 0
235#define VFIO_EEH_PE_ENABLE 1
236#define VFIO_EEH_PE_UNFREEZE_IO 2
237#define VFIO_EEH_PE_UNFREEZE_DMA 3
238#define VFIO_EEH_PE_GET_STATE 4
239#define VFIO_EEH_PE_STATE_NORMAL 0
240#define VFIO_EEH_PE_STATE_RESET 1
241#define VFIO_EEH_PE_STATE_STOPPED 2
242#define VFIO_EEH_PE_STATE_STOPPED_DMA 4
243#define VFIO_EEH_PE_STATE_UNAVAIL 5
244#define VFIO_EEH_PE_RESET_DEACTIVATE 5
245#define VFIO_EEH_PE_RESET_HOT 6
246#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7
247#define VFIO_EEH_PE_CONFIGURE 8
248#define VFIO_EEH_PE_INJECT_ERR 9
249#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21)
250struct vfio_iommu_spapr_register_memory {
251  __u32 argsz;
252  __u32 flags;
253  __u64 vaddr;
254  __u64 size;
255};
256#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17)
257#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18)
258struct vfio_iommu_spapr_tce_create {
259  __u32 argsz;
260  __u32 flags;
261  __u32 page_shift;
262  __u32 __resv1;
263  __u64 window_size;
264  __u32 levels;
265  __u32 __resv2;
266  __u64 start_addr;
267};
268#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19)
269struct vfio_iommu_spapr_tce_remove {
270  __u32 argsz;
271  __u32 flags;
272  __u64 start_addr;
273};
274#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20)
275#endif
276