drm_mode.h revision 655a7c081f83b8351ed5f11a6c6accd9458293a8
1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef _DRM_MODE_H 20#define _DRM_MODE_H 21#include <linux/types.h> 22#define DRM_DISPLAY_INFO_LEN 32 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#define DRM_CONNECTOR_NAME_LEN 32 25#define DRM_DISPLAY_MODE_LEN 32 26#define DRM_PROP_NAME_LEN 32 27#define DRM_MODE_TYPE_BUILTIN (1<<0) 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) 30#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) 31#define DRM_MODE_TYPE_PREFERRED (1<<3) 32#define DRM_MODE_TYPE_DEFAULT (1<<4) 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#define DRM_MODE_TYPE_USERDEF (1<<5) 35#define DRM_MODE_TYPE_DRIVER (1<<6) 36#define DRM_MODE_FLAG_PHSYNC (1<<0) 37#define DRM_MODE_FLAG_NHSYNC (1<<1) 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39#define DRM_MODE_FLAG_PVSYNC (1<<2) 40#define DRM_MODE_FLAG_NVSYNC (1<<3) 41#define DRM_MODE_FLAG_INTERLACE (1<<4) 42#define DRM_MODE_FLAG_DBLSCAN (1<<5) 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44#define DRM_MODE_FLAG_CSYNC (1<<6) 45#define DRM_MODE_FLAG_PCSYNC (1<<7) 46#define DRM_MODE_FLAG_NCSYNC (1<<8) 47#define DRM_MODE_FLAG_HSKEW (1<<9) 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49#define DRM_MODE_FLAG_BCAST (1<<10) 50#define DRM_MODE_FLAG_PIXMUX (1<<11) 51#define DRM_MODE_FLAG_DBLCLK (1<<12) 52#define DRM_MODE_FLAG_CLKDIV2 (1<<13) 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54#define DRM_MODE_DPMS_ON 0 55#define DRM_MODE_DPMS_STANDBY 1 56#define DRM_MODE_DPMS_SUSPEND 2 57#define DRM_MODE_DPMS_OFF 3 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59#define DRM_MODE_SCALE_NONE 0 60#define DRM_MODE_SCALE_FULLSCREEN 1 61#define DRM_MODE_SCALE_CENTER 2 62#define DRM_MODE_SCALE_ASPECT 3 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64#define DRM_MODE_DITHERING_OFF 0 65#define DRM_MODE_DITHERING_ON 1 66#define DRM_MODE_DITHERING_AUTO 2 67#define DRM_MODE_DIRTY_OFF 0 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69#define DRM_MODE_DIRTY_ON 1 70#define DRM_MODE_DIRTY_ANNOTATE 2 71struct drm_mode_modeinfo { 72 __u32 clock; 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; 75 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; 76 __u32 vrefresh; 77 __u32 flags; 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 __u32 type; 80 char name[DRM_DISPLAY_MODE_LEN]; 81}; 82struct drm_mode_card_res { 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 __u64 fb_id_ptr; 85 __u64 crtc_id_ptr; 86 __u64 connector_id_ptr; 87 __u64 encoder_id_ptr; 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 __u32 count_fbs; 90 __u32 count_crtcs; 91 __u32 count_connectors; 92 __u32 count_encoders; 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 __u32 min_width, max_width; 95 __u32 min_height, max_height; 96}; 97struct drm_mode_crtc { 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 __u64 set_connectors_ptr; 100 __u32 count_connectors; 101 __u32 crtc_id; 102 __u32 fb_id; 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 __u32 x, y; 105 __u32 gamma_size; 106 __u32 mode_valid; 107 struct drm_mode_modeinfo mode; 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109}; 110#define DRM_MODE_PRESENT_TOP_FIELD (1<<0) 111#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1) 112struct drm_mode_set_plane { 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 __u32 plane_id; 115 __u32 crtc_id; 116 __u32 fb_id; 117 __u32 flags; 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 __s32 crtc_x, crtc_y; 120 __u32 crtc_w, crtc_h; 121 __u32 src_x, src_y; 122 __u32 src_h, src_w; 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124}; 125struct drm_mode_get_plane { 126 __u32 plane_id; 127 __u32 crtc_id; 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 __u32 fb_id; 130 __u32 possible_crtcs; 131 __u32 gamma_size; 132 __u32 count_format_types; 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 __u64 format_type_ptr; 135}; 136struct drm_mode_get_plane_res { 137 __u64 plane_id_ptr; 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 __u32 count_planes; 140}; 141#define DRM_MODE_ENCODER_NONE 0 142#define DRM_MODE_ENCODER_DAC 1 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144#define DRM_MODE_ENCODER_TMDS 2 145#define DRM_MODE_ENCODER_LVDS 3 146#define DRM_MODE_ENCODER_TVDAC 4 147#define DRM_MODE_ENCODER_VIRTUAL 5 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149struct drm_mode_get_encoder { 150 __u32 encoder_id; 151 __u32 encoder_type; 152 __u32 crtc_id; 153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 __u32 possible_crtcs; 155 __u32 possible_clones; 156}; 157#define DRM_MODE_SUBCONNECTOR_Automatic 0 158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159#define DRM_MODE_SUBCONNECTOR_Unknown 0 160#define DRM_MODE_SUBCONNECTOR_DVID 3 161#define DRM_MODE_SUBCONNECTOR_DVIA 4 162#define DRM_MODE_SUBCONNECTOR_Composite 5 163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164#define DRM_MODE_SUBCONNECTOR_SVIDEO 6 165#define DRM_MODE_SUBCONNECTOR_Component 8 166#define DRM_MODE_SUBCONNECTOR_SCART 9 167#define DRM_MODE_CONNECTOR_Unknown 0 168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169#define DRM_MODE_CONNECTOR_VGA 1 170#define DRM_MODE_CONNECTOR_DVII 2 171#define DRM_MODE_CONNECTOR_DVID 3 172#define DRM_MODE_CONNECTOR_DVIA 4 173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174#define DRM_MODE_CONNECTOR_Composite 5 175#define DRM_MODE_CONNECTOR_SVIDEO 6 176#define DRM_MODE_CONNECTOR_LVDS 7 177#define DRM_MODE_CONNECTOR_Component 8 178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179#define DRM_MODE_CONNECTOR_9PinDIN 9 180#define DRM_MODE_CONNECTOR_DisplayPort 10 181#define DRM_MODE_CONNECTOR_HDMIA 11 182#define DRM_MODE_CONNECTOR_HDMIB 12 183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184#define DRM_MODE_CONNECTOR_TV 13 185#define DRM_MODE_CONNECTOR_eDP 14 186#define DRM_MODE_CONNECTOR_VIRTUAL 15 187struct drm_mode_get_connector { 188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 __u64 encoders_ptr; 190 __u64 modes_ptr; 191 __u64 props_ptr; 192 __u64 prop_values_ptr; 193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 __u32 count_modes; 195 __u32 count_props; 196 __u32 count_encoders; 197 __u32 encoder_id; 198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 __u32 connector_id; 200 __u32 connector_type; 201 __u32 connector_type_id; 202 __u32 connection; 203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 __u32 mm_width, mm_height; 205 __u32 subpixel; 206}; 207#define DRM_MODE_PROP_PENDING (1<<0) 208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209#define DRM_MODE_PROP_RANGE (1<<1) 210#define DRM_MODE_PROP_IMMUTABLE (1<<2) 211#define DRM_MODE_PROP_ENUM (1<<3) 212#define DRM_MODE_PROP_BLOB (1<<4) 213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214#define DRM_MODE_PROP_BITMASK (1<<5) 215struct drm_mode_property_enum { 216 __u64 value; 217 char name[DRM_PROP_NAME_LEN]; 218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219}; 220struct drm_mode_get_property { 221 __u64 values_ptr; 222 __u64 enum_blob_ptr; 223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 __u32 prop_id; 225 __u32 flags; 226 char name[DRM_PROP_NAME_LEN]; 227 __u32 count_values; 228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 __u32 count_enum_blobs; 230}; 231struct drm_mode_connector_set_property { 232 __u64 value; 233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 __u32 prop_id; 235 __u32 connector_id; 236}; 237struct drm_mode_obj_get_properties { 238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 __u64 props_ptr; 240 __u64 prop_values_ptr; 241 __u32 count_props; 242 __u32 obj_id; 243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 __u32 obj_type; 245}; 246struct drm_mode_obj_set_property { 247 __u64 value; 248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 __u32 prop_id; 250 __u32 obj_id; 251 __u32 obj_type; 252}; 253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254struct drm_mode_get_blob { 255 __u32 blob_id; 256 __u32 length; 257 __u64 data; 258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259}; 260struct drm_mode_fb_cmd { 261 __u32 fb_id; 262 __u32 width, height; 263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 __u32 pitch; 265 __u32 bpp; 266 __u32 depth; 267 __u32 handle; 268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269}; 270#define DRM_MODE_FB_INTERLACED (1<<0) 271struct drm_mode_fb_cmd2 { 272 __u32 fb_id; 273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 __u32 width, height; 275 __u32 pixel_format; 276 __u32 flags; 277 __u32 handles[4]; 278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 __u32 pitches[4]; 280 __u32 offsets[4]; 281}; 282#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 285#define DRM_MODE_FB_DIRTY_FLAGS 0x03 286#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 287struct drm_mode_fb_dirty_cmd { 288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 __u32 fb_id; 290 __u32 flags; 291 __u32 color; 292 __u32 num_clips; 293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 __u64 clips_ptr; 295}; 296struct drm_mode_mode_cmd { 297 __u32 connector_id; 298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 struct drm_mode_modeinfo mode; 300}; 301#define DRM_MODE_CURSOR_BO 0x01 302#define DRM_MODE_CURSOR_MOVE 0x02 303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304#define DRM_MODE_CURSOR_FLAGS 0x03 305struct drm_mode_cursor { 306 __u32 flags; 307 __u32 crtc_id; 308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 __s32 x; 310 __s32 y; 311 __u32 width; 312 __u32 height; 313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 __u32 handle; 315}; 316struct drm_mode_cursor2 { 317 __u32 flags; 318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 __u32 crtc_id; 320 __s32 x; 321 __s32 y; 322 __u32 width; 323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 __u32 height; 325 __u32 handle; 326 __s32 hot_x; 327 __s32 hot_y; 328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329}; 330struct drm_mode_crtc_lut { 331 __u32 crtc_id; 332 __u32 gamma_size; 333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 __u64 red; 335 __u64 green; 336 __u64 blue; 337}; 338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339#define DRM_MODE_PAGE_FLIP_EVENT 0x01 340#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT 341struct drm_mode_crtc_page_flip { 342 __u32 crtc_id; 343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 __u32 fb_id; 345 __u32 flags; 346 __u32 reserved; 347 __u64 user_data; 348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349}; 350struct drm_mode_create_dumb { 351 uint32_t height; 352 uint32_t width; 353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 uint32_t bpp; 355 uint32_t flags; 356 uint32_t handle; 357 uint32_t pitch; 358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 uint64_t size; 360}; 361struct drm_mode_map_dumb { 362 __u32 handle; 363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 __u32 pad; 365 __u64 offset; 366}; 367struct drm_mode_destroy_dumb { 368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 uint32_t handle; 370}; 371#endif 372