1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef OMAP3_ISP_USER_H 20#define OMAP3_ISP_USER_H 21#include <linux/types.h> 22#include <linux/videodev2.h> 23#define VIDIOC_OMAP3ISP_CCDC_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct omap3isp_ccdc_update_config) 24#define VIDIOC_OMAP3ISP_PRV_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct omap3isp_prev_update_config) 25#define VIDIOC_OMAP3ISP_AEWB_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct omap3isp_h3a_aewb_config) 26#define VIDIOC_OMAP3ISP_HIST_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct omap3isp_hist_config) 27#define VIDIOC_OMAP3ISP_AF_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct omap3isp_h3a_af_config) 28#define VIDIOC_OMAP3ISP_STAT_REQ _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct omap3isp_stat_data) 29#define VIDIOC_OMAP3ISP_STAT_EN _IOWR('V', BASE_VIDIOC_PRIVATE + 7, unsigned long) 30#define V4L2_EVENT_OMAP3ISP_CLASS (V4L2_EVENT_PRIVATE_START | 0x100) 31#define V4L2_EVENT_OMAP3ISP_AEWB (V4L2_EVENT_OMAP3ISP_CLASS | 0x1) 32#define V4L2_EVENT_OMAP3ISP_AF (V4L2_EVENT_OMAP3ISP_CLASS | 0x2) 33#define V4L2_EVENT_OMAP3ISP_HIST (V4L2_EVENT_OMAP3ISP_CLASS | 0x3) 34struct omap3isp_stat_event_status { 35 __u32 frame_number; 36 __u16 config_counter; 37 __u8 buf_err; 38}; 39#define OMAP3ISP_AEWB_MAX_SATURATION_LIM 1023 40#define OMAP3ISP_AEWB_MIN_WIN_H 2 41#define OMAP3ISP_AEWB_MAX_WIN_H 256 42#define OMAP3ISP_AEWB_MIN_WIN_W 6 43#define OMAP3ISP_AEWB_MAX_WIN_W 256 44#define OMAP3ISP_AEWB_MIN_WINVC 1 45#define OMAP3ISP_AEWB_MIN_WINHC 1 46#define OMAP3ISP_AEWB_MAX_WINVC 128 47#define OMAP3ISP_AEWB_MAX_WINHC 36 48#define OMAP3ISP_AEWB_MAX_WINSTART 4095 49#define OMAP3ISP_AEWB_MIN_SUB_INC 2 50#define OMAP3ISP_AEWB_MAX_SUB_INC 32 51#define OMAP3ISP_AEWB_MAX_BUF_SIZE 83600 52#define OMAP3ISP_AF_IIRSH_MIN 0 53#define OMAP3ISP_AF_IIRSH_MAX 4095 54#define OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MIN 1 55#define OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MAX 36 56#define OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MIN 1 57#define OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MAX 128 58#define OMAP3ISP_AF_PAXEL_INCREMENT_MIN 2 59#define OMAP3ISP_AF_PAXEL_INCREMENT_MAX 32 60#define OMAP3ISP_AF_PAXEL_HEIGHT_MIN 2 61#define OMAP3ISP_AF_PAXEL_HEIGHT_MAX 256 62#define OMAP3ISP_AF_PAXEL_WIDTH_MIN 16 63#define OMAP3ISP_AF_PAXEL_WIDTH_MAX 256 64#define OMAP3ISP_AF_PAXEL_HZSTART_MIN 1 65#define OMAP3ISP_AF_PAXEL_HZSTART_MAX 4095 66#define OMAP3ISP_AF_PAXEL_VTSTART_MIN 0 67#define OMAP3ISP_AF_PAXEL_VTSTART_MAX 4095 68#define OMAP3ISP_AF_THRESHOLD_MAX 255 69#define OMAP3ISP_AF_COEF_MAX 4095 70#define OMAP3ISP_AF_PAXEL_SIZE 48 71#define OMAP3ISP_AF_MAX_BUF_SIZE 221184 72struct omap3isp_h3a_aewb_config { 73 __u32 buf_size; 74 __u16 config_counter; 75 __u16 saturation_limit; 76 __u16 win_height; 77 __u16 win_width; 78 __u16 ver_win_count; 79 __u16 hor_win_count; 80 __u16 ver_win_start; 81 __u16 hor_win_start; 82 __u16 blk_ver_win_start; 83 __u16 blk_win_height; 84 __u16 subsample_ver_inc; 85 __u16 subsample_hor_inc; 86 __u8 alaw_enable; 87}; 88struct omap3isp_stat_data { 89 struct timeval ts; 90 void __user * buf; 91 __u32 buf_size; 92 __u16 frame_number; 93 __u16 cur_frame; 94 __u16 config_counter; 95}; 96#define OMAP3ISP_HIST_BINS_32 0 97#define OMAP3ISP_HIST_BINS_64 1 98#define OMAP3ISP_HIST_BINS_128 2 99#define OMAP3ISP_HIST_BINS_256 3 100#define OMAP3ISP_HIST_MEM_SIZE_BINS(n) ((1 << ((n) + 5)) * 4 * 4) 101#define OMAP3ISP_HIST_MEM_SIZE 1024 102#define OMAP3ISP_HIST_MIN_REGIONS 1 103#define OMAP3ISP_HIST_MAX_REGIONS 4 104#define OMAP3ISP_HIST_MAX_WB_GAIN 255 105#define OMAP3ISP_HIST_MIN_WB_GAIN 0 106#define OMAP3ISP_HIST_MAX_BIT_WIDTH 14 107#define OMAP3ISP_HIST_MIN_BIT_WIDTH 8 108#define OMAP3ISP_HIST_MAX_WG 4 109#define OMAP3ISP_HIST_MAX_BUF_SIZE 4096 110#define OMAP3ISP_HIST_SOURCE_CCDC 0 111#define OMAP3ISP_HIST_SOURCE_MEM 1 112#define OMAP3ISP_HIST_CFA_BAYER 0 113#define OMAP3ISP_HIST_CFA_FOVEONX3 1 114struct omap3isp_hist_region { 115 __u16 h_start; 116 __u16 h_end; 117 __u16 v_start; 118 __u16 v_end; 119}; 120struct omap3isp_hist_config { 121 __u32 buf_size; 122 __u16 config_counter; 123 __u8 num_acc_frames; 124 __u16 hist_bins; 125 __u8 cfa; 126 __u8 wg[OMAP3ISP_HIST_MAX_WG]; 127 __u8 num_regions; 128 struct omap3isp_hist_region region[OMAP3ISP_HIST_MAX_REGIONS]; 129}; 130#define OMAP3ISP_AF_NUM_COEF 11 131enum omap3isp_h3a_af_fvmode { 132 OMAP3ISP_AF_MODE_SUMMED = 0, 133 OMAP3ISP_AF_MODE_PEAK = 1 134}; 135enum omap3isp_h3a_af_rgbpos { 136 OMAP3ISP_AF_GR_GB_BAYER = 0, 137 OMAP3ISP_AF_RG_GB_BAYER = 1, 138 OMAP3ISP_AF_GR_BG_BAYER = 2, 139 OMAP3ISP_AF_RG_BG_BAYER = 3, 140 OMAP3ISP_AF_GG_RB_CUSTOM = 4, 141 OMAP3ISP_AF_RB_GG_CUSTOM = 5 142}; 143struct omap3isp_h3a_af_hmf { 144 __u8 enable; 145 __u8 threshold; 146}; 147struct omap3isp_h3a_af_iir { 148 __u16 h_start; 149 __u16 coeff_set0[OMAP3ISP_AF_NUM_COEF]; 150 __u16 coeff_set1[OMAP3ISP_AF_NUM_COEF]; 151}; 152struct omap3isp_h3a_af_paxel { 153 __u16 h_start; 154 __u16 v_start; 155 __u8 width; 156 __u8 height; 157 __u8 h_cnt; 158 __u8 v_cnt; 159 __u8 line_inc; 160}; 161struct omap3isp_h3a_af_config { 162 __u32 buf_size; 163 __u16 config_counter; 164 struct omap3isp_h3a_af_hmf hmf; 165 struct omap3isp_h3a_af_iir iir; 166 struct omap3isp_h3a_af_paxel paxel; 167 enum omap3isp_h3a_af_rgbpos rgb_pos; 168 enum omap3isp_h3a_af_fvmode fvmode; 169 __u8 alaw_enable; 170}; 171#define OMAP3ISP_CCDC_ALAW (1 << 0) 172#define OMAP3ISP_CCDC_LPF (1 << 1) 173#define OMAP3ISP_CCDC_BLCLAMP (1 << 2) 174#define OMAP3ISP_CCDC_BCOMP (1 << 3) 175#define OMAP3ISP_CCDC_FPC (1 << 4) 176#define OMAP3ISP_CCDC_CULL (1 << 5) 177#define OMAP3ISP_CCDC_CONFIG_LSC (1 << 7) 178#define OMAP3ISP_CCDC_TBL_LSC (1 << 8) 179#define OMAP3ISP_RGB_MAX 3 180enum omap3isp_alaw_ipwidth { 181 OMAP3ISP_ALAW_BIT12_3 = 0x3, 182 OMAP3ISP_ALAW_BIT11_2 = 0x4, 183 OMAP3ISP_ALAW_BIT10_1 = 0x5, 184 OMAP3ISP_ALAW_BIT9_0 = 0x6 185}; 186struct omap3isp_ccdc_lsc_config { 187 __u16 offset; 188 __u8 gain_mode_n; 189 __u8 gain_mode_m; 190 __u8 gain_format; 191 __u16 fmtsph; 192 __u16 fmtlnh; 193 __u16 fmtslv; 194 __u16 fmtlnv; 195 __u8 initial_x; 196 __u8 initial_y; 197 __u32 size; 198}; 199struct omap3isp_ccdc_bclamp { 200 __u8 obgain; 201 __u8 obstpixel; 202 __u8 oblines; 203 __u8 oblen; 204 __u16 dcsubval; 205}; 206struct omap3isp_ccdc_fpc { 207 __u16 fpnum; 208 __u32 fpcaddr; 209}; 210struct omap3isp_ccdc_blcomp { 211 __u8 b_mg; 212 __u8 gb_g; 213 __u8 gr_cy; 214 __u8 r_ye; 215}; 216struct omap3isp_ccdc_culling { 217 __u8 v_pattern; 218 __u16 h_odd; 219 __u16 h_even; 220}; 221struct omap3isp_ccdc_update_config { 222 __u16 update; 223 __u16 flag; 224 enum omap3isp_alaw_ipwidth alawip; 225 struct omap3isp_ccdc_bclamp __user * bclamp; 226 struct omap3isp_ccdc_blcomp __user * blcomp; 227 struct omap3isp_ccdc_fpc __user * fpc; 228 struct omap3isp_ccdc_lsc_config __user * lsc_cfg; 229 struct omap3isp_ccdc_culling __user * cull; 230 __u8 __user * lsc; 231}; 232#define OMAP3ISP_PREV_LUMAENH (1 << 0) 233#define OMAP3ISP_PREV_INVALAW (1 << 1) 234#define OMAP3ISP_PREV_HRZ_MED (1 << 2) 235#define OMAP3ISP_PREV_CFA (1 << 3) 236#define OMAP3ISP_PREV_CHROMA_SUPP (1 << 4) 237#define OMAP3ISP_PREV_WB (1 << 5) 238#define OMAP3ISP_PREV_BLKADJ (1 << 6) 239#define OMAP3ISP_PREV_RGB2RGB (1 << 7) 240#define OMAP3ISP_PREV_COLOR_CONV (1 << 8) 241#define OMAP3ISP_PREV_YC_LIMIT (1 << 9) 242#define OMAP3ISP_PREV_DEFECT_COR (1 << 10) 243#define OMAP3ISP_PREV_DRK_FRM_CAPTURE (1 << 12) 244#define OMAP3ISP_PREV_DRK_FRM_SUBTRACT (1 << 13) 245#define OMAP3ISP_PREV_LENS_SHADING (1 << 14) 246#define OMAP3ISP_PREV_NF (1 << 15) 247#define OMAP3ISP_PREV_GAMMA (1 << 16) 248#define OMAP3ISP_PREV_NF_TBL_SIZE 64 249#define OMAP3ISP_PREV_CFA_TBL_SIZE 576 250#define OMAP3ISP_PREV_CFA_BLK_SIZE (OMAP3ISP_PREV_CFA_TBL_SIZE / 4) 251#define OMAP3ISP_PREV_GAMMA_TBL_SIZE 1024 252#define OMAP3ISP_PREV_YENH_TBL_SIZE 128 253#define OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS 4 254struct omap3isp_prev_hmed { 255 __u8 odddist; 256 __u8 evendist; 257 __u8 thres; 258}; 259enum omap3isp_cfa_fmt { 260 OMAP3ISP_CFAFMT_BAYER, 261 OMAP3ISP_CFAFMT_SONYVGA, 262 OMAP3ISP_CFAFMT_RGBFOVEON, 263 OMAP3ISP_CFAFMT_DNSPL, 264 OMAP3ISP_CFAFMT_HONEYCOMB, 265 OMAP3ISP_CFAFMT_RRGGBBFOVEON 266}; 267struct omap3isp_prev_cfa { 268 enum omap3isp_cfa_fmt format; 269 __u8 gradthrs_vert; 270 __u8 gradthrs_horz; 271 __u32 table[4][OMAP3ISP_PREV_CFA_BLK_SIZE]; 272}; 273struct omap3isp_prev_csup { 274 __u8 gain; 275 __u8 thres; 276 __u8 hypf_en; 277}; 278struct omap3isp_prev_wbal { 279 __u16 dgain; 280 __u8 coef3; 281 __u8 coef2; 282 __u8 coef1; 283 __u8 coef0; 284}; 285struct omap3isp_prev_blkadj { 286 __u8 red; 287 __u8 green; 288 __u8 blue; 289}; 290struct omap3isp_prev_rgbtorgb { 291 __u16 matrix[OMAP3ISP_RGB_MAX][OMAP3ISP_RGB_MAX]; 292 __u16 offset[OMAP3ISP_RGB_MAX]; 293}; 294struct omap3isp_prev_csc { 295 __u16 matrix[OMAP3ISP_RGB_MAX][OMAP3ISP_RGB_MAX]; 296 __s16 offset[OMAP3ISP_RGB_MAX]; 297}; 298struct omap3isp_prev_yclimit { 299 __u8 minC; 300 __u8 maxC; 301 __u8 minY; 302 __u8 maxY; 303}; 304struct omap3isp_prev_dcor { 305 __u8 couplet_mode_en; 306 __u32 detect_correct[OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS]; 307}; 308struct omap3isp_prev_nf { 309 __u8 spread; 310 __u32 table[OMAP3ISP_PREV_NF_TBL_SIZE]; 311}; 312struct omap3isp_prev_gtables { 313 __u32 red[OMAP3ISP_PREV_GAMMA_TBL_SIZE]; 314 __u32 green[OMAP3ISP_PREV_GAMMA_TBL_SIZE]; 315 __u32 blue[OMAP3ISP_PREV_GAMMA_TBL_SIZE]; 316}; 317struct omap3isp_prev_luma { 318 __u32 table[OMAP3ISP_PREV_YENH_TBL_SIZE]; 319}; 320struct omap3isp_prev_update_config { 321 __u32 update; 322 __u32 flag; 323 __u32 shading_shift; 324 struct omap3isp_prev_luma __user * luma; 325 struct omap3isp_prev_hmed __user * hmed; 326 struct omap3isp_prev_cfa __user * cfa; 327 struct omap3isp_prev_csup __user * csup; 328 struct omap3isp_prev_wbal __user * wbal; 329 struct omap3isp_prev_blkadj __user * blkadj; 330 struct omap3isp_prev_rgbtorgb __user * rgb2rgb; 331 struct omap3isp_prev_csc __user * csc; 332 struct omap3isp_prev_yclimit __user * yclimit; 333 struct omap3isp_prev_dcor __user * dcor; 334 struct omap3isp_prev_nf __user * nf; 335 struct omap3isp_prev_gtables __user * gamma; 336}; 337#endif 338