1/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <bl_common.h>
8#include <gicv2.h>
9#include <platform_def.h>
10#include <utils.h>
11
12/******************************************************************************
13 * The following functions are defined as weak to allow a platform to override
14 * the way the GICv2 driver is initialised and used.
15 *****************************************************************************/
16#pragma weak plat_rockchip_gic_driver_init
17#pragma weak plat_rockchip_gic_init
18#pragma weak plat_rockchip_gic_cpuif_enable
19#pragma weak plat_rockchip_gic_cpuif_disable
20#pragma weak plat_rockchip_gic_pcpu_init
21
22/******************************************************************************
23 * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
24 * interrupts.
25 *****************************************************************************/
26const unsigned int g0_interrupt_array[] = {
27	PLAT_RK_G1S_IRQS,
28};
29
30/*
31 * Ideally `rockchip_gic_data` structure definition should be a `const` but it
32 * is kept as modifiable for overwriting with different GICD and GICC base when
33 * running on FVP with VE memory map.
34 */
35gicv2_driver_data_t rockchip_gic_data = {
36	.gicd_base = PLAT_RK_GICD_BASE,
37	.gicc_base = PLAT_RK_GICC_BASE,
38	.g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array),
39	.g0_interrupt_array = g0_interrupt_array,
40};
41
42/******************************************************************************
43 * RockChip common helper to initialize the GICv2 only driver.
44 *****************************************************************************/
45void plat_rockchip_gic_driver_init(void)
46{
47	gicv2_driver_init(&rockchip_gic_data);
48}
49
50void plat_rockchip_gic_init(void)
51{
52	gicv2_distif_init();
53	gicv2_pcpu_distif_init();
54	gicv2_cpuif_enable();
55}
56
57/******************************************************************************
58 * RockChip common helper to enable the GICv2 CPU interface
59 *****************************************************************************/
60void plat_rockchip_gic_cpuif_enable(void)
61{
62	gicv2_cpuif_enable();
63}
64
65/******************************************************************************
66 * RockChip common helper to disable the GICv2 CPU interface
67 *****************************************************************************/
68void plat_rockchip_gic_cpuif_disable(void)
69{
70	gicv2_cpuif_disable();
71}
72
73/******************************************************************************
74 * RockChip common helper to initialize the per cpu distributor interface
75 * in GICv2
76 *****************************************************************************/
77void plat_rockchip_gic_pcpu_init(void)
78{
79	gicv2_pcpu_distif_init();
80}
81