TargetInfo.cpp revision 4b93d660c6326ec79b5e369317d1051cf826c2f3
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/Target/TargetData.h" 21#include "llvm/ADT/Triple.h" 22#include "llvm/Support/raw_ostream.h" 23using namespace clang; 24using namespace CodeGen; 25 26static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 27 llvm::Value *Array, 28 llvm::Value *Value, 29 unsigned FirstIndex, 30 unsigned LastIndex) { 31 // Alternatively, we could emit this as a loop in the source. 32 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 33 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 34 Builder.CreateStore(Value, Cell); 35 } 36} 37 38static bool isAggregateTypeForABI(QualType T) { 39 return CodeGenFunction::hasAggregateLLVMType(T) || 40 T->isMemberFunctionPointerType(); 41} 42 43ABIInfo::~ABIInfo() {} 44 45ASTContext &ABIInfo::getContext() const { 46 return CGT.getContext(); 47} 48 49llvm::LLVMContext &ABIInfo::getVMContext() const { 50 return CGT.getLLVMContext(); 51} 52 53const llvm::TargetData &ABIInfo::getTargetData() const { 54 return CGT.getTargetData(); 55} 56 57 58void ABIArgInfo::dump() const { 59 llvm::raw_ostream &OS = llvm::errs(); 60 OS << "(ABIArgInfo Kind="; 61 switch (TheKind) { 62 case Direct: 63 OS << "Direct Type="; 64 if (const llvm::Type *Ty = getCoerceToType()) 65 Ty->print(OS); 66 else 67 OS << "null"; 68 break; 69 case Extend: 70 OS << "Extend"; 71 break; 72 case Ignore: 73 OS << "Ignore"; 74 break; 75 case Indirect: 76 OS << "Indirect Align=" << getIndirectAlign() 77 << " Byal=" << getIndirectByVal() 78 << " Realign=" << getIndirectRealign(); 79 break; 80 case Expand: 81 OS << "Expand"; 82 break; 83 } 84 OS << ")\n"; 85} 86 87TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 88 89static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 90 91/// isEmptyField - Return true iff a the field is "empty", that is it 92/// is an unnamed bit-field or an (array of) empty record(s). 93static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 94 bool AllowArrays) { 95 if (FD->isUnnamedBitfield()) 96 return true; 97 98 QualType FT = FD->getType(); 99 100 // Constant arrays of empty records count as empty, strip them off. 101 if (AllowArrays) 102 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 103 FT = AT->getElementType(); 104 105 const RecordType *RT = FT->getAs<RecordType>(); 106 if (!RT) 107 return false; 108 109 // C++ record fields are never empty, at least in the Itanium ABI. 110 // 111 // FIXME: We should use a predicate for whether this behavior is true in the 112 // current ABI. 113 if (isa<CXXRecordDecl>(RT->getDecl())) 114 return false; 115 116 return isEmptyRecord(Context, FT, AllowArrays); 117} 118 119/// isEmptyRecord - Return true iff a structure contains only empty 120/// fields. Note that a structure with a flexible array member is not 121/// considered empty. 122static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 123 const RecordType *RT = T->getAs<RecordType>(); 124 if (!RT) 125 return 0; 126 const RecordDecl *RD = RT->getDecl(); 127 if (RD->hasFlexibleArrayMember()) 128 return false; 129 130 // If this is a C++ record, check the bases first. 131 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 132 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 133 e = CXXRD->bases_end(); i != e; ++i) 134 if (!isEmptyRecord(Context, i->getType(), true)) 135 return false; 136 137 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 138 i != e; ++i) 139 if (!isEmptyField(Context, *i, AllowArrays)) 140 return false; 141 return true; 142} 143 144/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 145/// a non-trivial destructor or a non-trivial copy constructor. 146static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 147 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 148 if (!RD) 149 return false; 150 151 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 152} 153 154/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 155/// a record type with either a non-trivial destructor or a non-trivial copy 156/// constructor. 157static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 158 const RecordType *RT = T->getAs<RecordType>(); 159 if (!RT) 160 return false; 161 162 return hasNonTrivialDestructorOrCopyConstructor(RT); 163} 164 165/// isSingleElementStruct - Determine if a structure is a "single 166/// element struct", i.e. it has exactly one non-empty field or 167/// exactly one field which is itself a single element 168/// struct. Structures with flexible array members are never 169/// considered single element structs. 170/// 171/// \return The field declaration for the single non-empty field, if 172/// it exists. 173static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 174 const RecordType *RT = T->getAsStructureType(); 175 if (!RT) 176 return 0; 177 178 const RecordDecl *RD = RT->getDecl(); 179 if (RD->hasFlexibleArrayMember()) 180 return 0; 181 182 const Type *Found = 0; 183 184 // If this is a C++ record, check the bases first. 185 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 186 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 187 e = CXXRD->bases_end(); i != e; ++i) { 188 // Ignore empty records. 189 if (isEmptyRecord(Context, i->getType(), true)) 190 continue; 191 192 // If we already found an element then this isn't a single-element struct. 193 if (Found) 194 return 0; 195 196 // If this is non-empty and not a single element struct, the composite 197 // cannot be a single element struct. 198 Found = isSingleElementStruct(i->getType(), Context); 199 if (!Found) 200 return 0; 201 } 202 } 203 204 // Check for single element. 205 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 206 i != e; ++i) { 207 const FieldDecl *FD = *i; 208 QualType FT = FD->getType(); 209 210 // Ignore empty fields. 211 if (isEmptyField(Context, FD, true)) 212 continue; 213 214 // If we already found an element then this isn't a single-element 215 // struct. 216 if (Found) 217 return 0; 218 219 // Treat single element arrays as the element. 220 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 221 if (AT->getSize().getZExtValue() != 1) 222 break; 223 FT = AT->getElementType(); 224 } 225 226 if (!isAggregateTypeForABI(FT)) { 227 Found = FT.getTypePtr(); 228 } else { 229 Found = isSingleElementStruct(FT, Context); 230 if (!Found) 231 return 0; 232 } 233 } 234 235 return Found; 236} 237 238static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 239 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 240 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 241 !Ty->isBlockPointerType()) 242 return false; 243 244 uint64_t Size = Context.getTypeSize(Ty); 245 return Size == 32 || Size == 64; 246} 247 248/// canExpandIndirectArgument - Test whether an argument type which is to be 249/// passed indirectly (on the stack) would have the equivalent layout if it was 250/// expanded into separate arguments. If so, we prefer to do the latter to avoid 251/// inhibiting optimizations. 252/// 253// FIXME: This predicate is missing many cases, currently it just follows 254// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 255// should probably make this smarter, or better yet make the LLVM backend 256// capable of handling it. 257static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 258 // We can only expand structure types. 259 const RecordType *RT = Ty->getAs<RecordType>(); 260 if (!RT) 261 return false; 262 263 // We can only expand (C) structures. 264 // 265 // FIXME: This needs to be generalized to handle classes as well. 266 const RecordDecl *RD = RT->getDecl(); 267 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 268 return false; 269 270 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 271 i != e; ++i) { 272 const FieldDecl *FD = *i; 273 274 if (!is32Or64BitBasicType(FD->getType(), Context)) 275 return false; 276 277 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 278 // how to expand them yet, and the predicate for telling if a bitfield still 279 // counts as "basic" is more complicated than what we were doing previously. 280 if (FD->isBitField()) 281 return false; 282 } 283 284 return true; 285} 286 287namespace { 288/// DefaultABIInfo - The default implementation for ABI specific 289/// details. This implementation provides information which results in 290/// self-consistent and sensible LLVM IR generation, but does not 291/// conform to any particular ABI. 292class DefaultABIInfo : public ABIInfo { 293public: 294 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 295 296 ABIArgInfo classifyReturnType(QualType RetTy) const; 297 ABIArgInfo classifyArgumentType(QualType RetTy) const; 298 299 virtual void computeInfo(CGFunctionInfo &FI) const { 300 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 301 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 302 it != ie; ++it) 303 it->info = classifyArgumentType(it->type); 304 } 305 306 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 307 CodeGenFunction &CGF) const; 308}; 309 310class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 311public: 312 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 313 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 314}; 315 316llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 317 CodeGenFunction &CGF) const { 318 return 0; 319} 320 321ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 322 if (isAggregateTypeForABI(Ty)) 323 return ABIArgInfo::getIndirect(0); 324 325 // Treat an enum type as its underlying type. 326 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 327 Ty = EnumTy->getDecl()->getIntegerType(); 328 329 return (Ty->isPromotableIntegerType() ? 330 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 331} 332 333ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 334 if (RetTy->isVoidType()) 335 return ABIArgInfo::getIgnore(); 336 337 if (isAggregateTypeForABI(RetTy)) 338 return ABIArgInfo::getIndirect(0); 339 340 // Treat an enum type as its underlying type. 341 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 342 RetTy = EnumTy->getDecl()->getIntegerType(); 343 344 return (RetTy->isPromotableIntegerType() ? 345 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 346} 347 348/// UseX86_MMXType - Return true if this is an MMX type that should use the special 349/// x86_mmx type. 350bool UseX86_MMXType(const llvm::Type *IRType) { 351 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the 352 // special x86_mmx type. 353 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 354 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 355 IRType->getScalarSizeInBits() != 64; 356} 357 358static const llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 359 llvm::StringRef Constraint, 360 const llvm::Type* Ty) { 361 if (Constraint=="y" && Ty->isVectorTy()) 362 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 363 return Ty; 364} 365 366//===----------------------------------------------------------------------===// 367// X86-32 ABI Implementation 368//===----------------------------------------------------------------------===// 369 370/// X86_32ABIInfo - The X86-32 ABI information. 371class X86_32ABIInfo : public ABIInfo { 372 static const unsigned MinABIStackAlignInBytes = 4; 373 374 bool IsDarwinVectorABI; 375 bool IsSmallStructInRegABI; 376 377 static bool isRegisterSize(unsigned Size) { 378 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 379 } 380 381 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 382 383 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 384 /// such that the argument will be passed in memory. 385 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 386 387 /// \brief Return the alignment to use for the given type on the stack. 388 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 389 390public: 391 392 ABIArgInfo classifyReturnType(QualType RetTy) const; 393 ABIArgInfo classifyArgumentType(QualType RetTy) const; 394 395 virtual void computeInfo(CGFunctionInfo &FI) const { 396 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 397 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 398 it != ie; ++it) 399 it->info = classifyArgumentType(it->type); 400 } 401 402 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 403 CodeGenFunction &CGF) const; 404 405 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 406 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p) {} 407}; 408 409class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 410public: 411 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 412 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p)) {} 413 414 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 415 CodeGen::CodeGenModule &CGM) const; 416 417 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 418 // Darwin uses different dwarf register numbers for EH. 419 if (CGM.isTargetDarwin()) return 5; 420 421 return 4; 422 } 423 424 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 425 llvm::Value *Address) const; 426 427 const llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 428 llvm::StringRef Constraint, 429 const llvm::Type* Ty) const { 430 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 431 } 432 433}; 434 435} 436 437/// shouldReturnTypeInRegister - Determine if the given type should be 438/// passed in a register (for the Darwin ABI). 439bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 440 ASTContext &Context) { 441 uint64_t Size = Context.getTypeSize(Ty); 442 443 // Type must be register sized. 444 if (!isRegisterSize(Size)) 445 return false; 446 447 if (Ty->isVectorType()) { 448 // 64- and 128- bit vectors inside structures are not returned in 449 // registers. 450 if (Size == 64 || Size == 128) 451 return false; 452 453 return true; 454 } 455 456 // If this is a builtin, pointer, enum, complex type, member pointer, or 457 // member function pointer it is ok. 458 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 459 Ty->isAnyComplexType() || Ty->isEnumeralType() || 460 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 461 return true; 462 463 // Arrays are treated like records. 464 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 465 return shouldReturnTypeInRegister(AT->getElementType(), Context); 466 467 // Otherwise, it must be a record type. 468 const RecordType *RT = Ty->getAs<RecordType>(); 469 if (!RT) return false; 470 471 // FIXME: Traverse bases here too. 472 473 // Structure types are passed in register if all fields would be 474 // passed in a register. 475 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 476 e = RT->getDecl()->field_end(); i != e; ++i) { 477 const FieldDecl *FD = *i; 478 479 // Empty fields are ignored. 480 if (isEmptyField(Context, FD, true)) 481 continue; 482 483 // Check fields recursively. 484 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 485 return false; 486 } 487 488 return true; 489} 490 491ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 492 if (RetTy->isVoidType()) 493 return ABIArgInfo::getIgnore(); 494 495 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 496 // On Darwin, some vectors are returned in registers. 497 if (IsDarwinVectorABI) { 498 uint64_t Size = getContext().getTypeSize(RetTy); 499 500 // 128-bit vectors are a special case; they are returned in 501 // registers and we need to make sure to pick a type the LLVM 502 // backend will like. 503 if (Size == 128) 504 return ABIArgInfo::getDirect(llvm::VectorType::get( 505 llvm::Type::getInt64Ty(getVMContext()), 2)); 506 507 // Always return in register if it fits in a general purpose 508 // register, or if it is 64 bits and has a single element. 509 if ((Size == 8 || Size == 16 || Size == 32) || 510 (Size == 64 && VT->getNumElements() == 1)) 511 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 512 Size)); 513 514 return ABIArgInfo::getIndirect(0); 515 } 516 517 return ABIArgInfo::getDirect(); 518 } 519 520 if (isAggregateTypeForABI(RetTy)) { 521 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 522 // Structures with either a non-trivial destructor or a non-trivial 523 // copy constructor are always indirect. 524 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 525 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 526 527 // Structures with flexible arrays are always indirect. 528 if (RT->getDecl()->hasFlexibleArrayMember()) 529 return ABIArgInfo::getIndirect(0); 530 } 531 532 // If specified, structs and unions are always indirect. 533 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 534 return ABIArgInfo::getIndirect(0); 535 536 // Classify "single element" structs as their element type. 537 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) { 538 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 539 if (BT->isIntegerType()) { 540 // We need to use the size of the structure, padding 541 // bit-fields can adjust that to be larger than the single 542 // element type. 543 uint64_t Size = getContext().getTypeSize(RetTy); 544 return ABIArgInfo::getDirect( 545 llvm::IntegerType::get(getVMContext(), (unsigned)Size)); 546 } 547 548 if (BT->getKind() == BuiltinType::Float) { 549 assert(getContext().getTypeSize(RetTy) == 550 getContext().getTypeSize(SeltTy) && 551 "Unexpect single element structure size!"); 552 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext())); 553 } 554 555 if (BT->getKind() == BuiltinType::Double) { 556 assert(getContext().getTypeSize(RetTy) == 557 getContext().getTypeSize(SeltTy) && 558 "Unexpect single element structure size!"); 559 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext())); 560 } 561 } else if (SeltTy->isPointerType()) { 562 // FIXME: It would be really nice if this could come out as the proper 563 // pointer type. 564 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext()); 565 return ABIArgInfo::getDirect(PtrTy); 566 } else if (SeltTy->isVectorType()) { 567 // 64- and 128-bit vectors are never returned in a 568 // register when inside a structure. 569 uint64_t Size = getContext().getTypeSize(RetTy); 570 if (Size == 64 || Size == 128) 571 return ABIArgInfo::getIndirect(0); 572 573 return classifyReturnType(QualType(SeltTy, 0)); 574 } 575 } 576 577 // Small structures which are register sized are generally returned 578 // in a register. 579 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 580 uint64_t Size = getContext().getTypeSize(RetTy); 581 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 582 } 583 584 return ABIArgInfo::getIndirect(0); 585 } 586 587 // Treat an enum type as its underlying type. 588 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 589 RetTy = EnumTy->getDecl()->getIntegerType(); 590 591 return (RetTy->isPromotableIntegerType() ? 592 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 593} 594 595static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 596 const RecordType *RT = Ty->getAs<RecordType>(); 597 if (!RT) 598 return 0; 599 const RecordDecl *RD = RT->getDecl(); 600 601 // If this is a C++ record, check the bases first. 602 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 603 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 604 e = CXXRD->bases_end(); i != e; ++i) 605 if (!isRecordWithSSEVectorType(Context, i->getType())) 606 return false; 607 608 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 609 i != e; ++i) { 610 QualType FT = i->getType(); 611 612 if (FT->getAs<VectorType>() && Context.getTypeSize(Ty) == 128) 613 return true; 614 615 if (isRecordWithSSEVectorType(Context, FT)) 616 return true; 617 } 618 619 return false; 620} 621 622unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 623 unsigned Align) const { 624 // Otherwise, if the alignment is less than or equal to the minimum ABI 625 // alignment, just use the default; the backend will handle this. 626 if (Align <= MinABIStackAlignInBytes) 627 return 0; // Use default alignment. 628 629 // On non-Darwin, the stack type alignment is always 4. 630 if (!IsDarwinVectorABI) { 631 // Set explicit alignment, since we may need to realign the top. 632 return MinABIStackAlignInBytes; 633 } 634 635 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 636 if (isRecordWithSSEVectorType(getContext(), Ty)) 637 return 16; 638 639 return MinABIStackAlignInBytes; 640} 641 642ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 643 if (!ByVal) 644 return ABIArgInfo::getIndirect(0, false); 645 646 // Compute the byval alignment. 647 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 648 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 649 if (StackAlign == 0) 650 return ABIArgInfo::getIndirect(0); 651 652 // If the stack alignment is less than the type alignment, realign the 653 // argument. 654 if (StackAlign < TypeAlign) 655 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 656 /*Realign=*/true); 657 658 return ABIArgInfo::getIndirect(StackAlign); 659} 660 661ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 662 // FIXME: Set alignment on indirect arguments. 663 if (isAggregateTypeForABI(Ty)) { 664 // Structures with flexible arrays are always indirect. 665 if (const RecordType *RT = Ty->getAs<RecordType>()) { 666 // Structures with either a non-trivial destructor or a non-trivial 667 // copy constructor are always indirect. 668 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 669 return getIndirectResult(Ty, /*ByVal=*/false); 670 671 if (RT->getDecl()->hasFlexibleArrayMember()) 672 return getIndirectResult(Ty); 673 } 674 675 // Ignore empty structs. 676 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0) 677 return ABIArgInfo::getIgnore(); 678 679 // Expand small (<= 128-bit) record types when we know that the stack layout 680 // of those arguments will match the struct. This is important because the 681 // LLVM backend isn't smart enough to remove byval, which inhibits many 682 // optimizations. 683 if (getContext().getTypeSize(Ty) <= 4*32 && 684 canExpandIndirectArgument(Ty, getContext())) 685 return ABIArgInfo::getExpand(); 686 687 return getIndirectResult(Ty); 688 } 689 690 if (const VectorType *VT = Ty->getAs<VectorType>()) { 691 // On Darwin, some vectors are passed in memory, we handle this by passing 692 // it as an i8/i16/i32/i64. 693 if (IsDarwinVectorABI) { 694 uint64_t Size = getContext().getTypeSize(Ty); 695 if ((Size == 8 || Size == 16 || Size == 32) || 696 (Size == 64 && VT->getNumElements() == 1)) 697 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 698 Size)); 699 } 700 701 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 702 if (UseX86_MMXType(IRType)) { 703 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType); 704 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext())); 705 return AAI; 706 } 707 708 return ABIArgInfo::getDirect(); 709 } 710 711 712 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 713 Ty = EnumTy->getDecl()->getIntegerType(); 714 715 return (Ty->isPromotableIntegerType() ? 716 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 717} 718 719llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 720 CodeGenFunction &CGF) const { 721 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 722 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 723 724 CGBuilderTy &Builder = CGF.Builder; 725 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 726 "ap"); 727 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 728 llvm::Type *PTy = 729 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 730 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 731 732 uint64_t Offset = 733 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 734 llvm::Value *NextAddr = 735 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 736 "ap.next"); 737 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 738 739 return AddrTyped; 740} 741 742void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 743 llvm::GlobalValue *GV, 744 CodeGen::CodeGenModule &CGM) const { 745 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 746 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 747 // Get the LLVM function. 748 llvm::Function *Fn = cast<llvm::Function>(GV); 749 750 // Now add the 'alignstack' attribute with a value of 16. 751 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 752 } 753 } 754} 755 756bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 757 CodeGen::CodeGenFunction &CGF, 758 llvm::Value *Address) const { 759 CodeGen::CGBuilderTy &Builder = CGF.Builder; 760 llvm::LLVMContext &Context = CGF.getLLVMContext(); 761 762 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 763 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 764 765 // 0-7 are the eight integer registers; the order is different 766 // on Darwin (for EH), but the range is the same. 767 // 8 is %eip. 768 AssignToArrayRange(Builder, Address, Four8, 0, 8); 769 770 if (CGF.CGM.isTargetDarwin()) { 771 // 12-16 are st(0..4). Not sure why we stop at 4. 772 // These have size 16, which is sizeof(long double) on 773 // platforms with 8-byte alignment for that type. 774 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 775 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 776 777 } else { 778 // 9 is %eflags, which doesn't get a size on Darwin for some 779 // reason. 780 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 781 782 // 11-16 are st(0..5). Not sure why we stop at 5. 783 // These have size 12, which is sizeof(long double) on 784 // platforms with 4-byte alignment for that type. 785 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 786 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 787 } 788 789 return false; 790} 791 792//===----------------------------------------------------------------------===// 793// X86-64 ABI Implementation 794//===----------------------------------------------------------------------===// 795 796 797namespace { 798/// X86_64ABIInfo - The X86_64 ABI information. 799class X86_64ABIInfo : public ABIInfo { 800 enum Class { 801 Integer = 0, 802 SSE, 803 SSEUp, 804 X87, 805 X87Up, 806 ComplexX87, 807 NoClass, 808 Memory 809 }; 810 811 /// merge - Implement the X86_64 ABI merging algorithm. 812 /// 813 /// Merge an accumulating classification \arg Accum with a field 814 /// classification \arg Field. 815 /// 816 /// \param Accum - The accumulating classification. This should 817 /// always be either NoClass or the result of a previous merge 818 /// call. In addition, this should never be Memory (the caller 819 /// should just return Memory for the aggregate). 820 static Class merge(Class Accum, Class Field); 821 822 /// classify - Determine the x86_64 register classes in which the 823 /// given type T should be passed. 824 /// 825 /// \param Lo - The classification for the parts of the type 826 /// residing in the low word of the containing object. 827 /// 828 /// \param Hi - The classification for the parts of the type 829 /// residing in the high word of the containing object. 830 /// 831 /// \param OffsetBase - The bit offset of this type in the 832 /// containing object. Some parameters are classified different 833 /// depending on whether they straddle an eightbyte boundary. 834 /// 835 /// If a word is unused its result will be NoClass; if a type should 836 /// be passed in Memory then at least the classification of \arg Lo 837 /// will be Memory. 838 /// 839 /// The \arg Lo class will be NoClass iff the argument is ignored. 840 /// 841 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 842 /// also be ComplexX87. 843 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 844 845 const llvm::Type *Get16ByteVectorType(QualType Ty) const; 846 const llvm::Type *GetSSETypeAtOffset(const llvm::Type *IRType, 847 unsigned IROffset, QualType SourceTy, 848 unsigned SourceOffset) const; 849 const llvm::Type *GetINTEGERTypeAtOffset(const llvm::Type *IRType, 850 unsigned IROffset, QualType SourceTy, 851 unsigned SourceOffset) const; 852 853 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 854 /// such that the argument will be returned in memory. 855 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 856 857 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 858 /// such that the argument will be passed in memory. 859 ABIArgInfo getIndirectResult(QualType Ty) const; 860 861 ABIArgInfo classifyReturnType(QualType RetTy) const; 862 863 ABIArgInfo classifyArgumentType(QualType Ty, 864 unsigned &neededInt, 865 unsigned &neededSSE) const; 866 867public: 868 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 869 870 virtual void computeInfo(CGFunctionInfo &FI) const; 871 872 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 873 CodeGenFunction &CGF) const; 874}; 875 876/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 877class WinX86_64ABIInfo : public ABIInfo { 878 879 ABIArgInfo classify(QualType Ty) const; 880 881public: 882 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 883 884 virtual void computeInfo(CGFunctionInfo &FI) const; 885 886 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 887 CodeGenFunction &CGF) const; 888}; 889 890class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 891public: 892 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 893 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {} 894 895 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 896 return 7; 897 } 898 899 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 900 llvm::Value *Address) const { 901 CodeGen::CGBuilderTy &Builder = CGF.Builder; 902 llvm::LLVMContext &Context = CGF.getLLVMContext(); 903 904 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 905 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 906 907 // 0-15 are the 16 integer registers. 908 // 16 is %rip. 909 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 910 911 return false; 912 } 913 914 const llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 915 llvm::StringRef Constraint, 916 const llvm::Type* Ty) const { 917 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 918 } 919 920}; 921 922class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 923public: 924 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 925 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 926 927 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 928 return 7; 929 } 930 931 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 932 llvm::Value *Address) const { 933 CodeGen::CGBuilderTy &Builder = CGF.Builder; 934 llvm::LLVMContext &Context = CGF.getLLVMContext(); 935 936 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 937 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 938 939 // 0-15 are the 16 integer registers. 940 // 16 is %rip. 941 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 942 943 return false; 944 } 945}; 946 947} 948 949X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 950 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 951 // classified recursively so that always two fields are 952 // considered. The resulting class is calculated according to 953 // the classes of the fields in the eightbyte: 954 // 955 // (a) If both classes are equal, this is the resulting class. 956 // 957 // (b) If one of the classes is NO_CLASS, the resulting class is 958 // the other class. 959 // 960 // (c) If one of the classes is MEMORY, the result is the MEMORY 961 // class. 962 // 963 // (d) If one of the classes is INTEGER, the result is the 964 // INTEGER. 965 // 966 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 967 // MEMORY is used as class. 968 // 969 // (f) Otherwise class SSE is used. 970 971 // Accum should never be memory (we should have returned) or 972 // ComplexX87 (because this cannot be passed in a structure). 973 assert((Accum != Memory && Accum != ComplexX87) && 974 "Invalid accumulated classification during merge."); 975 if (Accum == Field || Field == NoClass) 976 return Accum; 977 if (Field == Memory) 978 return Memory; 979 if (Accum == NoClass) 980 return Field; 981 if (Accum == Integer || Field == Integer) 982 return Integer; 983 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 984 Accum == X87 || Accum == X87Up) 985 return Memory; 986 return SSE; 987} 988 989void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 990 Class &Lo, Class &Hi) const { 991 // FIXME: This code can be simplified by introducing a simple value class for 992 // Class pairs with appropriate constructor methods for the various 993 // situations. 994 995 // FIXME: Some of the split computations are wrong; unaligned vectors 996 // shouldn't be passed in registers for example, so there is no chance they 997 // can straddle an eightbyte. Verify & simplify. 998 999 Lo = Hi = NoClass; 1000 1001 Class &Current = OffsetBase < 64 ? Lo : Hi; 1002 Current = Memory; 1003 1004 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1005 BuiltinType::Kind k = BT->getKind(); 1006 1007 if (k == BuiltinType::Void) { 1008 Current = NoClass; 1009 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1010 Lo = Integer; 1011 Hi = Integer; 1012 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1013 Current = Integer; 1014 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 1015 Current = SSE; 1016 } else if (k == BuiltinType::LongDouble) { 1017 Lo = X87; 1018 Hi = X87Up; 1019 } 1020 // FIXME: _Decimal32 and _Decimal64 are SSE. 1021 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1022 return; 1023 } 1024 1025 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1026 // Classify the underlying integer type. 1027 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1028 return; 1029 } 1030 1031 if (Ty->hasPointerRepresentation()) { 1032 Current = Integer; 1033 return; 1034 } 1035 1036 if (Ty->isMemberPointerType()) { 1037 if (Ty->isMemberFunctionPointerType()) 1038 Lo = Hi = Integer; 1039 else 1040 Current = Integer; 1041 return; 1042 } 1043 1044 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1045 uint64_t Size = getContext().getTypeSize(VT); 1046 if (Size == 32) { 1047 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1048 // float> as integer. 1049 Current = Integer; 1050 1051 // If this type crosses an eightbyte boundary, it should be 1052 // split. 1053 uint64_t EB_Real = (OffsetBase) / 64; 1054 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1055 if (EB_Real != EB_Imag) 1056 Hi = Lo; 1057 } else if (Size == 64) { 1058 // gcc passes <1 x double> in memory. :( 1059 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1060 return; 1061 1062 // gcc passes <1 x long long> as INTEGER. 1063 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1064 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1065 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1066 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1067 Current = Integer; 1068 else 1069 Current = SSE; 1070 1071 // If this type crosses an eightbyte boundary, it should be 1072 // split. 1073 if (OffsetBase && OffsetBase != 64) 1074 Hi = Lo; 1075 } else if (Size == 128) { 1076 Lo = SSE; 1077 Hi = SSEUp; 1078 } 1079 return; 1080 } 1081 1082 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1083 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1084 1085 uint64_t Size = getContext().getTypeSize(Ty); 1086 if (ET->isIntegralOrEnumerationType()) { 1087 if (Size <= 64) 1088 Current = Integer; 1089 else if (Size <= 128) 1090 Lo = Hi = Integer; 1091 } else if (ET == getContext().FloatTy) 1092 Current = SSE; 1093 else if (ET == getContext().DoubleTy) 1094 Lo = Hi = SSE; 1095 else if (ET == getContext().LongDoubleTy) 1096 Current = ComplexX87; 1097 1098 // If this complex type crosses an eightbyte boundary then it 1099 // should be split. 1100 uint64_t EB_Real = (OffsetBase) / 64; 1101 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1102 if (Hi == NoClass && EB_Real != EB_Imag) 1103 Hi = Lo; 1104 1105 return; 1106 } 1107 1108 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1109 // Arrays are treated like structures. 1110 1111 uint64_t Size = getContext().getTypeSize(Ty); 1112 1113 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1114 // than two eightbytes, ..., it has class MEMORY. 1115 if (Size > 128) 1116 return; 1117 1118 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1119 // fields, it has class MEMORY. 1120 // 1121 // Only need to check alignment of array base. 1122 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1123 return; 1124 1125 // Otherwise implement simplified merge. We could be smarter about 1126 // this, but it isn't worth it and would be harder to verify. 1127 Current = NoClass; 1128 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1129 uint64_t ArraySize = AT->getSize().getZExtValue(); 1130 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1131 Class FieldLo, FieldHi; 1132 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1133 Lo = merge(Lo, FieldLo); 1134 Hi = merge(Hi, FieldHi); 1135 if (Lo == Memory || Hi == Memory) 1136 break; 1137 } 1138 1139 // Do post merger cleanup (see below). Only case we worry about is Memory. 1140 if (Hi == Memory) 1141 Lo = Memory; 1142 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1143 return; 1144 } 1145 1146 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1147 uint64_t Size = getContext().getTypeSize(Ty); 1148 1149 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1150 // than two eightbytes, ..., it has class MEMORY. 1151 if (Size > 128) 1152 return; 1153 1154 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1155 // copy constructor or a non-trivial destructor, it is passed by invisible 1156 // reference. 1157 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1158 return; 1159 1160 const RecordDecl *RD = RT->getDecl(); 1161 1162 // Assume variable sized types are passed in memory. 1163 if (RD->hasFlexibleArrayMember()) 1164 return; 1165 1166 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1167 1168 // Reset Lo class, this will be recomputed. 1169 Current = NoClass; 1170 1171 // If this is a C++ record, classify the bases first. 1172 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1173 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1174 e = CXXRD->bases_end(); i != e; ++i) { 1175 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1176 "Unexpected base class!"); 1177 const CXXRecordDecl *Base = 1178 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1179 1180 // Classify this field. 1181 // 1182 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1183 // single eightbyte, each is classified separately. Each eightbyte gets 1184 // initialized to class NO_CLASS. 1185 Class FieldLo, FieldHi; 1186 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base); 1187 classify(i->getType(), Offset, FieldLo, FieldHi); 1188 Lo = merge(Lo, FieldLo); 1189 Hi = merge(Hi, FieldHi); 1190 if (Lo == Memory || Hi == Memory) 1191 break; 1192 } 1193 } 1194 1195 // Classify the fields one at a time, merging the results. 1196 unsigned idx = 0; 1197 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1198 i != e; ++i, ++idx) { 1199 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1200 bool BitField = i->isBitField(); 1201 1202 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1203 // fields, it has class MEMORY. 1204 // 1205 // Note, skip this test for bit-fields, see below. 1206 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1207 Lo = Memory; 1208 return; 1209 } 1210 1211 // Classify this field. 1212 // 1213 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1214 // exceeds a single eightbyte, each is classified 1215 // separately. Each eightbyte gets initialized to class 1216 // NO_CLASS. 1217 Class FieldLo, FieldHi; 1218 1219 // Bit-fields require special handling, they do not force the 1220 // structure to be passed in memory even if unaligned, and 1221 // therefore they can straddle an eightbyte. 1222 if (BitField) { 1223 // Ignore padding bit-fields. 1224 if (i->isUnnamedBitfield()) 1225 continue; 1226 1227 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1228 uint64_t Size = 1229 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue(); 1230 1231 uint64_t EB_Lo = Offset / 64; 1232 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1233 FieldLo = FieldHi = NoClass; 1234 if (EB_Lo) { 1235 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1236 FieldLo = NoClass; 1237 FieldHi = Integer; 1238 } else { 1239 FieldLo = Integer; 1240 FieldHi = EB_Hi ? Integer : NoClass; 1241 } 1242 } else 1243 classify(i->getType(), Offset, FieldLo, FieldHi); 1244 Lo = merge(Lo, FieldLo); 1245 Hi = merge(Hi, FieldHi); 1246 if (Lo == Memory || Hi == Memory) 1247 break; 1248 } 1249 1250 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1251 // 1252 // (a) If one of the classes is MEMORY, the whole argument is 1253 // passed in memory. 1254 // 1255 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 1256 1257 // The first of these conditions is guaranteed by how we implement 1258 // the merge (just bail). 1259 // 1260 // The second condition occurs in the case of unions; for example 1261 // union { _Complex double; unsigned; }. 1262 if (Hi == Memory) 1263 Lo = Memory; 1264 if (Hi == SSEUp && Lo != SSE) 1265 Hi = SSE; 1266 } 1267} 1268 1269ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1270 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1271 // place naturally. 1272 if (!isAggregateTypeForABI(Ty)) { 1273 // Treat an enum type as its underlying type. 1274 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1275 Ty = EnumTy->getDecl()->getIntegerType(); 1276 1277 return (Ty->isPromotableIntegerType() ? 1278 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1279 } 1280 1281 return ABIArgInfo::getIndirect(0); 1282} 1283 1284ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1285 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1286 // place naturally. 1287 if (!isAggregateTypeForABI(Ty)) { 1288 // Treat an enum type as its underlying type. 1289 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1290 Ty = EnumTy->getDecl()->getIntegerType(); 1291 1292 return (Ty->isPromotableIntegerType() ? 1293 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1294 } 1295 1296 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1297 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1298 1299 // Compute the byval alignment. We trust the back-end to honor the 1300 // minimum ABI alignment for byval, to make cleaner IR. 1301 const unsigned MinABIAlign = 8; 1302 unsigned Align = getContext().getTypeAlign(Ty) / 8; 1303 if (Align > MinABIAlign) 1304 return ABIArgInfo::getIndirect(Align); 1305 return ABIArgInfo::getIndirect(0); 1306} 1307 1308/// Get16ByteVectorType - The ABI specifies that a value should be passed in an 1309/// full vector XMM register. Pick an LLVM IR type that will be passed as a 1310/// vector register. 1311const llvm::Type *X86_64ABIInfo::Get16ByteVectorType(QualType Ty) const { 1312 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 1313 1314 // Wrapper structs that just contain vectors are passed just like vectors, 1315 // strip them off if present. 1316 const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1317 while (STy && STy->getNumElements() == 1) { 1318 IRType = STy->getElementType(0); 1319 STy = dyn_cast<llvm::StructType>(IRType); 1320 } 1321 1322 // If the preferred type is a 16-byte vector, prefer to pass it. 1323 if (const llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1324 const llvm::Type *EltTy = VT->getElementType(); 1325 if (VT->getBitWidth() == 128 && 1326 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1327 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1328 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1329 EltTy->isIntegerTy(128))) 1330 return VT; 1331 } 1332 1333 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1334} 1335 1336/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1337/// is known to either be off the end of the specified type or being in 1338/// alignment padding. The user type specified is known to be at most 128 bits 1339/// in size, and have passed through X86_64ABIInfo::classify with a successful 1340/// classification that put one of the two halves in the INTEGER class. 1341/// 1342/// It is conservatively correct to return false. 1343static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1344 unsigned EndBit, ASTContext &Context) { 1345 // If the bytes being queried are off the end of the type, there is no user 1346 // data hiding here. This handles analysis of builtins, vectors and other 1347 // types that don't contain interesting padding. 1348 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1349 if (TySize <= StartBit) 1350 return true; 1351 1352 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1353 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1354 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1355 1356 // Check each element to see if the element overlaps with the queried range. 1357 for (unsigned i = 0; i != NumElts; ++i) { 1358 // If the element is after the span we care about, then we're done.. 1359 unsigned EltOffset = i*EltSize; 1360 if (EltOffset >= EndBit) break; 1361 1362 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1363 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1364 EndBit-EltOffset, Context)) 1365 return false; 1366 } 1367 // If it overlaps no elements, then it is safe to process as padding. 1368 return true; 1369 } 1370 1371 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1372 const RecordDecl *RD = RT->getDecl(); 1373 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1374 1375 // If this is a C++ record, check the bases first. 1376 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1377 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1378 e = CXXRD->bases_end(); i != e; ++i) { 1379 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1380 "Unexpected base class!"); 1381 const CXXRecordDecl *Base = 1382 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1383 1384 // If the base is after the span we care about, ignore it. 1385 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base); 1386 if (BaseOffset >= EndBit) continue; 1387 1388 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1389 if (!BitsContainNoUserData(i->getType(), BaseStart, 1390 EndBit-BaseOffset, Context)) 1391 return false; 1392 } 1393 } 1394 1395 // Verify that no field has data that overlaps the region of interest. Yes 1396 // this could be sped up a lot by being smarter about queried fields, 1397 // however we're only looking at structs up to 16 bytes, so we don't care 1398 // much. 1399 unsigned idx = 0; 1400 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1401 i != e; ++i, ++idx) { 1402 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1403 1404 // If we found a field after the region we care about, then we're done. 1405 if (FieldOffset >= EndBit) break; 1406 1407 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1408 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1409 Context)) 1410 return false; 1411 } 1412 1413 // If nothing in this record overlapped the area of interest, then we're 1414 // clean. 1415 return true; 1416 } 1417 1418 return false; 1419} 1420 1421/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1422/// float member at the specified offset. For example, {int,{float}} has a 1423/// float at offset 4. It is conservatively correct for this routine to return 1424/// false. 1425static bool ContainsFloatAtOffset(const llvm::Type *IRType, unsigned IROffset, 1426 const llvm::TargetData &TD) { 1427 // Base case if we find a float. 1428 if (IROffset == 0 && IRType->isFloatTy()) 1429 return true; 1430 1431 // If this is a struct, recurse into the field at the specified offset. 1432 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1433 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1434 unsigned Elt = SL->getElementContainingOffset(IROffset); 1435 IROffset -= SL->getElementOffset(Elt); 1436 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1437 } 1438 1439 // If this is an array, recurse into the field at the specified offset. 1440 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1441 const llvm::Type *EltTy = ATy->getElementType(); 1442 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1443 IROffset -= IROffset/EltSize*EltSize; 1444 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1445 } 1446 1447 return false; 1448} 1449 1450 1451/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1452/// low 8 bytes of an XMM register, corresponding to the SSE class. 1453const llvm::Type *X86_64ABIInfo:: 1454GetSSETypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1455 QualType SourceTy, unsigned SourceOffset) const { 1456 // The only three choices we have are either double, <2 x float>, or float. We 1457 // pass as float if the last 4 bytes is just padding. This happens for 1458 // structs that contain 3 floats. 1459 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1460 SourceOffset*8+64, getContext())) 1461 return llvm::Type::getFloatTy(getVMContext()); 1462 1463 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1464 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1465 // case. 1466 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1467 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1468 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1469 1470 return llvm::Type::getDoubleTy(getVMContext()); 1471} 1472 1473 1474/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1475/// an 8-byte GPR. This means that we either have a scalar or we are talking 1476/// about the high or low part of an up-to-16-byte struct. This routine picks 1477/// the best LLVM IR type to represent this, which may be i64 or may be anything 1478/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1479/// etc). 1480/// 1481/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1482/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1483/// the 8-byte value references. PrefType may be null. 1484/// 1485/// SourceTy is the source level type for the entire argument. SourceOffset is 1486/// an offset into this that we're processing (which is always either 0 or 8). 1487/// 1488const llvm::Type *X86_64ABIInfo:: 1489GetINTEGERTypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1490 QualType SourceTy, unsigned SourceOffset) const { 1491 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1492 // returning an 8-byte unit starting with it. See if we can safely use it. 1493 if (IROffset == 0) { 1494 // Pointers and int64's always fill the 8-byte unit. 1495 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1496 return IRType; 1497 1498 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1499 // goodness in the source type is just tail padding. This is allowed to 1500 // kick in for struct {double,int} on the int, but not on 1501 // struct{double,int,int} because we wouldn't return the second int. We 1502 // have to do this analysis on the source type because we can't depend on 1503 // unions being lowered a specific way etc. 1504 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1505 IRType->isIntegerTy(32)) { 1506 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1507 1508 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1509 SourceOffset*8+64, getContext())) 1510 return IRType; 1511 } 1512 } 1513 1514 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1515 // If this is a struct, recurse into the field at the specified offset. 1516 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1517 if (IROffset < SL->getSizeInBytes()) { 1518 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1519 IROffset -= SL->getElementOffset(FieldIdx); 1520 1521 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1522 SourceTy, SourceOffset); 1523 } 1524 } 1525 1526 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1527 const llvm::Type *EltTy = ATy->getElementType(); 1528 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1529 unsigned EltOffset = IROffset/EltSize*EltSize; 1530 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1531 SourceOffset); 1532 } 1533 1534 // Okay, we don't have any better idea of what to pass, so we pass this in an 1535 // integer register that isn't too big to fit the rest of the struct. 1536 unsigned TySizeInBytes = 1537 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1538 1539 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1540 1541 // It is always safe to classify this as an integer type up to i64 that 1542 // isn't larger than the structure. 1543 return llvm::IntegerType::get(getVMContext(), 1544 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1545} 1546 1547 1548/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 1549/// be used as elements of a two register pair to pass or return, return a 1550/// first class aggregate to represent them. For example, if the low part of 1551/// a by-value argument should be passed as i32* and the high part as float, 1552/// return {i32*, float}. 1553static const llvm::Type * 1554GetX86_64ByValArgumentPair(const llvm::Type *Lo, const llvm::Type *Hi, 1555 const llvm::TargetData &TD) { 1556 // In order to correctly satisfy the ABI, we need to the high part to start 1557 // at offset 8. If the high and low parts we inferred are both 4-byte types 1558 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 1559 // the second element at offset 8. Check for this: 1560 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 1561 unsigned HiAlign = TD.getABITypeAlignment(Hi); 1562 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign); 1563 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 1564 1565 // To handle this, we have to increase the size of the low part so that the 1566 // second element will start at an 8 byte offset. We can't increase the size 1567 // of the second element because it might make us access off the end of the 1568 // struct. 1569 if (HiStart != 8) { 1570 // There are only two sorts of types the ABI generation code can produce for 1571 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 1572 // Promote these to a larger type. 1573 if (Lo->isFloatTy()) 1574 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 1575 else { 1576 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 1577 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 1578 } 1579 } 1580 1581 const llvm::StructType *Result = 1582 llvm::StructType::get(Lo->getContext(), Lo, Hi, NULL); 1583 1584 1585 // Verify that the second element is at an 8-byte offset. 1586 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 1587 "Invalid x86-64 argument pair!"); 1588 return Result; 1589} 1590 1591ABIArgInfo X86_64ABIInfo:: 1592classifyReturnType(QualType RetTy) const { 1593 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1594 // classification algorithm. 1595 X86_64ABIInfo::Class Lo, Hi; 1596 classify(RetTy, 0, Lo, Hi); 1597 1598 // Check some invariants. 1599 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1600 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1601 1602 const llvm::Type *ResType = 0; 1603 switch (Lo) { 1604 case NoClass: 1605 if (Hi == NoClass) 1606 return ABIArgInfo::getIgnore(); 1607 // If the low part is just padding, it takes no register, leave ResType 1608 // null. 1609 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1610 "Unknown missing lo part"); 1611 break; 1612 1613 case SSEUp: 1614 case X87Up: 1615 assert(0 && "Invalid classification for lo word."); 1616 1617 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1618 // hidden argument. 1619 case Memory: 1620 return getIndirectReturnResult(RetTy); 1621 1622 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1623 // available register of the sequence %rax, %rdx is used. 1624 case Integer: 1625 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, 1626 RetTy, 0); 1627 1628 // If we have a sign or zero extended integer, make sure to return Extend 1629 // so that the parameter gets the right LLVM IR attributes. 1630 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1631 // Treat an enum type as its underlying type. 1632 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1633 RetTy = EnumTy->getDecl()->getIntegerType(); 1634 1635 if (RetTy->isIntegralOrEnumerationType() && 1636 RetTy->isPromotableIntegerType()) 1637 return ABIArgInfo::getExtend(); 1638 } 1639 break; 1640 1641 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1642 // available SSE register of the sequence %xmm0, %xmm1 is used. 1643 case SSE: 1644 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, RetTy, 0); 1645 break; 1646 1647 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1648 // returned on the X87 stack in %st0 as 80-bit x87 number. 1649 case X87: 1650 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1651 break; 1652 1653 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1654 // part of the value is returned in %st0 and the imaginary part in 1655 // %st1. 1656 case ComplexX87: 1657 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1658 ResType = llvm::StructType::get(getVMContext(), 1659 llvm::Type::getX86_FP80Ty(getVMContext()), 1660 llvm::Type::getX86_FP80Ty(getVMContext()), 1661 NULL); 1662 break; 1663 } 1664 1665 const llvm::Type *HighPart = 0; 1666 switch (Hi) { 1667 // Memory was handled previously and X87 should 1668 // never occur as a hi class. 1669 case Memory: 1670 case X87: 1671 assert(0 && "Invalid classification for hi word."); 1672 1673 case ComplexX87: // Previously handled. 1674 case NoClass: 1675 break; 1676 1677 case Integer: 1678 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 1679 8, RetTy, 8); 1680 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1681 return ABIArgInfo::getDirect(HighPart, 8); 1682 break; 1683 case SSE: 1684 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1685 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1686 return ABIArgInfo::getDirect(HighPart, 8); 1687 break; 1688 1689 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1690 // is passed in the upper half of the last used SSE register. 1691 // 1692 // SSEUP should always be preceeded by SSE, just widen. 1693 case SSEUp: 1694 assert(Lo == SSE && "Unexpected SSEUp classification."); 1695 ResType = Get16ByteVectorType(RetTy); 1696 break; 1697 1698 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1699 // returned together with the previous X87 value in %st0. 1700 case X87Up: 1701 // If X87Up is preceeded by X87, we don't need to do 1702 // anything. However, in some cases with unions it may not be 1703 // preceeded by X87. In such situations we follow gcc and pass the 1704 // extra bits in an SSE reg. 1705 if (Lo != X87) { 1706 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 1707 8, RetTy, 8); 1708 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1709 return ABIArgInfo::getDirect(HighPart, 8); 1710 } 1711 break; 1712 } 1713 1714 // If a high part was specified, merge it together with the low part. It is 1715 // known to pass in the high eightbyte of the result. We do this by forming a 1716 // first class struct aggregate with the high and low part: {low, high} 1717 if (HighPart) 1718 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1719 1720 return ABIArgInfo::getDirect(ResType); 1721} 1722 1723ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1724 unsigned &neededSSE) const { 1725 X86_64ABIInfo::Class Lo, Hi; 1726 classify(Ty, 0, Lo, Hi); 1727 1728 // Check some invariants. 1729 // FIXME: Enforce these by construction. 1730 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1731 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1732 1733 neededInt = 0; 1734 neededSSE = 0; 1735 const llvm::Type *ResType = 0; 1736 switch (Lo) { 1737 case NoClass: 1738 if (Hi == NoClass) 1739 return ABIArgInfo::getIgnore(); 1740 // If the low part is just padding, it takes no register, leave ResType 1741 // null. 1742 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1743 "Unknown missing lo part"); 1744 break; 1745 1746 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1747 // on the stack. 1748 case Memory: 1749 1750 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1751 // COMPLEX_X87, it is passed in memory. 1752 case X87: 1753 case ComplexX87: 1754 return getIndirectResult(Ty); 1755 1756 case SSEUp: 1757 case X87Up: 1758 assert(0 && "Invalid classification for lo word."); 1759 1760 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1761 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1762 // and %r9 is used. 1763 case Integer: 1764 ++neededInt; 1765 1766 // Pick an 8-byte type based on the preferred type. 1767 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1768 1769 // If we have a sign or zero extended integer, make sure to return Extend 1770 // so that the parameter gets the right LLVM IR attributes. 1771 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1772 // Treat an enum type as its underlying type. 1773 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1774 Ty = EnumTy->getDecl()->getIntegerType(); 1775 1776 if (Ty->isIntegralOrEnumerationType() && 1777 Ty->isPromotableIntegerType()) 1778 return ABIArgInfo::getExtend(); 1779 } 1780 1781 break; 1782 1783 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1784 // available SSE register is used, the registers are taken in the 1785 // order from %xmm0 to %xmm7. 1786 case SSE: { 1787 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 1788 if (Hi != NoClass || !UseX86_MMXType(IRType)) 1789 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 1790 else 1791 // This is an MMX type. Treat it as such. 1792 ResType = llvm::Type::getX86_MMXTy(getVMContext()); 1793 1794 ++neededSSE; 1795 break; 1796 } 1797 } 1798 1799 const llvm::Type *HighPart = 0; 1800 switch (Hi) { 1801 // Memory was handled previously, ComplexX87 and X87 should 1802 // never occur as hi classes, and X87Up must be preceed by X87, 1803 // which is passed in memory. 1804 case Memory: 1805 case X87: 1806 case ComplexX87: 1807 assert(0 && "Invalid classification for hi word."); 1808 break; 1809 1810 case NoClass: break; 1811 1812 case Integer: 1813 ++neededInt; 1814 // Pick an 8-byte type based on the preferred type. 1815 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1816 1817 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1818 return ABIArgInfo::getDirect(HighPart, 8); 1819 break; 1820 1821 // X87Up generally doesn't occur here (long double is passed in 1822 // memory), except in situations involving unions. 1823 case X87Up: 1824 case SSE: 1825 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1826 1827 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1828 return ABIArgInfo::getDirect(HighPart, 8); 1829 1830 ++neededSSE; 1831 break; 1832 1833 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1834 // eightbyte is passed in the upper half of the last used SSE 1835 // register. This only happens when 128-bit vectors are passed. 1836 case SSEUp: 1837 assert(Lo == SSE && "Unexpected SSEUp classification"); 1838 ResType = Get16ByteVectorType(Ty); 1839 break; 1840 } 1841 1842 // If a high part was specified, merge it together with the low part. It is 1843 // known to pass in the high eightbyte of the result. We do this by forming a 1844 // first class struct aggregate with the high and low part: {low, high} 1845 if (HighPart) 1846 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1847 1848 return ABIArgInfo::getDirect(ResType); 1849} 1850 1851void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1852 1853 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1854 1855 // Keep track of the number of assigned registers. 1856 unsigned freeIntRegs = 6, freeSSERegs = 8; 1857 1858 // If the return value is indirect, then the hidden argument is consuming one 1859 // integer register. 1860 if (FI.getReturnInfo().isIndirect()) 1861 --freeIntRegs; 1862 1863 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1864 // get assigned (in left-to-right order) for passing as follows... 1865 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1866 it != ie; ++it) { 1867 unsigned neededInt, neededSSE; 1868 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1869 1870 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1871 // eightbyte of an argument, the whole argument is passed on the 1872 // stack. If registers have already been assigned for some 1873 // eightbytes of such an argument, the assignments get reverted. 1874 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1875 freeIntRegs -= neededInt; 1876 freeSSERegs -= neededSSE; 1877 } else { 1878 it->info = getIndirectResult(it->type); 1879 } 1880 } 1881} 1882 1883static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1884 QualType Ty, 1885 CodeGenFunction &CGF) { 1886 llvm::Value *overflow_arg_area_p = 1887 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1888 llvm::Value *overflow_arg_area = 1889 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1890 1891 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1892 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1893 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1894 if (Align > 8) { 1895 // Note that we follow the ABI & gcc here, even though the type 1896 // could in theory have an alignment greater than 16. This case 1897 // shouldn't ever matter in practice. 1898 1899 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1900 llvm::Value *Offset = 1901 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1902 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1903 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1904 CGF.Int64Ty); 1905 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1906 overflow_arg_area = 1907 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1908 overflow_arg_area->getType(), 1909 "overflow_arg_area.align"); 1910 } 1911 1912 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1913 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1914 llvm::Value *Res = 1915 CGF.Builder.CreateBitCast(overflow_arg_area, 1916 llvm::PointerType::getUnqual(LTy)); 1917 1918 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1919 // l->overflow_arg_area + sizeof(type). 1920 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1921 // an 8 byte boundary. 1922 1923 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1924 llvm::Value *Offset = 1925 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 1926 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1927 "overflow_arg_area.next"); 1928 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1929 1930 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1931 return Res; 1932} 1933 1934llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1935 CodeGenFunction &CGF) const { 1936 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1937 1938 // Assume that va_list type is correct; should be pointer to LLVM type: 1939 // struct { 1940 // i32 gp_offset; 1941 // i32 fp_offset; 1942 // i8* overflow_arg_area; 1943 // i8* reg_save_area; 1944 // }; 1945 unsigned neededInt, neededSSE; 1946 1947 Ty = CGF.getContext().getCanonicalType(Ty); 1948 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 1949 1950 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1951 // in the registers. If not go to step 7. 1952 if (!neededInt && !neededSSE) 1953 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1954 1955 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1956 // general purpose registers needed to pass type and num_fp to hold 1957 // the number of floating point registers needed. 1958 1959 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1960 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1961 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1962 // 1963 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1964 // register save space). 1965 1966 llvm::Value *InRegs = 0; 1967 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1968 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1969 if (neededInt) { 1970 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1971 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1972 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 1973 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 1974 } 1975 1976 if (neededSSE) { 1977 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1978 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1979 llvm::Value *FitsInFP = 1980 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 1981 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 1982 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1983 } 1984 1985 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1986 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1987 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1988 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1989 1990 // Emit code to load the value if it was passed in registers. 1991 1992 CGF.EmitBlock(InRegBlock); 1993 1994 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1995 // an offset of l->gp_offset and/or l->fp_offset. This may require 1996 // copying to a temporary location in case the parameter is passed 1997 // in different register classes or requires an alignment greater 1998 // than 8 for general purpose registers and 16 for XMM registers. 1999 // 2000 // FIXME: This really results in shameful code when we end up needing to 2001 // collect arguments from different places; often what should result in a 2002 // simple assembling of a structure from scattered addresses has many more 2003 // loads than necessary. Can we clean this up? 2004 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2005 llvm::Value *RegAddr = 2006 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2007 "reg_save_area"); 2008 if (neededInt && neededSSE) { 2009 // FIXME: Cleanup. 2010 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2011 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2012 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2013 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2014 const llvm::Type *TyLo = ST->getElementType(0); 2015 const llvm::Type *TyHi = ST->getElementType(1); 2016 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2017 "Unexpected ABI info for mixed regs"); 2018 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2019 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2020 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2021 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2022 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2023 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2024 llvm::Value *V = 2025 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2026 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2027 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2028 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2029 2030 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2031 llvm::PointerType::getUnqual(LTy)); 2032 } else if (neededInt) { 2033 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2034 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2035 llvm::PointerType::getUnqual(LTy)); 2036 } else if (neededSSE == 1) { 2037 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2038 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2039 llvm::PointerType::getUnqual(LTy)); 2040 } else { 2041 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2042 // SSE registers are spaced 16 bytes apart in the register save 2043 // area, we need to collect the two eightbytes together. 2044 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2045 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2046 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 2047 const llvm::Type *DblPtrTy = 2048 llvm::PointerType::getUnqual(DoubleTy); 2049 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 2050 DoubleTy, NULL); 2051 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2052 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2053 DblPtrTy)); 2054 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2055 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2056 DblPtrTy)); 2057 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2058 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2059 llvm::PointerType::getUnqual(LTy)); 2060 } 2061 2062 // AMD64-ABI 3.5.7p5: Step 5. Set: 2063 // l->gp_offset = l->gp_offset + num_gp * 8 2064 // l->fp_offset = l->fp_offset + num_fp * 16. 2065 if (neededInt) { 2066 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2067 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2068 gp_offset_p); 2069 } 2070 if (neededSSE) { 2071 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2072 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2073 fp_offset_p); 2074 } 2075 CGF.EmitBranch(ContBlock); 2076 2077 // Emit code to load the value if it was passed in memory. 2078 2079 CGF.EmitBlock(InMemBlock); 2080 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2081 2082 // Return the appropriate result. 2083 2084 CGF.EmitBlock(ContBlock); 2085 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2086 "vaarg.addr"); 2087 ResAddr->reserveOperandSpace(2); 2088 ResAddr->addIncoming(RegAddr, InRegBlock); 2089 ResAddr->addIncoming(MemAddr, InMemBlock); 2090 return ResAddr; 2091} 2092 2093ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const { 2094 2095 if (Ty->isVoidType()) 2096 return ABIArgInfo::getIgnore(); 2097 2098 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2099 Ty = EnumTy->getDecl()->getIntegerType(); 2100 2101 uint64_t Size = getContext().getTypeSize(Ty); 2102 2103 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2104 if (hasNonTrivialDestructorOrCopyConstructor(RT) || 2105 RT->getDecl()->hasFlexibleArrayMember()) 2106 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2107 2108 // FIXME: mingw64-gcc emits 128-bit struct as i128 2109 if (Size <= 128 && 2110 (Size & (Size - 1)) == 0) 2111 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2112 Size)); 2113 2114 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2115 } 2116 2117 if (Ty->isPromotableIntegerType()) 2118 return ABIArgInfo::getExtend(); 2119 2120 return ABIArgInfo::getDirect(); 2121} 2122 2123void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2124 2125 QualType RetTy = FI.getReturnType(); 2126 FI.getReturnInfo() = classify(RetTy); 2127 2128 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2129 it != ie; ++it) 2130 it->info = classify(it->type); 2131} 2132 2133llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2134 CodeGenFunction &CGF) const { 2135 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2136 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2137 2138 CGBuilderTy &Builder = CGF.Builder; 2139 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2140 "ap"); 2141 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2142 llvm::Type *PTy = 2143 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2144 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2145 2146 uint64_t Offset = 2147 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2148 llvm::Value *NextAddr = 2149 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2150 "ap.next"); 2151 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2152 2153 return AddrTyped; 2154} 2155 2156// PowerPC-32 2157 2158namespace { 2159class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2160public: 2161 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2162 2163 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2164 // This is recovered from gcc output. 2165 return 1; // r1 is the dedicated stack pointer 2166 } 2167 2168 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2169 llvm::Value *Address) const; 2170}; 2171 2172} 2173 2174bool 2175PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2176 llvm::Value *Address) const { 2177 // This is calculated from the LLVM and GCC tables and verified 2178 // against gcc output. AFAIK all ABIs use the same encoding. 2179 2180 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2181 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2182 2183 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2184 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2185 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2186 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2187 2188 // 0-31: r0-31, the 4-byte general-purpose registers 2189 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2190 2191 // 32-63: fp0-31, the 8-byte floating-point registers 2192 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2193 2194 // 64-76 are various 4-byte special-purpose registers: 2195 // 64: mq 2196 // 65: lr 2197 // 66: ctr 2198 // 67: ap 2199 // 68-75 cr0-7 2200 // 76: xer 2201 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2202 2203 // 77-108: v0-31, the 16-byte vector registers 2204 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2205 2206 // 109: vrsave 2207 // 110: vscr 2208 // 111: spe_acc 2209 // 112: spefscr 2210 // 113: sfp 2211 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2212 2213 return false; 2214} 2215 2216 2217//===----------------------------------------------------------------------===// 2218// ARM ABI Implementation 2219//===----------------------------------------------------------------------===// 2220 2221namespace { 2222 2223class ARMABIInfo : public ABIInfo { 2224public: 2225 enum ABIKind { 2226 APCS = 0, 2227 AAPCS = 1, 2228 AAPCS_VFP 2229 }; 2230 2231private: 2232 ABIKind Kind; 2233 2234public: 2235 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2236 2237private: 2238 ABIKind getABIKind() const { return Kind; } 2239 2240 ABIArgInfo classifyReturnType(QualType RetTy) const; 2241 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2242 2243 virtual void computeInfo(CGFunctionInfo &FI) const; 2244 2245 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2246 CodeGenFunction &CGF) const; 2247}; 2248 2249class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2250public: 2251 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2252 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2253 2254 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2255 return 13; 2256 } 2257}; 2258 2259} 2260 2261void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2262 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2263 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2264 it != ie; ++it) 2265 it->info = classifyArgumentType(it->type); 2266 2267 const llvm::Triple &Triple(getContext().Target.getTriple()); 2268 llvm::CallingConv::ID DefaultCC; 2269 if (Triple.getEnvironmentName() == "gnueabi" || 2270 Triple.getEnvironmentName() == "eabi") 2271 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2272 else 2273 DefaultCC = llvm::CallingConv::ARM_APCS; 2274 2275 switch (getABIKind()) { 2276 case APCS: 2277 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2278 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2279 break; 2280 2281 case AAPCS: 2282 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2283 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2284 break; 2285 2286 case AAPCS_VFP: 2287 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2288 break; 2289 } 2290} 2291 2292ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2293 if (!isAggregateTypeForABI(Ty)) { 2294 // Treat an enum type as its underlying type. 2295 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2296 Ty = EnumTy->getDecl()->getIntegerType(); 2297 2298 return (Ty->isPromotableIntegerType() ? 2299 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2300 } 2301 2302 // Ignore empty records. 2303 if (isEmptyRecord(getContext(), Ty, true)) 2304 return ABIArgInfo::getIgnore(); 2305 2306 // Structures with either a non-trivial destructor or a non-trivial 2307 // copy constructor are always indirect. 2308 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2309 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2310 2311 // Otherwise, pass by coercing to a structure of the appropriate size. 2312 // 2313 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2314 // backend doesn't support byval. 2315 // FIXME: This doesn't handle alignment > 64 bits. 2316 const llvm::Type* ElemTy; 2317 unsigned SizeRegs; 2318 if (getContext().getTypeAlign(Ty) > 32) { 2319 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2320 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2321 } else { 2322 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2323 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2324 } 2325 std::vector<const llvm::Type*> LLVMFields; 2326 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 2327 const llvm::Type* STy = llvm::StructType::get(getVMContext(), LLVMFields, 2328 true); 2329 return ABIArgInfo::getDirect(STy); 2330} 2331 2332static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2333 llvm::LLVMContext &VMContext) { 2334 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2335 // is called integer-like if its size is less than or equal to one word, and 2336 // the offset of each of its addressable sub-fields is zero. 2337 2338 uint64_t Size = Context.getTypeSize(Ty); 2339 2340 // Check that the type fits in a word. 2341 if (Size > 32) 2342 return false; 2343 2344 // FIXME: Handle vector types! 2345 if (Ty->isVectorType()) 2346 return false; 2347 2348 // Float types are never treated as "integer like". 2349 if (Ty->isRealFloatingType()) 2350 return false; 2351 2352 // If this is a builtin or pointer type then it is ok. 2353 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2354 return true; 2355 2356 // Small complex integer types are "integer like". 2357 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2358 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2359 2360 // Single element and zero sized arrays should be allowed, by the definition 2361 // above, but they are not. 2362 2363 // Otherwise, it must be a record type. 2364 const RecordType *RT = Ty->getAs<RecordType>(); 2365 if (!RT) return false; 2366 2367 // Ignore records with flexible arrays. 2368 const RecordDecl *RD = RT->getDecl(); 2369 if (RD->hasFlexibleArrayMember()) 2370 return false; 2371 2372 // Check that all sub-fields are at offset 0, and are themselves "integer 2373 // like". 2374 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2375 2376 bool HadField = false; 2377 unsigned idx = 0; 2378 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2379 i != e; ++i, ++idx) { 2380 const FieldDecl *FD = *i; 2381 2382 // Bit-fields are not addressable, we only need to verify they are "integer 2383 // like". We still have to disallow a subsequent non-bitfield, for example: 2384 // struct { int : 0; int x } 2385 // is non-integer like according to gcc. 2386 if (FD->isBitField()) { 2387 if (!RD->isUnion()) 2388 HadField = true; 2389 2390 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2391 return false; 2392 2393 continue; 2394 } 2395 2396 // Check if this field is at offset 0. 2397 if (Layout.getFieldOffset(idx) != 0) 2398 return false; 2399 2400 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2401 return false; 2402 2403 // Only allow at most one field in a structure. This doesn't match the 2404 // wording above, but follows gcc in situations with a field following an 2405 // empty structure. 2406 if (!RD->isUnion()) { 2407 if (HadField) 2408 return false; 2409 2410 HadField = true; 2411 } 2412 } 2413 2414 return true; 2415} 2416 2417ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2418 if (RetTy->isVoidType()) 2419 return ABIArgInfo::getIgnore(); 2420 2421 // Large vector types should be returned via memory. 2422 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 2423 return ABIArgInfo::getIndirect(0); 2424 2425 if (!isAggregateTypeForABI(RetTy)) { 2426 // Treat an enum type as its underlying type. 2427 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2428 RetTy = EnumTy->getDecl()->getIntegerType(); 2429 2430 return (RetTy->isPromotableIntegerType() ? 2431 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2432 } 2433 2434 // Structures with either a non-trivial destructor or a non-trivial 2435 // copy constructor are always indirect. 2436 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2437 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2438 2439 // Are we following APCS? 2440 if (getABIKind() == APCS) { 2441 if (isEmptyRecord(getContext(), RetTy, false)) 2442 return ABIArgInfo::getIgnore(); 2443 2444 // Complex types are all returned as packed integers. 2445 // 2446 // FIXME: Consider using 2 x vector types if the back end handles them 2447 // correctly. 2448 if (RetTy->isAnyComplexType()) 2449 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2450 getContext().getTypeSize(RetTy))); 2451 2452 // Integer like structures are returned in r0. 2453 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2454 // Return in the smallest viable integer type. 2455 uint64_t Size = getContext().getTypeSize(RetTy); 2456 if (Size <= 8) 2457 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2458 if (Size <= 16) 2459 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2460 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2461 } 2462 2463 // Otherwise return in memory. 2464 return ABIArgInfo::getIndirect(0); 2465 } 2466 2467 // Otherwise this is an AAPCS variant. 2468 2469 if (isEmptyRecord(getContext(), RetTy, true)) 2470 return ABIArgInfo::getIgnore(); 2471 2472 // Aggregates <= 4 bytes are returned in r0; other aggregates 2473 // are returned indirectly. 2474 uint64_t Size = getContext().getTypeSize(RetTy); 2475 if (Size <= 32) { 2476 // Return in the smallest viable integer type. 2477 if (Size <= 8) 2478 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2479 if (Size <= 16) 2480 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2481 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2482 } 2483 2484 return ABIArgInfo::getIndirect(0); 2485} 2486 2487llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2488 CodeGenFunction &CGF) const { 2489 // FIXME: Need to handle alignment 2490 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2491 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2492 2493 CGBuilderTy &Builder = CGF.Builder; 2494 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2495 "ap"); 2496 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2497 llvm::Type *PTy = 2498 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2499 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2500 2501 uint64_t Offset = 2502 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2503 llvm::Value *NextAddr = 2504 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2505 "ap.next"); 2506 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2507 2508 return AddrTyped; 2509} 2510 2511//===----------------------------------------------------------------------===// 2512// SystemZ ABI Implementation 2513//===----------------------------------------------------------------------===// 2514 2515namespace { 2516 2517class SystemZABIInfo : public ABIInfo { 2518public: 2519 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2520 2521 bool isPromotableIntegerType(QualType Ty) const; 2522 2523 ABIArgInfo classifyReturnType(QualType RetTy) const; 2524 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2525 2526 virtual void computeInfo(CGFunctionInfo &FI) const { 2527 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2528 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2529 it != ie; ++it) 2530 it->info = classifyArgumentType(it->type); 2531 } 2532 2533 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2534 CodeGenFunction &CGF) const; 2535}; 2536 2537class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2538public: 2539 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 2540 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 2541}; 2542 2543} 2544 2545bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2546 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2547 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2548 switch (BT->getKind()) { 2549 case BuiltinType::Bool: 2550 case BuiltinType::Char_S: 2551 case BuiltinType::Char_U: 2552 case BuiltinType::SChar: 2553 case BuiltinType::UChar: 2554 case BuiltinType::Short: 2555 case BuiltinType::UShort: 2556 case BuiltinType::Int: 2557 case BuiltinType::UInt: 2558 return true; 2559 default: 2560 return false; 2561 } 2562 return false; 2563} 2564 2565llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2566 CodeGenFunction &CGF) const { 2567 // FIXME: Implement 2568 return 0; 2569} 2570 2571 2572ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 2573 if (RetTy->isVoidType()) 2574 return ABIArgInfo::getIgnore(); 2575 if (isAggregateTypeForABI(RetTy)) 2576 return ABIArgInfo::getIndirect(0); 2577 2578 return (isPromotableIntegerType(RetTy) ? 2579 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2580} 2581 2582ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 2583 if (isAggregateTypeForABI(Ty)) 2584 return ABIArgInfo::getIndirect(0); 2585 2586 return (isPromotableIntegerType(Ty) ? 2587 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2588} 2589 2590//===----------------------------------------------------------------------===// 2591// MBlaze ABI Implementation 2592//===----------------------------------------------------------------------===// 2593 2594namespace { 2595 2596class MBlazeABIInfo : public ABIInfo { 2597public: 2598 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2599 2600 bool isPromotableIntegerType(QualType Ty) const; 2601 2602 ABIArgInfo classifyReturnType(QualType RetTy) const; 2603 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2604 2605 virtual void computeInfo(CGFunctionInfo &FI) const { 2606 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2607 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2608 it != ie; ++it) 2609 it->info = classifyArgumentType(it->type); 2610 } 2611 2612 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2613 CodeGenFunction &CGF) const; 2614}; 2615 2616class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 2617public: 2618 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 2619 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 2620 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2621 CodeGen::CodeGenModule &M) const; 2622}; 2623 2624} 2625 2626bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 2627 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 2628 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2629 switch (BT->getKind()) { 2630 case BuiltinType::Bool: 2631 case BuiltinType::Char_S: 2632 case BuiltinType::Char_U: 2633 case BuiltinType::SChar: 2634 case BuiltinType::UChar: 2635 case BuiltinType::Short: 2636 case BuiltinType::UShort: 2637 return true; 2638 default: 2639 return false; 2640 } 2641 return false; 2642} 2643 2644llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2645 CodeGenFunction &CGF) const { 2646 // FIXME: Implement 2647 return 0; 2648} 2649 2650 2651ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 2652 if (RetTy->isVoidType()) 2653 return ABIArgInfo::getIgnore(); 2654 if (isAggregateTypeForABI(RetTy)) 2655 return ABIArgInfo::getIndirect(0); 2656 2657 return (isPromotableIntegerType(RetTy) ? 2658 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2659} 2660 2661ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 2662 if (isAggregateTypeForABI(Ty)) 2663 return ABIArgInfo::getIndirect(0); 2664 2665 return (isPromotableIntegerType(Ty) ? 2666 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2667} 2668 2669void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2670 llvm::GlobalValue *GV, 2671 CodeGen::CodeGenModule &M) 2672 const { 2673 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 2674 if (!FD) return; 2675 2676 llvm::CallingConv::ID CC = llvm::CallingConv::C; 2677 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 2678 CC = llvm::CallingConv::MBLAZE_INTR; 2679 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 2680 CC = llvm::CallingConv::MBLAZE_SVOL; 2681 2682 if (CC != llvm::CallingConv::C) { 2683 // Handle 'interrupt_handler' attribute: 2684 llvm::Function *F = cast<llvm::Function>(GV); 2685 2686 // Step 1: Set ISR calling convention. 2687 F->setCallingConv(CC); 2688 2689 // Step 2: Add attributes goodness. 2690 F->addFnAttr(llvm::Attribute::NoInline); 2691 } 2692 2693 // Step 3: Emit _interrupt_handler alias. 2694 if (CC == llvm::CallingConv::MBLAZE_INTR) 2695 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2696 "_interrupt_handler", GV, &M.getModule()); 2697} 2698 2699 2700//===----------------------------------------------------------------------===// 2701// MSP430 ABI Implementation 2702//===----------------------------------------------------------------------===// 2703 2704namespace { 2705 2706class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2707public: 2708 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2709 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2710 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2711 CodeGen::CodeGenModule &M) const; 2712}; 2713 2714} 2715 2716void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2717 llvm::GlobalValue *GV, 2718 CodeGen::CodeGenModule &M) const { 2719 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2720 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2721 // Handle 'interrupt' attribute: 2722 llvm::Function *F = cast<llvm::Function>(GV); 2723 2724 // Step 1: Set ISR calling convention. 2725 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2726 2727 // Step 2: Add attributes goodness. 2728 F->addFnAttr(llvm::Attribute::NoInline); 2729 2730 // Step 3: Emit ISR vector alias. 2731 unsigned Num = attr->getNumber() + 0xffe0; 2732 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2733 "vector_" + llvm::Twine::utohexstr(Num), 2734 GV, &M.getModule()); 2735 } 2736 } 2737} 2738 2739//===----------------------------------------------------------------------===// 2740// MIPS ABI Implementation. This works for both little-endian and 2741// big-endian variants. 2742//===----------------------------------------------------------------------===// 2743 2744namespace { 2745class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 2746public: 2747 MIPSTargetCodeGenInfo(CodeGenTypes &CGT) 2748 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2749 2750 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 2751 return 29; 2752 } 2753 2754 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2755 llvm::Value *Address) const; 2756}; 2757} 2758 2759bool 2760MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2761 llvm::Value *Address) const { 2762 // This information comes from gcc's implementation, which seems to 2763 // as canonical as it gets. 2764 2765 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2766 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2767 2768 // Everything on MIPS is 4 bytes. Double-precision FP registers 2769 // are aliased to pairs of single-precision FP registers. 2770 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2771 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2772 2773 // 0-31 are the general purpose registers, $0 - $31. 2774 // 32-63 are the floating-point registers, $f0 - $f31. 2775 // 64 and 65 are the multiply/divide registers, $hi and $lo. 2776 // 66 is the (notional, I think) register for signal-handler return. 2777 AssignToArrayRange(Builder, Address, Four8, 0, 65); 2778 2779 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 2780 // They are one bit wide and ignored here. 2781 2782 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 2783 // (coprocessor 1 is the FP unit) 2784 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 2785 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 2786 // 176-181 are the DSP accumulator registers. 2787 AssignToArrayRange(Builder, Address, Four8, 80, 181); 2788 2789 return false; 2790} 2791 2792 2793const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 2794 if (TheTargetCodeGenInfo) 2795 return *TheTargetCodeGenInfo; 2796 2797 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2798 // free it. 2799 2800 const llvm::Triple &Triple = getContext().Target.getTriple(); 2801 switch (Triple.getArch()) { 2802 default: 2803 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 2804 2805 case llvm::Triple::mips: 2806 case llvm::Triple::mipsel: 2807 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types)); 2808 2809 case llvm::Triple::arm: 2810 case llvm::Triple::thumb: 2811 // FIXME: We want to know the float calling convention as well. 2812 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2813 return *(TheTargetCodeGenInfo = 2814 new ARMTargetCodeGenInfo(Types, ARMABIInfo::APCS)); 2815 2816 return *(TheTargetCodeGenInfo = 2817 new ARMTargetCodeGenInfo(Types, ARMABIInfo::AAPCS)); 2818 2819 case llvm::Triple::ppc: 2820 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 2821 2822 case llvm::Triple::systemz: 2823 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 2824 2825 case llvm::Triple::mblaze: 2826 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 2827 2828 case llvm::Triple::msp430: 2829 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 2830 2831 case llvm::Triple::x86: 2832 switch (Triple.getOS()) { 2833 case llvm::Triple::Darwin: 2834 return *(TheTargetCodeGenInfo = 2835 new X86_32TargetCodeGenInfo(Types, true, true)); 2836 case llvm::Triple::Cygwin: 2837 case llvm::Triple::MinGW32: 2838 case llvm::Triple::AuroraUX: 2839 case llvm::Triple::DragonFly: 2840 case llvm::Triple::FreeBSD: 2841 case llvm::Triple::OpenBSD: 2842 case llvm::Triple::NetBSD: 2843 return *(TheTargetCodeGenInfo = 2844 new X86_32TargetCodeGenInfo(Types, false, true)); 2845 2846 default: 2847 return *(TheTargetCodeGenInfo = 2848 new X86_32TargetCodeGenInfo(Types, false, false)); 2849 } 2850 2851 case llvm::Triple::x86_64: 2852 switch (Triple.getOS()) { 2853 case llvm::Triple::Win32: 2854 case llvm::Triple::MinGW32: 2855 case llvm::Triple::Cygwin: 2856 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 2857 default: 2858 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types)); 2859 } 2860 } 2861} 2862