TargetInfo.cpp revision 77b89b87c3b9220fea1bc80f6d6598d2003cc8a8
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/ADT/Triple.h" 22#include "llvm/Support/raw_ostream.h" 23using namespace clang; 24using namespace CodeGen; 25 26static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 27 llvm::Value *Array, 28 llvm::Value *Value, 29 unsigned FirstIndex, 30 unsigned LastIndex) { 31 // Alternatively, we could emit this as a loop in the source. 32 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 33 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 34 Builder.CreateStore(Value, Cell); 35 } 36} 37 38ABIInfo::~ABIInfo() {} 39 40void ABIArgInfo::dump() const { 41 llvm::raw_ostream &OS = llvm::errs(); 42 OS << "(ABIArgInfo Kind="; 43 switch (TheKind) { 44 case Direct: 45 OS << "Direct"; 46 break; 47 case Extend: 48 OS << "Extend"; 49 break; 50 case Ignore: 51 OS << "Ignore"; 52 break; 53 case Coerce: 54 OS << "Coerce Type="; 55 getCoerceToType()->print(OS); 56 break; 57 case Indirect: 58 OS << "Indirect Align=" << getIndirectAlign() 59 << " Byal=" << getIndirectByVal(); 60 break; 61 case Expand: 62 OS << "Expand"; 63 break; 64 } 65 OS << ")\n"; 66} 67 68TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 69 70static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 71 72/// isEmptyField - Return true iff a the field is "empty", that is it 73/// is an unnamed bit-field or an (array of) empty record(s). 74static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 75 bool AllowArrays) { 76 if (FD->isUnnamedBitfield()) 77 return true; 78 79 QualType FT = FD->getType(); 80 81 // Constant arrays of empty records count as empty, strip them off. 82 if (AllowArrays) 83 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 84 FT = AT->getElementType(); 85 86 const RecordType *RT = FT->getAs<RecordType>(); 87 if (!RT) 88 return false; 89 90 // C++ record fields are never empty, at least in the Itanium ABI. 91 // 92 // FIXME: We should use a predicate for whether this behavior is true in the 93 // current ABI. 94 if (isa<CXXRecordDecl>(RT->getDecl())) 95 return false; 96 97 return isEmptyRecord(Context, FT, AllowArrays); 98} 99 100/// isEmptyRecord - Return true iff a structure contains only empty 101/// fields. Note that a structure with a flexible array member is not 102/// considered empty. 103static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 104 const RecordType *RT = T->getAs<RecordType>(); 105 if (!RT) 106 return 0; 107 const RecordDecl *RD = RT->getDecl(); 108 if (RD->hasFlexibleArrayMember()) 109 return false; 110 111 // If this is a C++ record, check the bases first. 112 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 113 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 114 e = CXXRD->bases_end(); i != e; ++i) 115 if (!isEmptyRecord(Context, i->getType(), true)) 116 return false; 117 118 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 119 i != e; ++i) 120 if (!isEmptyField(Context, *i, AllowArrays)) 121 return false; 122 return true; 123} 124 125/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 126/// a non-trivial destructor or a non-trivial copy constructor. 127static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 128 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 129 if (!RD) 130 return false; 131 132 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 133} 134 135/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 136/// a record type with either a non-trivial destructor or a non-trivial copy 137/// constructor. 138static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 139 const RecordType *RT = T->getAs<RecordType>(); 140 if (!RT) 141 return false; 142 143 return hasNonTrivialDestructorOrCopyConstructor(RT); 144} 145 146/// isSingleElementStruct - Determine if a structure is a "single 147/// element struct", i.e. it has exactly one non-empty field or 148/// exactly one field which is itself a single element 149/// struct. Structures with flexible array members are never 150/// considered single element structs. 151/// 152/// \return The field declaration for the single non-empty field, if 153/// it exists. 154static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 155 const RecordType *RT = T->getAsStructureType(); 156 if (!RT) 157 return 0; 158 159 const RecordDecl *RD = RT->getDecl(); 160 if (RD->hasFlexibleArrayMember()) 161 return 0; 162 163 const Type *Found = 0; 164 165 // If this is a C++ record, check the bases first. 166 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 167 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 168 e = CXXRD->bases_end(); i != e; ++i) { 169 // Ignore empty records. 170 if (isEmptyRecord(Context, i->getType(), true)) 171 continue; 172 173 // If we already found an element then this isn't a single-element struct. 174 if (Found) 175 return 0; 176 177 // If this is non-empty and not a single element struct, the composite 178 // cannot be a single element struct. 179 Found = isSingleElementStruct(i->getType(), Context); 180 if (!Found) 181 return 0; 182 } 183 } 184 185 // Check for single element. 186 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 187 i != e; ++i) { 188 const FieldDecl *FD = *i; 189 QualType FT = FD->getType(); 190 191 // Ignore empty fields. 192 if (isEmptyField(Context, FD, true)) 193 continue; 194 195 // If we already found an element then this isn't a single-element 196 // struct. 197 if (Found) 198 return 0; 199 200 // Treat single element arrays as the element. 201 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 202 if (AT->getSize().getZExtValue() != 1) 203 break; 204 FT = AT->getElementType(); 205 } 206 207 if (!CodeGenFunction::hasAggregateLLVMType(FT)) { 208 Found = FT.getTypePtr(); 209 } else { 210 Found = isSingleElementStruct(FT, Context); 211 if (!Found) 212 return 0; 213 } 214 } 215 216 return Found; 217} 218 219static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 220 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 221 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 222 !Ty->isBlockPointerType()) 223 return false; 224 225 uint64_t Size = Context.getTypeSize(Ty); 226 return Size == 32 || Size == 64; 227} 228 229/// canExpandIndirectArgument - Test whether an argument type which is to be 230/// passed indirectly (on the stack) would have the equivalent layout if it was 231/// expanded into separate arguments. If so, we prefer to do the latter to avoid 232/// inhibiting optimizations. 233/// 234// FIXME: This predicate is missing many cases, currently it just follows 235// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 236// should probably make this smarter, or better yet make the LLVM backend 237// capable of handling it. 238static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 239 // We can only expand structure types. 240 const RecordType *RT = Ty->getAs<RecordType>(); 241 if (!RT) 242 return false; 243 244 // We can only expand (C) structures. 245 // 246 // FIXME: This needs to be generalized to handle classes as well. 247 const RecordDecl *RD = RT->getDecl(); 248 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 249 return false; 250 251 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 252 i != e; ++i) { 253 const FieldDecl *FD = *i; 254 255 if (!is32Or64BitBasicType(FD->getType(), Context)) 256 return false; 257 258 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 259 // how to expand them yet, and the predicate for telling if a bitfield still 260 // counts as "basic" is more complicated than what we were doing previously. 261 if (FD->isBitField()) 262 return false; 263 } 264 265 return true; 266} 267 268namespace { 269/// DefaultABIInfo - The default implementation for ABI specific 270/// details. This implementation provides information which results in 271/// self-consistent and sensible LLVM IR generation, but does not 272/// conform to any particular ABI. 273class DefaultABIInfo : public ABIInfo { 274 ABIArgInfo classifyReturnType(QualType RetTy, 275 ASTContext &Context, 276 llvm::LLVMContext &VMContext) const; 277 278 ABIArgInfo classifyArgumentType(QualType RetTy, 279 ASTContext &Context, 280 llvm::LLVMContext &VMContext) const; 281 282 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 283 llvm::LLVMContext &VMContext) const { 284 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 285 VMContext); 286 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 287 it != ie; ++it) 288 it->info = classifyArgumentType(it->type, Context, VMContext); 289 } 290 291 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 292 CodeGenFunction &CGF) const; 293}; 294 295class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 296public: 297 DefaultTargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 298}; 299 300llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 301 CodeGenFunction &CGF) const { 302 return 0; 303} 304 305ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty, 306 ASTContext &Context, 307 llvm::LLVMContext &VMContext) const { 308 if (CodeGenFunction::hasAggregateLLVMType(Ty)) 309 return ABIArgInfo::getIndirect(0); 310 311 // Treat an enum type as its underlying type. 312 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 313 Ty = EnumTy->getDecl()->getIntegerType(); 314 315 return (Ty->isPromotableIntegerType() ? 316 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 317} 318 319/// X86_32ABIInfo - The X86-32 ABI information. 320class X86_32ABIInfo : public ABIInfo { 321 ASTContext &Context; 322 bool IsDarwinVectorABI; 323 bool IsSmallStructInRegABI; 324 325 static bool isRegisterSize(unsigned Size) { 326 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 327 } 328 329 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 330 331 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 332 /// such that the argument will be passed in memory. 333 ABIArgInfo getIndirectResult(QualType Ty, ASTContext &Context, 334 bool ByVal = true) const; 335 336public: 337 ABIArgInfo classifyReturnType(QualType RetTy, 338 ASTContext &Context, 339 llvm::LLVMContext &VMContext) const; 340 341 ABIArgInfo classifyArgumentType(QualType RetTy, 342 ASTContext &Context, 343 llvm::LLVMContext &VMContext) const; 344 345 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 346 llvm::LLVMContext &VMContext) const { 347 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 348 VMContext); 349 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 350 it != ie; ++it) 351 it->info = classifyArgumentType(it->type, Context, VMContext); 352 } 353 354 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 355 CodeGenFunction &CGF) const; 356 357 X86_32ABIInfo(ASTContext &Context, bool d, bool p) 358 : ABIInfo(), Context(Context), IsDarwinVectorABI(d), 359 IsSmallStructInRegABI(p) {} 360}; 361 362class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 363public: 364 X86_32TargetCodeGenInfo(ASTContext &Context, bool d, bool p) 365 :TargetCodeGenInfo(new X86_32ABIInfo(Context, d, p)) {} 366 367 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 368 CodeGen::CodeGenModule &CGM) const; 369 370 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 371 // Darwin uses different dwarf register numbers for EH. 372 if (CGM.isTargetDarwin()) return 5; 373 374 return 4; 375 } 376 377 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 378 llvm::Value *Address) const; 379}; 380 381} 382 383/// shouldReturnTypeInRegister - Determine if the given type should be 384/// passed in a register (for the Darwin ABI). 385bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 386 ASTContext &Context) { 387 uint64_t Size = Context.getTypeSize(Ty); 388 389 // Type must be register sized. 390 if (!isRegisterSize(Size)) 391 return false; 392 393 if (Ty->isVectorType()) { 394 // 64- and 128- bit vectors inside structures are not returned in 395 // registers. 396 if (Size == 64 || Size == 128) 397 return false; 398 399 return true; 400 } 401 402 // If this is a builtin, pointer, enum, complex type, member pointer, or 403 // member function pointer it is ok. 404 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 405 Ty->isAnyComplexType() || Ty->isEnumeralType() || 406 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 407 return true; 408 409 // Arrays are treated like records. 410 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 411 return shouldReturnTypeInRegister(AT->getElementType(), Context); 412 413 // Otherwise, it must be a record type. 414 const RecordType *RT = Ty->getAs<RecordType>(); 415 if (!RT) return false; 416 417 // FIXME: Traverse bases here too. 418 419 // Structure types are passed in register if all fields would be 420 // passed in a register. 421 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 422 e = RT->getDecl()->field_end(); i != e; ++i) { 423 const FieldDecl *FD = *i; 424 425 // Empty fields are ignored. 426 if (isEmptyField(Context, FD, true)) 427 continue; 428 429 // Check fields recursively. 430 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 431 return false; 432 } 433 434 return true; 435} 436 437ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 438 ASTContext &Context, 439 llvm::LLVMContext &VMContext) const { 440 if (RetTy->isVoidType()) { 441 return ABIArgInfo::getIgnore(); 442 } else if (const VectorType *VT = RetTy->getAs<VectorType>()) { 443 // On Darwin, some vectors are returned in registers. 444 if (IsDarwinVectorABI) { 445 uint64_t Size = Context.getTypeSize(RetTy); 446 447 // 128-bit vectors are a special case; they are returned in 448 // registers and we need to make sure to pick a type the LLVM 449 // backend will like. 450 if (Size == 128) 451 return ABIArgInfo::getCoerce(llvm::VectorType::get( 452 llvm::Type::getInt64Ty(VMContext), 2)); 453 454 // Always return in register if it fits in a general purpose 455 // register, or if it is 64 bits and has a single element. 456 if ((Size == 8 || Size == 16 || Size == 32) || 457 (Size == 64 && VT->getNumElements() == 1)) 458 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 459 460 return ABIArgInfo::getIndirect(0); 461 } 462 463 return ABIArgInfo::getDirect(); 464 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 465 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 466 // Structures with either a non-trivial destructor or a non-trivial 467 // copy constructor are always indirect. 468 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 469 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 470 471 // Structures with flexible arrays are always indirect. 472 if (RT->getDecl()->hasFlexibleArrayMember()) 473 return ABIArgInfo::getIndirect(0); 474 } 475 476 // If specified, structs and unions are always indirect. 477 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 478 return ABIArgInfo::getIndirect(0); 479 480 // Classify "single element" structs as their element type. 481 if (const Type *SeltTy = isSingleElementStruct(RetTy, Context)) { 482 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 483 if (BT->isIntegerType()) { 484 // We need to use the size of the structure, padding 485 // bit-fields can adjust that to be larger than the single 486 // element type. 487 uint64_t Size = Context.getTypeSize(RetTy); 488 return ABIArgInfo::getCoerce( 489 llvm::IntegerType::get(VMContext, (unsigned) Size)); 490 } else if (BT->getKind() == BuiltinType::Float) { 491 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 492 "Unexpect single element structure size!"); 493 return ABIArgInfo::getCoerce(llvm::Type::getFloatTy(VMContext)); 494 } else if (BT->getKind() == BuiltinType::Double) { 495 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 496 "Unexpect single element structure size!"); 497 return ABIArgInfo::getCoerce(llvm::Type::getDoubleTy(VMContext)); 498 } 499 } else if (SeltTy->isPointerType()) { 500 // FIXME: It would be really nice if this could come out as the proper 501 // pointer type. 502 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(VMContext); 503 return ABIArgInfo::getCoerce(PtrTy); 504 } else if (SeltTy->isVectorType()) { 505 // 64- and 128-bit vectors are never returned in a 506 // register when inside a structure. 507 uint64_t Size = Context.getTypeSize(RetTy); 508 if (Size == 64 || Size == 128) 509 return ABIArgInfo::getIndirect(0); 510 511 return classifyReturnType(QualType(SeltTy, 0), Context, VMContext); 512 } 513 } 514 515 // Small structures which are register sized are generally returned 516 // in a register. 517 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, Context)) { 518 uint64_t Size = Context.getTypeSize(RetTy); 519 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 520 } 521 522 return ABIArgInfo::getIndirect(0); 523 } else { 524 // Treat an enum type as its underlying type. 525 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 526 RetTy = EnumTy->getDecl()->getIntegerType(); 527 528 return (RetTy->isPromotableIntegerType() ? 529 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 530 } 531} 532 533ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, 534 ASTContext &Context, 535 bool ByVal) const { 536 if (!ByVal) 537 return ABIArgInfo::getIndirect(0, false); 538 539 // Compute the byval alignment. We trust the back-end to honor the 540 // minimum ABI alignment for byval, to make cleaner IR. 541 const unsigned MinABIAlign = 4; 542 unsigned Align = Context.getTypeAlign(Ty) / 8; 543 if (Align > MinABIAlign) 544 return ABIArgInfo::getIndirect(Align); 545 return ABIArgInfo::getIndirect(0); 546} 547 548ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 549 ASTContext &Context, 550 llvm::LLVMContext &VMContext) const { 551 // FIXME: Set alignment on indirect arguments. 552 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 553 // Structures with flexible arrays are always indirect. 554 if (const RecordType *RT = Ty->getAs<RecordType>()) { 555 // Structures with either a non-trivial destructor or a non-trivial 556 // copy constructor are always indirect. 557 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 558 return getIndirectResult(Ty, Context, /*ByVal=*/false); 559 560 if (RT->getDecl()->hasFlexibleArrayMember()) 561 return getIndirectResult(Ty, Context); 562 } 563 564 // Ignore empty structs. 565 if (Ty->isStructureType() && Context.getTypeSize(Ty) == 0) 566 return ABIArgInfo::getIgnore(); 567 568 // Expand small (<= 128-bit) record types when we know that the stack layout 569 // of those arguments will match the struct. This is important because the 570 // LLVM backend isn't smart enough to remove byval, which inhibits many 571 // optimizations. 572 if (Context.getTypeSize(Ty) <= 4*32 && 573 canExpandIndirectArgument(Ty, Context)) 574 return ABIArgInfo::getExpand(); 575 576 return getIndirectResult(Ty, Context); 577 } else { 578 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 579 Ty = EnumTy->getDecl()->getIntegerType(); 580 581 return (Ty->isPromotableIntegerType() ? 582 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 583 } 584} 585 586llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 587 CodeGenFunction &CGF) const { 588 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 589 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 590 591 CGBuilderTy &Builder = CGF.Builder; 592 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 593 "ap"); 594 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 595 llvm::Type *PTy = 596 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 597 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 598 599 uint64_t Offset = 600 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 601 llvm::Value *NextAddr = 602 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 603 "ap.next"); 604 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 605 606 return AddrTyped; 607} 608 609void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 610 llvm::GlobalValue *GV, 611 CodeGen::CodeGenModule &CGM) const { 612 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 613 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 614 // Get the LLVM function. 615 llvm::Function *Fn = cast<llvm::Function>(GV); 616 617 // Now add the 'alignstack' attribute with a value of 16. 618 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 619 } 620 } 621} 622 623bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 624 CodeGen::CodeGenFunction &CGF, 625 llvm::Value *Address) const { 626 CodeGen::CGBuilderTy &Builder = CGF.Builder; 627 llvm::LLVMContext &Context = CGF.getLLVMContext(); 628 629 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 630 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 631 632 // 0-7 are the eight integer registers; the order is different 633 // on Darwin (for EH), but the range is the same. 634 // 8 is %eip. 635 AssignToArrayRange(Builder, Address, Four8, 0, 8); 636 637 if (CGF.CGM.isTargetDarwin()) { 638 // 12-16 are st(0..4). Not sure why we stop at 4. 639 // These have size 16, which is sizeof(long double) on 640 // platforms with 8-byte alignment for that type. 641 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 642 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 643 644 } else { 645 // 9 is %eflags, which doesn't get a size on Darwin for some 646 // reason. 647 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 648 649 // 11-16 are st(0..5). Not sure why we stop at 5. 650 // These have size 12, which is sizeof(long double) on 651 // platforms with 4-byte alignment for that type. 652 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 653 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 654 } 655 656 return false; 657} 658 659namespace { 660/// X86_64ABIInfo - The X86_64 ABI information. 661class X86_64ABIInfo : public ABIInfo { 662 enum Class { 663 Integer = 0, 664 SSE, 665 SSEUp, 666 X87, 667 X87Up, 668 ComplexX87, 669 NoClass, 670 Memory 671 }; 672 673 /// merge - Implement the X86_64 ABI merging algorithm. 674 /// 675 /// Merge an accumulating classification \arg Accum with a field 676 /// classification \arg Field. 677 /// 678 /// \param Accum - The accumulating classification. This should 679 /// always be either NoClass or the result of a previous merge 680 /// call. In addition, this should never be Memory (the caller 681 /// should just return Memory for the aggregate). 682 Class merge(Class Accum, Class Field) const; 683 684 /// classify - Determine the x86_64 register classes in which the 685 /// given type T should be passed. 686 /// 687 /// \param Lo - The classification for the parts of the type 688 /// residing in the low word of the containing object. 689 /// 690 /// \param Hi - The classification for the parts of the type 691 /// residing in the high word of the containing object. 692 /// 693 /// \param OffsetBase - The bit offset of this type in the 694 /// containing object. Some parameters are classified different 695 /// depending on whether they straddle an eightbyte boundary. 696 /// 697 /// If a word is unused its result will be NoClass; if a type should 698 /// be passed in Memory then at least the classification of \arg Lo 699 /// will be Memory. 700 /// 701 /// The \arg Lo class will be NoClass iff the argument is ignored. 702 /// 703 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 704 /// also be ComplexX87. 705 void classify(QualType T, ASTContext &Context, uint64_t OffsetBase, 706 Class &Lo, Class &Hi) const; 707 708 /// getCoerceResult - Given a source type \arg Ty and an LLVM type 709 /// to coerce to, chose the best way to pass Ty in the same place 710 /// that \arg CoerceTo would be passed, but while keeping the 711 /// emitted code as simple as possible. 712 /// 713 /// FIXME: Note, this should be cleaned up to just take an enumeration of all 714 /// the ways we might want to pass things, instead of constructing an LLVM 715 /// type. This makes this code more explicit, and it makes it clearer that we 716 /// are also doing this for correctness in the case of passing scalar types. 717 ABIArgInfo getCoerceResult(QualType Ty, 718 const llvm::Type *CoerceTo, 719 ASTContext &Context) const; 720 721 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 722 /// such that the argument will be returned in memory. 723 ABIArgInfo getIndirectReturnResult(QualType Ty, ASTContext &Context) const; 724 725 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 726 /// such that the argument will be passed in memory. 727 ABIArgInfo getIndirectResult(QualType Ty, ASTContext &Context) const; 728 729 ABIArgInfo classifyReturnType(QualType RetTy, 730 ASTContext &Context, 731 llvm::LLVMContext &VMContext) const; 732 733 ABIArgInfo classifyArgumentType(QualType Ty, 734 ASTContext &Context, 735 llvm::LLVMContext &VMContext, 736 unsigned &neededInt, 737 unsigned &neededSSE) const; 738 739public: 740 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 741 llvm::LLVMContext &VMContext) const; 742 743 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 744 CodeGenFunction &CGF) const; 745}; 746 747class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 748public: 749 X86_64TargetCodeGenInfo():TargetCodeGenInfo(new X86_64ABIInfo()) {} 750 751 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 752 return 7; 753 } 754 755 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 756 llvm::Value *Address) const { 757 CodeGen::CGBuilderTy &Builder = CGF.Builder; 758 llvm::LLVMContext &Context = CGF.getLLVMContext(); 759 760 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 761 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 762 763 // 0-15 are the 16 integer registers. 764 // 16 is %rip. 765 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 766 767 return false; 768 } 769}; 770 771} 772 773X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, 774 Class Field) const { 775 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 776 // classified recursively so that always two fields are 777 // considered. The resulting class is calculated according to 778 // the classes of the fields in the eightbyte: 779 // 780 // (a) If both classes are equal, this is the resulting class. 781 // 782 // (b) If one of the classes is NO_CLASS, the resulting class is 783 // the other class. 784 // 785 // (c) If one of the classes is MEMORY, the result is the MEMORY 786 // class. 787 // 788 // (d) If one of the classes is INTEGER, the result is the 789 // INTEGER. 790 // 791 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 792 // MEMORY is used as class. 793 // 794 // (f) Otherwise class SSE is used. 795 796 // Accum should never be memory (we should have returned) or 797 // ComplexX87 (because this cannot be passed in a structure). 798 assert((Accum != Memory && Accum != ComplexX87) && 799 "Invalid accumulated classification during merge."); 800 if (Accum == Field || Field == NoClass) 801 return Accum; 802 else if (Field == Memory) 803 return Memory; 804 else if (Accum == NoClass) 805 return Field; 806 else if (Accum == Integer || Field == Integer) 807 return Integer; 808 else if (Field == X87 || Field == X87Up || Field == ComplexX87 || 809 Accum == X87 || Accum == X87Up) 810 return Memory; 811 else 812 return SSE; 813} 814 815void X86_64ABIInfo::classify(QualType Ty, 816 ASTContext &Context, 817 uint64_t OffsetBase, 818 Class &Lo, Class &Hi) const { 819 // FIXME: This code can be simplified by introducing a simple value class for 820 // Class pairs with appropriate constructor methods for the various 821 // situations. 822 823 // FIXME: Some of the split computations are wrong; unaligned vectors 824 // shouldn't be passed in registers for example, so there is no chance they 825 // can straddle an eightbyte. Verify & simplify. 826 827 Lo = Hi = NoClass; 828 829 Class &Current = OffsetBase < 64 ? Lo : Hi; 830 Current = Memory; 831 832 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 833 BuiltinType::Kind k = BT->getKind(); 834 835 if (k == BuiltinType::Void) { 836 Current = NoClass; 837 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 838 Lo = Integer; 839 Hi = Integer; 840 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 841 Current = Integer; 842 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 843 Current = SSE; 844 } else if (k == BuiltinType::LongDouble) { 845 Lo = X87; 846 Hi = X87Up; 847 } 848 // FIXME: _Decimal32 and _Decimal64 are SSE. 849 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 850 } else if (const EnumType *ET = Ty->getAs<EnumType>()) { 851 // Classify the underlying integer type. 852 classify(ET->getDecl()->getIntegerType(), Context, OffsetBase, Lo, Hi); 853 } else if (Ty->hasPointerRepresentation()) { 854 Current = Integer; 855 } else if (Ty->isMemberPointerType()) { 856 if (Ty->isMemberFunctionPointerType()) 857 Lo = Hi = Integer; 858 else 859 Current = Integer; 860 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 861 uint64_t Size = Context.getTypeSize(VT); 862 if (Size == 32) { 863 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 864 // float> as integer. 865 Current = Integer; 866 867 // If this type crosses an eightbyte boundary, it should be 868 // split. 869 uint64_t EB_Real = (OffsetBase) / 64; 870 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 871 if (EB_Real != EB_Imag) 872 Hi = Lo; 873 } else if (Size == 64) { 874 // gcc passes <1 x double> in memory. :( 875 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 876 return; 877 878 // gcc passes <1 x long long> as INTEGER. 879 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong)) 880 Current = Integer; 881 else 882 Current = SSE; 883 884 // If this type crosses an eightbyte boundary, it should be 885 // split. 886 if (OffsetBase && OffsetBase != 64) 887 Hi = Lo; 888 } else if (Size == 128) { 889 Lo = SSE; 890 Hi = SSEUp; 891 } 892 } else if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 893 QualType ET = Context.getCanonicalType(CT->getElementType()); 894 895 uint64_t Size = Context.getTypeSize(Ty); 896 if (ET->isIntegralOrEnumerationType()) { 897 if (Size <= 64) 898 Current = Integer; 899 else if (Size <= 128) 900 Lo = Hi = Integer; 901 } else if (ET == Context.FloatTy) 902 Current = SSE; 903 else if (ET == Context.DoubleTy) 904 Lo = Hi = SSE; 905 else if (ET == Context.LongDoubleTy) 906 Current = ComplexX87; 907 908 // If this complex type crosses an eightbyte boundary then it 909 // should be split. 910 uint64_t EB_Real = (OffsetBase) / 64; 911 uint64_t EB_Imag = (OffsetBase + Context.getTypeSize(ET)) / 64; 912 if (Hi == NoClass && EB_Real != EB_Imag) 913 Hi = Lo; 914 } else if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 915 // Arrays are treated like structures. 916 917 uint64_t Size = Context.getTypeSize(Ty); 918 919 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 920 // than two eightbytes, ..., it has class MEMORY. 921 if (Size > 128) 922 return; 923 924 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 925 // fields, it has class MEMORY. 926 // 927 // Only need to check alignment of array base. 928 if (OffsetBase % Context.getTypeAlign(AT->getElementType())) 929 return; 930 931 // Otherwise implement simplified merge. We could be smarter about 932 // this, but it isn't worth it and would be harder to verify. 933 Current = NoClass; 934 uint64_t EltSize = Context.getTypeSize(AT->getElementType()); 935 uint64_t ArraySize = AT->getSize().getZExtValue(); 936 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 937 Class FieldLo, FieldHi; 938 classify(AT->getElementType(), Context, Offset, FieldLo, FieldHi); 939 Lo = merge(Lo, FieldLo); 940 Hi = merge(Hi, FieldHi); 941 if (Lo == Memory || Hi == Memory) 942 break; 943 } 944 945 // Do post merger cleanup (see below). Only case we worry about is Memory. 946 if (Hi == Memory) 947 Lo = Memory; 948 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 949 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 950 uint64_t Size = Context.getTypeSize(Ty); 951 952 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 953 // than two eightbytes, ..., it has class MEMORY. 954 if (Size > 128) 955 return; 956 957 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 958 // copy constructor or a non-trivial destructor, it is passed by invisible 959 // reference. 960 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 961 return; 962 963 const RecordDecl *RD = RT->getDecl(); 964 965 // Assume variable sized types are passed in memory. 966 if (RD->hasFlexibleArrayMember()) 967 return; 968 969 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 970 971 // Reset Lo class, this will be recomputed. 972 Current = NoClass; 973 974 // If this is a C++ record, classify the bases first. 975 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 976 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 977 e = CXXRD->bases_end(); i != e; ++i) { 978 assert(!i->isVirtual() && !i->getType()->isDependentType() && 979 "Unexpected base class!"); 980 const CXXRecordDecl *Base = 981 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 982 983 // Classify this field. 984 // 985 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 986 // single eightbyte, each is classified separately. Each eightbyte gets 987 // initialized to class NO_CLASS. 988 Class FieldLo, FieldHi; 989 uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base); 990 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 991 Lo = merge(Lo, FieldLo); 992 Hi = merge(Hi, FieldHi); 993 if (Lo == Memory || Hi == Memory) 994 break; 995 } 996 997 // If this record has no fields but isn't empty, classify as INTEGER. 998 if (RD->field_empty() && Size) 999 Current = Integer; 1000 } 1001 1002 // Classify the fields one at a time, merging the results. 1003 unsigned idx = 0; 1004 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1005 i != e; ++i, ++idx) { 1006 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1007 bool BitField = i->isBitField(); 1008 1009 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1010 // fields, it has class MEMORY. 1011 // 1012 // Note, skip this test for bit-fields, see below. 1013 if (!BitField && Offset % Context.getTypeAlign(i->getType())) { 1014 Lo = Memory; 1015 return; 1016 } 1017 1018 // Classify this field. 1019 // 1020 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1021 // exceeds a single eightbyte, each is classified 1022 // separately. Each eightbyte gets initialized to class 1023 // NO_CLASS. 1024 Class FieldLo, FieldHi; 1025 1026 // Bit-fields require special handling, they do not force the 1027 // structure to be passed in memory even if unaligned, and 1028 // therefore they can straddle an eightbyte. 1029 if (BitField) { 1030 // Ignore padding bit-fields. 1031 if (i->isUnnamedBitfield()) 1032 continue; 1033 1034 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1035 uint64_t Size = i->getBitWidth()->EvaluateAsInt(Context).getZExtValue(); 1036 1037 uint64_t EB_Lo = Offset / 64; 1038 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1039 FieldLo = FieldHi = NoClass; 1040 if (EB_Lo) { 1041 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1042 FieldLo = NoClass; 1043 FieldHi = Integer; 1044 } else { 1045 FieldLo = Integer; 1046 FieldHi = EB_Hi ? Integer : NoClass; 1047 } 1048 } else 1049 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 1050 Lo = merge(Lo, FieldLo); 1051 Hi = merge(Hi, FieldHi); 1052 if (Lo == Memory || Hi == Memory) 1053 break; 1054 } 1055 1056 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1057 // 1058 // (a) If one of the classes is MEMORY, the whole argument is 1059 // passed in memory. 1060 // 1061 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 1062 1063 // The first of these conditions is guaranteed by how we implement 1064 // the merge (just bail). 1065 // 1066 // The second condition occurs in the case of unions; for example 1067 // union { _Complex double; unsigned; }. 1068 if (Hi == Memory) 1069 Lo = Memory; 1070 if (Hi == SSEUp && Lo != SSE) 1071 Hi = SSE; 1072 } 1073} 1074 1075ABIArgInfo X86_64ABIInfo::getCoerceResult(QualType Ty, 1076 const llvm::Type *CoerceTo, 1077 ASTContext &Context) const { 1078 if (CoerceTo->isIntegerTy(64)) { 1079 // Integer and pointer types will end up in a general purpose 1080 // register. 1081 1082 // Treat an enum type as its underlying type. 1083 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1084 Ty = EnumTy->getDecl()->getIntegerType(); 1085 1086 if (Ty->isIntegralOrEnumerationType() || Ty->hasPointerRepresentation()) 1087 return (Ty->isPromotableIntegerType() ? 1088 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1089 } else if (CoerceTo->isDoubleTy()) { 1090 assert(Ty.isCanonical() && "should always have a canonical type here"); 1091 assert(!Ty.hasQualifiers() && "should never have a qualified type here"); 1092 1093 // Float and double end up in a single SSE reg. 1094 if (Ty == Context.FloatTy || Ty == Context.DoubleTy) 1095 return ABIArgInfo::getDirect(); 1096 1097 } 1098 1099 return ABIArgInfo::getCoerce(CoerceTo); 1100} 1101 1102ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty, 1103 ASTContext &Context) const { 1104 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1105 // place naturally. 1106 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1107 // Treat an enum type as its underlying type. 1108 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1109 Ty = EnumTy->getDecl()->getIntegerType(); 1110 1111 return (Ty->isPromotableIntegerType() ? 1112 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1113 } 1114 1115 return ABIArgInfo::getIndirect(0); 1116} 1117 1118ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 1119 ASTContext &Context) const { 1120 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1121 // place naturally. 1122 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1123 // Treat an enum type as its underlying type. 1124 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1125 Ty = EnumTy->getDecl()->getIntegerType(); 1126 1127 return (Ty->isPromotableIntegerType() ? 1128 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1129 } 1130 1131 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1132 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1133 1134 // Compute the byval alignment. We trust the back-end to honor the 1135 // minimum ABI alignment for byval, to make cleaner IR. 1136 const unsigned MinABIAlign = 8; 1137 unsigned Align = Context.getTypeAlign(Ty) / 8; 1138 if (Align > MinABIAlign) 1139 return ABIArgInfo::getIndirect(Align); 1140 return ABIArgInfo::getIndirect(0); 1141} 1142 1143ABIArgInfo X86_64ABIInfo::classifyReturnType(QualType RetTy, 1144 ASTContext &Context, 1145 llvm::LLVMContext &VMContext) const { 1146 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1147 // classification algorithm. 1148 X86_64ABIInfo::Class Lo, Hi; 1149 classify(RetTy, Context, 0, Lo, Hi); 1150 1151 // Check some invariants. 1152 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1153 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1154 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1155 1156 const llvm::Type *ResType = 0; 1157 switch (Lo) { 1158 case NoClass: 1159 return ABIArgInfo::getIgnore(); 1160 1161 case SSEUp: 1162 case X87Up: 1163 assert(0 && "Invalid classification for lo word."); 1164 1165 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1166 // hidden argument. 1167 case Memory: 1168 return getIndirectReturnResult(RetTy, Context); 1169 1170 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1171 // available register of the sequence %rax, %rdx is used. 1172 case Integer: 1173 ResType = llvm::Type::getInt64Ty(VMContext); break; 1174 1175 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1176 // available SSE register of the sequence %xmm0, %xmm1 is used. 1177 case SSE: 1178 ResType = llvm::Type::getDoubleTy(VMContext); break; 1179 1180 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1181 // returned on the X87 stack in %st0 as 80-bit x87 number. 1182 case X87: 1183 ResType = llvm::Type::getX86_FP80Ty(VMContext); break; 1184 1185 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1186 // part of the value is returned in %st0 and the imaginary part in 1187 // %st1. 1188 case ComplexX87: 1189 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1190 ResType = llvm::StructType::get(VMContext, 1191 llvm::Type::getX86_FP80Ty(VMContext), 1192 llvm::Type::getX86_FP80Ty(VMContext), 1193 NULL); 1194 break; 1195 } 1196 1197 switch (Hi) { 1198 // Memory was handled previously and X87 should 1199 // never occur as a hi class. 1200 case Memory: 1201 case X87: 1202 assert(0 && "Invalid classification for hi word."); 1203 1204 case ComplexX87: // Previously handled. 1205 case NoClass: break; 1206 1207 case Integer: 1208 ResType = llvm::StructType::get(VMContext, ResType, 1209 llvm::Type::getInt64Ty(VMContext), NULL); 1210 break; 1211 case SSE: 1212 ResType = llvm::StructType::get(VMContext, ResType, 1213 llvm::Type::getDoubleTy(VMContext), NULL); 1214 break; 1215 1216 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1217 // is passed in the upper half of the last used SSE register. 1218 // 1219 // SSEUP should always be preceeded by SSE, just widen. 1220 case SSEUp: 1221 assert(Lo == SSE && "Unexpected SSEUp classification."); 1222 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1223 break; 1224 1225 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1226 // returned together with the previous X87 value in %st0. 1227 case X87Up: 1228 // If X87Up is preceeded by X87, we don't need to do 1229 // anything. However, in some cases with unions it may not be 1230 // preceeded by X87. In such situations we follow gcc and pass the 1231 // extra bits in an SSE reg. 1232 if (Lo != X87) 1233 ResType = llvm::StructType::get(VMContext, ResType, 1234 llvm::Type::getDoubleTy(VMContext), NULL); 1235 break; 1236 } 1237 1238 return getCoerceResult(RetTy, ResType, Context); 1239} 1240 1241ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, ASTContext &Context, 1242 llvm::LLVMContext &VMContext, 1243 unsigned &neededInt, 1244 unsigned &neededSSE) const { 1245 X86_64ABIInfo::Class Lo, Hi; 1246 classify(Ty, Context, 0, Lo, Hi); 1247 1248 // Check some invariants. 1249 // FIXME: Enforce these by construction. 1250 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1251 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1252 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1253 1254 neededInt = 0; 1255 neededSSE = 0; 1256 const llvm::Type *ResType = 0; 1257 switch (Lo) { 1258 case NoClass: 1259 return ABIArgInfo::getIgnore(); 1260 1261 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1262 // on the stack. 1263 case Memory: 1264 1265 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1266 // COMPLEX_X87, it is passed in memory. 1267 case X87: 1268 case ComplexX87: 1269 return getIndirectResult(Ty, Context); 1270 1271 case SSEUp: 1272 case X87Up: 1273 assert(0 && "Invalid classification for lo word."); 1274 1275 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1276 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1277 // and %r9 is used. 1278 case Integer: 1279 ++neededInt; 1280 ResType = llvm::Type::getInt64Ty(VMContext); 1281 break; 1282 1283 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1284 // available SSE register is used, the registers are taken in the 1285 // order from %xmm0 to %xmm7. 1286 case SSE: 1287 ++neededSSE; 1288 ResType = llvm::Type::getDoubleTy(VMContext); 1289 break; 1290 } 1291 1292 switch (Hi) { 1293 // Memory was handled previously, ComplexX87 and X87 should 1294 // never occur as hi classes, and X87Up must be preceed by X87, 1295 // which is passed in memory. 1296 case Memory: 1297 case X87: 1298 case ComplexX87: 1299 assert(0 && "Invalid classification for hi word."); 1300 break; 1301 1302 case NoClass: break; 1303 case Integer: 1304 ResType = llvm::StructType::get(VMContext, ResType, 1305 llvm::Type::getInt64Ty(VMContext), NULL); 1306 ++neededInt; 1307 break; 1308 1309 // X87Up generally doesn't occur here (long double is passed in 1310 // memory), except in situations involving unions. 1311 case X87Up: 1312 case SSE: 1313 ResType = llvm::StructType::get(VMContext, ResType, 1314 llvm::Type::getDoubleTy(VMContext), NULL); 1315 ++neededSSE; 1316 break; 1317 1318 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1319 // eightbyte is passed in the upper half of the last used SSE 1320 // register. 1321 case SSEUp: 1322 assert(Lo == SSE && "Unexpected SSEUp classification."); 1323 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1324 break; 1325 } 1326 1327 return getCoerceResult(Ty, ResType, Context); 1328} 1329 1330void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1331 llvm::LLVMContext &VMContext) const { 1332 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 1333 Context, VMContext); 1334 1335 // Keep track of the number of assigned registers. 1336 unsigned freeIntRegs = 6, freeSSERegs = 8; 1337 1338 // If the return value is indirect, then the hidden argument is consuming one 1339 // integer register. 1340 if (FI.getReturnInfo().isIndirect()) 1341 --freeIntRegs; 1342 1343 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1344 // get assigned (in left-to-right order) for passing as follows... 1345 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1346 it != ie; ++it) { 1347 unsigned neededInt, neededSSE; 1348 it->info = classifyArgumentType(it->type, Context, VMContext, 1349 neededInt, neededSSE); 1350 1351 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1352 // eightbyte of an argument, the whole argument is passed on the 1353 // stack. If registers have already been assigned for some 1354 // eightbytes of such an argument, the assignments get reverted. 1355 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1356 freeIntRegs -= neededInt; 1357 freeSSERegs -= neededSSE; 1358 } else { 1359 it->info = getIndirectResult(it->type, Context); 1360 } 1361 } 1362} 1363 1364static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1365 QualType Ty, 1366 CodeGenFunction &CGF) { 1367 llvm::Value *overflow_arg_area_p = 1368 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1369 llvm::Value *overflow_arg_area = 1370 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1371 1372 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1373 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1374 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1375 if (Align > 8) { 1376 // Note that we follow the ABI & gcc here, even though the type 1377 // could in theory have an alignment greater than 16. This case 1378 // shouldn't ever matter in practice. 1379 1380 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1381 llvm::Value *Offset = 1382 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1383 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1384 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1385 CGF.Int64Ty); 1386 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1387 overflow_arg_area = 1388 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1389 overflow_arg_area->getType(), 1390 "overflow_arg_area.align"); 1391 } 1392 1393 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1394 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1395 llvm::Value *Res = 1396 CGF.Builder.CreateBitCast(overflow_arg_area, 1397 llvm::PointerType::getUnqual(LTy)); 1398 1399 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1400 // l->overflow_arg_area + sizeof(type). 1401 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1402 // an 8 byte boundary. 1403 1404 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1405 llvm::Value *Offset = 1406 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 1407 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1408 "overflow_arg_area.next"); 1409 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1410 1411 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1412 return Res; 1413} 1414 1415llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1416 CodeGenFunction &CGF) const { 1417 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1418 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 1419 1420 // Assume that va_list type is correct; should be pointer to LLVM type: 1421 // struct { 1422 // i32 gp_offset; 1423 // i32 fp_offset; 1424 // i8* overflow_arg_area; 1425 // i8* reg_save_area; 1426 // }; 1427 unsigned neededInt, neededSSE; 1428 1429 Ty = CGF.getContext().getCanonicalType(Ty); 1430 ABIArgInfo AI = classifyArgumentType(Ty, CGF.getContext(), VMContext, 1431 neededInt, neededSSE); 1432 1433 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1434 // in the registers. If not go to step 7. 1435 if (!neededInt && !neededSSE) 1436 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1437 1438 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1439 // general purpose registers needed to pass type and num_fp to hold 1440 // the number of floating point registers needed. 1441 1442 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1443 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1444 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1445 // 1446 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1447 // register save space). 1448 1449 llvm::Value *InRegs = 0; 1450 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1451 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1452 if (neededInt) { 1453 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1454 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1455 InRegs = 1456 CGF.Builder.CreateICmpULE(gp_offset, 1457 llvm::ConstantInt::get(CGF.Int32Ty, 1458 48 - neededInt * 8), 1459 "fits_in_gp"); 1460 } 1461 1462 if (neededSSE) { 1463 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1464 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1465 llvm::Value *FitsInFP = 1466 CGF.Builder.CreateICmpULE(fp_offset, 1467 llvm::ConstantInt::get(CGF.Int32Ty, 1468 176 - neededSSE * 16), 1469 "fits_in_fp"); 1470 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1471 } 1472 1473 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1474 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1475 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1476 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1477 1478 // Emit code to load the value if it was passed in registers. 1479 1480 CGF.EmitBlock(InRegBlock); 1481 1482 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1483 // an offset of l->gp_offset and/or l->fp_offset. This may require 1484 // copying to a temporary location in case the parameter is passed 1485 // in different register classes or requires an alignment greater 1486 // than 8 for general purpose registers and 16 for XMM registers. 1487 // 1488 // FIXME: This really results in shameful code when we end up needing to 1489 // collect arguments from different places; often what should result in a 1490 // simple assembling of a structure from scattered addresses has many more 1491 // loads than necessary. Can we clean this up? 1492 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1493 llvm::Value *RegAddr = 1494 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1495 "reg_save_area"); 1496 if (neededInt && neededSSE) { 1497 // FIXME: Cleanup. 1498 assert(AI.isCoerce() && "Unexpected ABI info for mixed regs"); 1499 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1500 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1501 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1502 const llvm::Type *TyLo = ST->getElementType(0); 1503 const llvm::Type *TyHi = ST->getElementType(1); 1504 assert((TyLo->isFloatingPointTy() ^ TyHi->isFloatingPointTy()) && 1505 "Unexpected ABI info for mixed regs"); 1506 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1507 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1508 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1509 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1510 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 1511 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 1512 llvm::Value *V = 1513 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 1514 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1515 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 1516 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1517 1518 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1519 llvm::PointerType::getUnqual(LTy)); 1520 } else if (neededInt) { 1521 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1522 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1523 llvm::PointerType::getUnqual(LTy)); 1524 } else { 1525 if (neededSSE == 1) { 1526 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1527 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1528 llvm::PointerType::getUnqual(LTy)); 1529 } else { 1530 assert(neededSSE == 2 && "Invalid number of needed registers!"); 1531 // SSE registers are spaced 16 bytes apart in the register save 1532 // area, we need to collect the two eightbytes together. 1533 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1534 llvm::Value *RegAddrHi = 1535 CGF.Builder.CreateGEP(RegAddrLo, 1536 llvm::ConstantInt::get(CGF.Int32Ty, 16)); 1537 const llvm::Type *DblPtrTy = 1538 llvm::PointerType::getUnqual(DoubleTy); 1539 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 1540 DoubleTy, NULL); 1541 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 1542 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 1543 DblPtrTy)); 1544 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1545 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 1546 DblPtrTy)); 1547 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1548 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1549 llvm::PointerType::getUnqual(LTy)); 1550 } 1551 } 1552 1553 // AMD64-ABI 3.5.7p5: Step 5. Set: 1554 // l->gp_offset = l->gp_offset + num_gp * 8 1555 // l->fp_offset = l->fp_offset + num_fp * 16. 1556 if (neededInt) { 1557 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 1558 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 1559 gp_offset_p); 1560 } 1561 if (neededSSE) { 1562 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 1563 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 1564 fp_offset_p); 1565 } 1566 CGF.EmitBranch(ContBlock); 1567 1568 // Emit code to load the value if it was passed in memory. 1569 1570 CGF.EmitBlock(InMemBlock); 1571 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1572 1573 // Return the appropriate result. 1574 1575 CGF.EmitBlock(ContBlock); 1576 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 1577 "vaarg.addr"); 1578 ResAddr->reserveOperandSpace(2); 1579 ResAddr->addIncoming(RegAddr, InRegBlock); 1580 ResAddr->addIncoming(MemAddr, InMemBlock); 1581 1582 return ResAddr; 1583} 1584 1585// PIC16 ABI Implementation 1586 1587namespace { 1588 1589class PIC16ABIInfo : public ABIInfo { 1590 ABIArgInfo classifyReturnType(QualType RetTy, 1591 ASTContext &Context, 1592 llvm::LLVMContext &VMContext) const; 1593 1594 ABIArgInfo classifyArgumentType(QualType RetTy, 1595 ASTContext &Context, 1596 llvm::LLVMContext &VMContext) const; 1597 1598 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1599 llvm::LLVMContext &VMContext) const { 1600 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1601 VMContext); 1602 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1603 it != ie; ++it) 1604 it->info = classifyArgumentType(it->type, Context, VMContext); 1605 } 1606 1607 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1608 CodeGenFunction &CGF) const; 1609}; 1610 1611class PIC16TargetCodeGenInfo : public TargetCodeGenInfo { 1612public: 1613 PIC16TargetCodeGenInfo():TargetCodeGenInfo(new PIC16ABIInfo()) {} 1614}; 1615 1616} 1617 1618ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy, 1619 ASTContext &Context, 1620 llvm::LLVMContext &VMContext) const { 1621 if (RetTy->isVoidType()) { 1622 return ABIArgInfo::getIgnore(); 1623 } else { 1624 return ABIArgInfo::getDirect(); 1625 } 1626} 1627 1628ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty, 1629 ASTContext &Context, 1630 llvm::LLVMContext &VMContext) const { 1631 return ABIArgInfo::getDirect(); 1632} 1633 1634llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1635 CodeGenFunction &CGF) const { 1636 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1637 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1638 1639 CGBuilderTy &Builder = CGF.Builder; 1640 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1641 "ap"); 1642 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1643 llvm::Type *PTy = 1644 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1645 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1646 1647 uint64_t Offset = CGF.getContext().getTypeSize(Ty) / 8; 1648 1649 llvm::Value *NextAddr = 1650 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1651 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1652 "ap.next"); 1653 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1654 1655 return AddrTyped; 1656} 1657 1658 1659// PowerPC-32 1660 1661namespace { 1662class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 1663public: 1664 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 1665 // This is recovered from gcc output. 1666 return 1; // r1 is the dedicated stack pointer 1667 } 1668 1669 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1670 llvm::Value *Address) const; 1671}; 1672 1673} 1674 1675bool 1676PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1677 llvm::Value *Address) const { 1678 // This is calculated from the LLVM and GCC tables and verified 1679 // against gcc output. AFAIK all ABIs use the same encoding. 1680 1681 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1682 llvm::LLVMContext &Context = CGF.getLLVMContext(); 1683 1684 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 1685 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 1686 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 1687 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 1688 1689 // 0-31: r0-31, the 4-byte general-purpose registers 1690 AssignToArrayRange(Builder, Address, Four8, 0, 31); 1691 1692 // 32-63: fp0-31, the 8-byte floating-point registers 1693 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 1694 1695 // 64-76 are various 4-byte special-purpose registers: 1696 // 64: mq 1697 // 65: lr 1698 // 66: ctr 1699 // 67: ap 1700 // 68-75 cr0-7 1701 // 76: xer 1702 AssignToArrayRange(Builder, Address, Four8, 64, 76); 1703 1704 // 77-108: v0-31, the 16-byte vector registers 1705 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 1706 1707 // 109: vrsave 1708 // 110: vscr 1709 // 111: spe_acc 1710 // 112: spefscr 1711 // 113: sfp 1712 AssignToArrayRange(Builder, Address, Four8, 109, 113); 1713 1714 return false; 1715} 1716 1717 1718// ARM ABI Implementation 1719 1720namespace { 1721 1722class ARMABIInfo : public ABIInfo { 1723public: 1724 enum ABIKind { 1725 APCS = 0, 1726 AAPCS = 1, 1727 AAPCS_VFP 1728 }; 1729 1730private: 1731 ABIKind Kind; 1732 1733public: 1734 ARMABIInfo(ABIKind _Kind) : Kind(_Kind) {} 1735 1736private: 1737 ABIKind getABIKind() const { return Kind; } 1738 1739 ABIArgInfo classifyReturnType(QualType RetTy, 1740 ASTContext &Context, 1741 llvm::LLVMContext &VMCOntext) const; 1742 1743 ABIArgInfo classifyArgumentType(QualType RetTy, 1744 ASTContext &Context, 1745 llvm::LLVMContext &VMContext) const; 1746 1747 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1748 llvm::LLVMContext &VMContext) const; 1749 1750 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1751 CodeGenFunction &CGF) const; 1752}; 1753 1754class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 1755public: 1756 ARMTargetCodeGenInfo(ARMABIInfo::ABIKind K) 1757 :TargetCodeGenInfo(new ARMABIInfo(K)) {} 1758 1759 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 1760 return 13; 1761 } 1762}; 1763 1764} 1765 1766void ARMABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1767 llvm::LLVMContext &VMContext) const { 1768 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1769 VMContext); 1770 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1771 it != ie; ++it) { 1772 it->info = classifyArgumentType(it->type, Context, VMContext); 1773 } 1774 1775 const llvm::Triple &Triple(Context.Target.getTriple()); 1776 llvm::CallingConv::ID DefaultCC; 1777 if (Triple.getEnvironmentName() == "gnueabi" || 1778 Triple.getEnvironmentName() == "eabi") 1779 DefaultCC = llvm::CallingConv::ARM_AAPCS; 1780 else 1781 DefaultCC = llvm::CallingConv::ARM_APCS; 1782 1783 switch (getABIKind()) { 1784 case APCS: 1785 if (DefaultCC != llvm::CallingConv::ARM_APCS) 1786 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 1787 break; 1788 1789 case AAPCS: 1790 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 1791 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 1792 break; 1793 1794 case AAPCS_VFP: 1795 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 1796 break; 1797 } 1798} 1799 1800ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, 1801 ASTContext &Context, 1802 llvm::LLVMContext &VMContext) const { 1803 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1804 // Treat an enum type as its underlying type. 1805 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1806 Ty = EnumTy->getDecl()->getIntegerType(); 1807 1808 return (Ty->isPromotableIntegerType() ? 1809 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1810 } 1811 1812 // Ignore empty records. 1813 if (isEmptyRecord(Context, Ty, true)) 1814 return ABIArgInfo::getIgnore(); 1815 1816 // Structures with either a non-trivial destructor or a non-trivial 1817 // copy constructor are always indirect. 1818 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1819 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1820 1821 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 1822 // backend doesn't support byval. 1823 // FIXME: This doesn't handle alignment > 64 bits. 1824 const llvm::Type* ElemTy; 1825 unsigned SizeRegs; 1826 if (Context.getTypeAlign(Ty) > 32) { 1827 ElemTy = llvm::Type::getInt64Ty(VMContext); 1828 SizeRegs = (Context.getTypeSize(Ty) + 63) / 64; 1829 } else { 1830 ElemTy = llvm::Type::getInt32Ty(VMContext); 1831 SizeRegs = (Context.getTypeSize(Ty) + 31) / 32; 1832 } 1833 std::vector<const llvm::Type*> LLVMFields; 1834 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 1835 const llvm::Type* STy = llvm::StructType::get(VMContext, LLVMFields, true); 1836 return ABIArgInfo::getCoerce(STy); 1837} 1838 1839static bool isIntegerLikeType(QualType Ty, 1840 ASTContext &Context, 1841 llvm::LLVMContext &VMContext) { 1842 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 1843 // is called integer-like if its size is less than or equal to one word, and 1844 // the offset of each of its addressable sub-fields is zero. 1845 1846 uint64_t Size = Context.getTypeSize(Ty); 1847 1848 // Check that the type fits in a word. 1849 if (Size > 32) 1850 return false; 1851 1852 // FIXME: Handle vector types! 1853 if (Ty->isVectorType()) 1854 return false; 1855 1856 // Float types are never treated as "integer like". 1857 if (Ty->isRealFloatingType()) 1858 return false; 1859 1860 // If this is a builtin or pointer type then it is ok. 1861 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 1862 return true; 1863 1864 // Small complex integer types are "integer like". 1865 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 1866 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 1867 1868 // Single element and zero sized arrays should be allowed, by the definition 1869 // above, but they are not. 1870 1871 // Otherwise, it must be a record type. 1872 const RecordType *RT = Ty->getAs<RecordType>(); 1873 if (!RT) return false; 1874 1875 // Ignore records with flexible arrays. 1876 const RecordDecl *RD = RT->getDecl(); 1877 if (RD->hasFlexibleArrayMember()) 1878 return false; 1879 1880 // Check that all sub-fields are at offset 0, and are themselves "integer 1881 // like". 1882 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1883 1884 bool HadField = false; 1885 unsigned idx = 0; 1886 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1887 i != e; ++i, ++idx) { 1888 const FieldDecl *FD = *i; 1889 1890 // Bit-fields are not addressable, we only need to verify they are "integer 1891 // like". We still have to disallow a subsequent non-bitfield, for example: 1892 // struct { int : 0; int x } 1893 // is non-integer like according to gcc. 1894 if (FD->isBitField()) { 1895 if (!RD->isUnion()) 1896 HadField = true; 1897 1898 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1899 return false; 1900 1901 continue; 1902 } 1903 1904 // Check if this field is at offset 0. 1905 if (Layout.getFieldOffset(idx) != 0) 1906 return false; 1907 1908 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1909 return false; 1910 1911 // Only allow at most one field in a structure. This doesn't match the 1912 // wording above, but follows gcc in situations with a field following an 1913 // empty structure. 1914 if (!RD->isUnion()) { 1915 if (HadField) 1916 return false; 1917 1918 HadField = true; 1919 } 1920 } 1921 1922 return true; 1923} 1924 1925ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy, 1926 ASTContext &Context, 1927 llvm::LLVMContext &VMContext) const { 1928 if (RetTy->isVoidType()) 1929 return ABIArgInfo::getIgnore(); 1930 1931 if (!CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1932 // Treat an enum type as its underlying type. 1933 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1934 RetTy = EnumTy->getDecl()->getIntegerType(); 1935 1936 return (RetTy->isPromotableIntegerType() ? 1937 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1938 } 1939 1940 // Structures with either a non-trivial destructor or a non-trivial 1941 // copy constructor are always indirect. 1942 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 1943 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1944 1945 // Are we following APCS? 1946 if (getABIKind() == APCS) { 1947 if (isEmptyRecord(Context, RetTy, false)) 1948 return ABIArgInfo::getIgnore(); 1949 1950 // Complex types are all returned as packed integers. 1951 // 1952 // FIXME: Consider using 2 x vector types if the back end handles them 1953 // correctly. 1954 if (RetTy->isAnyComplexType()) 1955 return ABIArgInfo::getCoerce(llvm::IntegerType::get( 1956 VMContext, Context.getTypeSize(RetTy))); 1957 1958 // Integer like structures are returned in r0. 1959 if (isIntegerLikeType(RetTy, Context, VMContext)) { 1960 // Return in the smallest viable integer type. 1961 uint64_t Size = Context.getTypeSize(RetTy); 1962 if (Size <= 8) 1963 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1964 if (Size <= 16) 1965 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1966 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1967 } 1968 1969 // Otherwise return in memory. 1970 return ABIArgInfo::getIndirect(0); 1971 } 1972 1973 // Otherwise this is an AAPCS variant. 1974 1975 if (isEmptyRecord(Context, RetTy, true)) 1976 return ABIArgInfo::getIgnore(); 1977 1978 // Aggregates <= 4 bytes are returned in r0; other aggregates 1979 // are returned indirectly. 1980 uint64_t Size = Context.getTypeSize(RetTy); 1981 if (Size <= 32) { 1982 // Return in the smallest viable integer type. 1983 if (Size <= 8) 1984 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1985 if (Size <= 16) 1986 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1987 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1988 } 1989 1990 return ABIArgInfo::getIndirect(0); 1991} 1992 1993llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1994 CodeGenFunction &CGF) const { 1995 // FIXME: Need to handle alignment 1996 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1997 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1998 1999 CGBuilderTy &Builder = CGF.Builder; 2000 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2001 "ap"); 2002 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2003 llvm::Type *PTy = 2004 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2005 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2006 2007 uint64_t Offset = 2008 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2009 llvm::Value *NextAddr = 2010 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2011 "ap.next"); 2012 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2013 2014 return AddrTyped; 2015} 2016 2017ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy, 2018 ASTContext &Context, 2019 llvm::LLVMContext &VMContext) const { 2020 if (RetTy->isVoidType()) { 2021 return ABIArgInfo::getIgnore(); 2022 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 2023 return ABIArgInfo::getIndirect(0); 2024 } else { 2025 // Treat an enum type as its underlying type. 2026 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2027 RetTy = EnumTy->getDecl()->getIntegerType(); 2028 2029 return (RetTy->isPromotableIntegerType() ? 2030 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2031 } 2032} 2033 2034// SystemZ ABI Implementation 2035 2036namespace { 2037 2038class SystemZABIInfo : public ABIInfo { 2039 bool isPromotableIntegerType(QualType Ty) const; 2040 2041 ABIArgInfo classifyReturnType(QualType RetTy, ASTContext &Context, 2042 llvm::LLVMContext &VMContext) const; 2043 2044 ABIArgInfo classifyArgumentType(QualType RetTy, ASTContext &Context, 2045 llvm::LLVMContext &VMContext) const; 2046 2047 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 2048 llvm::LLVMContext &VMContext) const { 2049 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 2050 Context, VMContext); 2051 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2052 it != ie; ++it) 2053 it->info = classifyArgumentType(it->type, Context, VMContext); 2054 } 2055 2056 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2057 CodeGenFunction &CGF) const; 2058}; 2059 2060class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2061public: 2062 SystemZTargetCodeGenInfo():TargetCodeGenInfo(new SystemZABIInfo()) {} 2063}; 2064 2065} 2066 2067bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2068 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2069 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2070 switch (BT->getKind()) { 2071 case BuiltinType::Bool: 2072 case BuiltinType::Char_S: 2073 case BuiltinType::Char_U: 2074 case BuiltinType::SChar: 2075 case BuiltinType::UChar: 2076 case BuiltinType::Short: 2077 case BuiltinType::UShort: 2078 case BuiltinType::Int: 2079 case BuiltinType::UInt: 2080 return true; 2081 default: 2082 return false; 2083 } 2084 return false; 2085} 2086 2087llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2088 CodeGenFunction &CGF) const { 2089 // FIXME: Implement 2090 return 0; 2091} 2092 2093 2094ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy, 2095 ASTContext &Context, 2096 llvm::LLVMContext &VMContext) const { 2097 if (RetTy->isVoidType()) { 2098 return ABIArgInfo::getIgnore(); 2099 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 2100 return ABIArgInfo::getIndirect(0); 2101 } else { 2102 return (isPromotableIntegerType(RetTy) ? 2103 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2104 } 2105} 2106 2107ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty, 2108 ASTContext &Context, 2109 llvm::LLVMContext &VMContext) const { 2110 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 2111 return ABIArgInfo::getIndirect(0); 2112 } else { 2113 return (isPromotableIntegerType(Ty) ? 2114 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2115 } 2116} 2117 2118// MSP430 ABI Implementation 2119 2120namespace { 2121 2122class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2123public: 2124 MSP430TargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 2125 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2126 CodeGen::CodeGenModule &M) const; 2127}; 2128 2129} 2130 2131void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2132 llvm::GlobalValue *GV, 2133 CodeGen::CodeGenModule &M) const { 2134 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2135 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2136 // Handle 'interrupt' attribute: 2137 llvm::Function *F = cast<llvm::Function>(GV); 2138 2139 // Step 1: Set ISR calling convention. 2140 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2141 2142 // Step 2: Add attributes goodness. 2143 F->addFnAttr(llvm::Attribute::NoInline); 2144 2145 // Step 3: Emit ISR vector alias. 2146 unsigned Num = attr->getNumber() + 0xffe0; 2147 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2148 "vector_" + 2149 llvm::LowercaseString(llvm::utohexstr(Num)), 2150 GV, &M.getModule()); 2151 } 2152 } 2153} 2154 2155// MIPS ABI Implementation. This works for both little-endian and 2156// big-endian variants. 2157namespace { 2158class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 2159public: 2160 MIPSTargetCodeGenInfo(): TargetCodeGenInfo(new DefaultABIInfo()) {} 2161 2162 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 2163 return 29; 2164 } 2165 2166 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2167 llvm::Value *Address) const; 2168}; 2169} 2170 2171bool 2172MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2173 llvm::Value *Address) const { 2174 // This information comes from gcc's implementation, which seems to 2175 // as canonical as it gets. 2176 2177 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2178 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2179 2180 // Everything on MIPS is 4 bytes. Double-precision FP registers 2181 // are aliased to pairs of single-precision FP registers. 2182 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2183 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2184 2185 // 0-31 are the general purpose registers, $0 - $31. 2186 // 32-63 are the floating-point registers, $f0 - $f31. 2187 // 64 and 65 are the multiply/divide registers, $hi and $lo. 2188 // 66 is the (notional, I think) register for signal-handler return. 2189 AssignToArrayRange(Builder, Address, Four8, 0, 65); 2190 2191 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 2192 // They are one bit wide and ignored here. 2193 2194 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 2195 // (coprocessor 1 is the FP unit) 2196 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 2197 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 2198 // 176-181 are the DSP accumulator registers. 2199 AssignToArrayRange(Builder, Address, Four8, 80, 181); 2200 2201 return false; 2202} 2203 2204 2205const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() const { 2206 if (TheTargetCodeGenInfo) 2207 return *TheTargetCodeGenInfo; 2208 2209 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2210 // free it. 2211 2212 const llvm::Triple &Triple(getContext().Target.getTriple()); 2213 switch (Triple.getArch()) { 2214 default: 2215 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo); 2216 2217 case llvm::Triple::mips: 2218 case llvm::Triple::mipsel: 2219 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo()); 2220 2221 case llvm::Triple::arm: 2222 case llvm::Triple::thumb: 2223 // FIXME: We want to know the float calling convention as well. 2224 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2225 return *(TheTargetCodeGenInfo = 2226 new ARMTargetCodeGenInfo(ARMABIInfo::APCS)); 2227 2228 return *(TheTargetCodeGenInfo = 2229 new ARMTargetCodeGenInfo(ARMABIInfo::AAPCS)); 2230 2231 case llvm::Triple::pic16: 2232 return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo()); 2233 2234 case llvm::Triple::ppc: 2235 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo()); 2236 2237 case llvm::Triple::systemz: 2238 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo()); 2239 2240 case llvm::Triple::msp430: 2241 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo()); 2242 2243 case llvm::Triple::x86: 2244 switch (Triple.getOS()) { 2245 case llvm::Triple::Darwin: 2246 return *(TheTargetCodeGenInfo = 2247 new X86_32TargetCodeGenInfo(Context, true, true)); 2248 case llvm::Triple::Cygwin: 2249 case llvm::Triple::MinGW32: 2250 case llvm::Triple::MinGW64: 2251 case llvm::Triple::AuroraUX: 2252 case llvm::Triple::DragonFly: 2253 case llvm::Triple::FreeBSD: 2254 case llvm::Triple::OpenBSD: 2255 return *(TheTargetCodeGenInfo = 2256 new X86_32TargetCodeGenInfo(Context, false, true)); 2257 2258 default: 2259 return *(TheTargetCodeGenInfo = 2260 new X86_32TargetCodeGenInfo(Context, false, false)); 2261 } 2262 2263 case llvm::Triple::x86_64: 2264 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo()); 2265 } 2266} 2267