TargetInfo.cpp revision 7b733505defd34f1bb7e74d9526be0bc41e76693
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/Target/TargetData.h" 21#include "llvm/ADT/StringExtras.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39static bool isAggregateTypeForABI(QualType T) { 40 return CodeGenFunction::hasAggregateLLVMType(T) || 41 T->isMemberFunctionPointerType(); 42} 43 44ABIInfo::~ABIInfo() {} 45 46ASTContext &ABIInfo::getContext() const { 47 return CGT.getContext(); 48} 49 50llvm::LLVMContext &ABIInfo::getVMContext() const { 51 return CGT.getLLVMContext(); 52} 53 54const llvm::TargetData &ABIInfo::getTargetData() const { 55 return CGT.getTargetData(); 56} 57 58 59void ABIArgInfo::dump() const { 60 llvm::raw_ostream &OS = llvm::errs(); 61 OS << "(ABIArgInfo Kind="; 62 switch (TheKind) { 63 case Direct: 64 OS << "Direct Type="; 65 if (const llvm::Type *Ty = getCoerceToType()) 66 Ty->print(OS); 67 else 68 OS << "null"; 69 break; 70 case Extend: 71 OS << "Extend"; 72 break; 73 case Ignore: 74 OS << "Ignore"; 75 break; 76 case Indirect: 77 OS << "Indirect Align=" << getIndirectAlign() 78 << " Byal=" << getIndirectByVal(); 79 break; 80 case Expand: 81 OS << "Expand"; 82 break; 83 } 84 OS << ")\n"; 85} 86 87TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 88 89static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 90 91/// isEmptyField - Return true iff a the field is "empty", that is it 92/// is an unnamed bit-field or an (array of) empty record(s). 93static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 94 bool AllowArrays) { 95 if (FD->isUnnamedBitfield()) 96 return true; 97 98 QualType FT = FD->getType(); 99 100 // Constant arrays of empty records count as empty, strip them off. 101 if (AllowArrays) 102 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 103 FT = AT->getElementType(); 104 105 const RecordType *RT = FT->getAs<RecordType>(); 106 if (!RT) 107 return false; 108 109 // C++ record fields are never empty, at least in the Itanium ABI. 110 // 111 // FIXME: We should use a predicate for whether this behavior is true in the 112 // current ABI. 113 if (isa<CXXRecordDecl>(RT->getDecl())) 114 return false; 115 116 return isEmptyRecord(Context, FT, AllowArrays); 117} 118 119/// isEmptyRecord - Return true iff a structure contains only empty 120/// fields. Note that a structure with a flexible array member is not 121/// considered empty. 122static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 123 const RecordType *RT = T->getAs<RecordType>(); 124 if (!RT) 125 return 0; 126 const RecordDecl *RD = RT->getDecl(); 127 if (RD->hasFlexibleArrayMember()) 128 return false; 129 130 // If this is a C++ record, check the bases first. 131 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 132 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 133 e = CXXRD->bases_end(); i != e; ++i) 134 if (!isEmptyRecord(Context, i->getType(), true)) 135 return false; 136 137 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 138 i != e; ++i) 139 if (!isEmptyField(Context, *i, AllowArrays)) 140 return false; 141 return true; 142} 143 144/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 145/// a non-trivial destructor or a non-trivial copy constructor. 146static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 147 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 148 if (!RD) 149 return false; 150 151 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 152} 153 154/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 155/// a record type with either a non-trivial destructor or a non-trivial copy 156/// constructor. 157static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 158 const RecordType *RT = T->getAs<RecordType>(); 159 if (!RT) 160 return false; 161 162 return hasNonTrivialDestructorOrCopyConstructor(RT); 163} 164 165/// isSingleElementStruct - Determine if a structure is a "single 166/// element struct", i.e. it has exactly one non-empty field or 167/// exactly one field which is itself a single element 168/// struct. Structures with flexible array members are never 169/// considered single element structs. 170/// 171/// \return The field declaration for the single non-empty field, if 172/// it exists. 173static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 174 const RecordType *RT = T->getAsStructureType(); 175 if (!RT) 176 return 0; 177 178 const RecordDecl *RD = RT->getDecl(); 179 if (RD->hasFlexibleArrayMember()) 180 return 0; 181 182 const Type *Found = 0; 183 184 // If this is a C++ record, check the bases first. 185 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 186 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 187 e = CXXRD->bases_end(); i != e; ++i) { 188 // Ignore empty records. 189 if (isEmptyRecord(Context, i->getType(), true)) 190 continue; 191 192 // If we already found an element then this isn't a single-element struct. 193 if (Found) 194 return 0; 195 196 // If this is non-empty and not a single element struct, the composite 197 // cannot be a single element struct. 198 Found = isSingleElementStruct(i->getType(), Context); 199 if (!Found) 200 return 0; 201 } 202 } 203 204 // Check for single element. 205 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 206 i != e; ++i) { 207 const FieldDecl *FD = *i; 208 QualType FT = FD->getType(); 209 210 // Ignore empty fields. 211 if (isEmptyField(Context, FD, true)) 212 continue; 213 214 // If we already found an element then this isn't a single-element 215 // struct. 216 if (Found) 217 return 0; 218 219 // Treat single element arrays as the element. 220 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 221 if (AT->getSize().getZExtValue() != 1) 222 break; 223 FT = AT->getElementType(); 224 } 225 226 if (!isAggregateTypeForABI(FT)) { 227 Found = FT.getTypePtr(); 228 } else { 229 Found = isSingleElementStruct(FT, Context); 230 if (!Found) 231 return 0; 232 } 233 } 234 235 return Found; 236} 237 238static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 239 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 240 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 241 !Ty->isBlockPointerType()) 242 return false; 243 244 uint64_t Size = Context.getTypeSize(Ty); 245 return Size == 32 || Size == 64; 246} 247 248/// canExpandIndirectArgument - Test whether an argument type which is to be 249/// passed indirectly (on the stack) would have the equivalent layout if it was 250/// expanded into separate arguments. If so, we prefer to do the latter to avoid 251/// inhibiting optimizations. 252/// 253// FIXME: This predicate is missing many cases, currently it just follows 254// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 255// should probably make this smarter, or better yet make the LLVM backend 256// capable of handling it. 257static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 258 // We can only expand structure types. 259 const RecordType *RT = Ty->getAs<RecordType>(); 260 if (!RT) 261 return false; 262 263 // We can only expand (C) structures. 264 // 265 // FIXME: This needs to be generalized to handle classes as well. 266 const RecordDecl *RD = RT->getDecl(); 267 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 268 return false; 269 270 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 271 i != e; ++i) { 272 const FieldDecl *FD = *i; 273 274 if (!is32Or64BitBasicType(FD->getType(), Context)) 275 return false; 276 277 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 278 // how to expand them yet, and the predicate for telling if a bitfield still 279 // counts as "basic" is more complicated than what we were doing previously. 280 if (FD->isBitField()) 281 return false; 282 } 283 284 return true; 285} 286 287namespace { 288/// DefaultABIInfo - The default implementation for ABI specific 289/// details. This implementation provides information which results in 290/// self-consistent and sensible LLVM IR generation, but does not 291/// conform to any particular ABI. 292class DefaultABIInfo : public ABIInfo { 293public: 294 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 295 296 ABIArgInfo classifyReturnType(QualType RetTy) const; 297 ABIArgInfo classifyArgumentType(QualType RetTy) const; 298 299 virtual void computeInfo(CGFunctionInfo &FI) const { 300 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 301 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 302 it != ie; ++it) 303 it->info = classifyArgumentType(it->type); 304 } 305 306 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 307 CodeGenFunction &CGF) const; 308}; 309 310class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 311public: 312 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 313 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 314}; 315 316llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 317 CodeGenFunction &CGF) const { 318 return 0; 319} 320 321ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 322 if (isAggregateTypeForABI(Ty)) 323 return ABIArgInfo::getIndirect(0); 324 325 // Treat an enum type as its underlying type. 326 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 327 Ty = EnumTy->getDecl()->getIntegerType(); 328 329 return (Ty->isPromotableIntegerType() ? 330 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 331} 332 333//===----------------------------------------------------------------------===// 334// X86-32 ABI Implementation 335//===----------------------------------------------------------------------===// 336 337/// X86_32ABIInfo - The X86-32 ABI information. 338class X86_32ABIInfo : public ABIInfo { 339 bool IsDarwinVectorABI; 340 bool IsSmallStructInRegABI; 341 342 static bool isRegisterSize(unsigned Size) { 343 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 344 } 345 346 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 347 348 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 349 /// such that the argument will be passed in memory. 350 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 351 352public: 353 354 ABIArgInfo classifyReturnType(QualType RetTy) const; 355 ABIArgInfo classifyArgumentType(QualType RetTy) const; 356 357 virtual void computeInfo(CGFunctionInfo &FI) const { 358 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 359 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 360 it != ie; ++it) 361 it->info = classifyArgumentType(it->type); 362 } 363 364 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 365 CodeGenFunction &CGF) const; 366 367 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 368 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p) {} 369}; 370 371class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 372public: 373 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 374 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p)) {} 375 376 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 377 CodeGen::CodeGenModule &CGM) const; 378 379 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 380 // Darwin uses different dwarf register numbers for EH. 381 if (CGM.isTargetDarwin()) return 5; 382 383 return 4; 384 } 385 386 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 387 llvm::Value *Address) const; 388}; 389 390} 391 392/// shouldReturnTypeInRegister - Determine if the given type should be 393/// passed in a register (for the Darwin ABI). 394bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 395 ASTContext &Context) { 396 uint64_t Size = Context.getTypeSize(Ty); 397 398 // Type must be register sized. 399 if (!isRegisterSize(Size)) 400 return false; 401 402 if (Ty->isVectorType()) { 403 // 64- and 128- bit vectors inside structures are not returned in 404 // registers. 405 if (Size == 64 || Size == 128) 406 return false; 407 408 return true; 409 } 410 411 // If this is a builtin, pointer, enum, complex type, member pointer, or 412 // member function pointer it is ok. 413 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 414 Ty->isAnyComplexType() || Ty->isEnumeralType() || 415 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 416 return true; 417 418 // Arrays are treated like records. 419 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 420 return shouldReturnTypeInRegister(AT->getElementType(), Context); 421 422 // Otherwise, it must be a record type. 423 const RecordType *RT = Ty->getAs<RecordType>(); 424 if (!RT) return false; 425 426 // FIXME: Traverse bases here too. 427 428 // Structure types are passed in register if all fields would be 429 // passed in a register. 430 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 431 e = RT->getDecl()->field_end(); i != e; ++i) { 432 const FieldDecl *FD = *i; 433 434 // Empty fields are ignored. 435 if (isEmptyField(Context, FD, true)) 436 continue; 437 438 // Check fields recursively. 439 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 440 return false; 441 } 442 443 return true; 444} 445 446ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 447 if (RetTy->isVoidType()) 448 return ABIArgInfo::getIgnore(); 449 450 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 451 // On Darwin, some vectors are returned in registers. 452 if (IsDarwinVectorABI) { 453 uint64_t Size = getContext().getTypeSize(RetTy); 454 455 // 128-bit vectors are a special case; they are returned in 456 // registers and we need to make sure to pick a type the LLVM 457 // backend will like. 458 if (Size == 128) 459 return ABIArgInfo::getDirect(llvm::VectorType::get( 460 llvm::Type::getInt64Ty(getVMContext()), 2)); 461 462 // Always return in register if it fits in a general purpose 463 // register, or if it is 64 bits and has a single element. 464 if ((Size == 8 || Size == 16 || Size == 32) || 465 (Size == 64 && VT->getNumElements() == 1)) 466 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 467 Size)); 468 469 return ABIArgInfo::getIndirect(0); 470 } 471 472 return ABIArgInfo::getDirect(); 473 } 474 475 if (isAggregateTypeForABI(RetTy)) { 476 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 477 // Structures with either a non-trivial destructor or a non-trivial 478 // copy constructor are always indirect. 479 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 480 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 481 482 // Structures with flexible arrays are always indirect. 483 if (RT->getDecl()->hasFlexibleArrayMember()) 484 return ABIArgInfo::getIndirect(0); 485 } 486 487 // If specified, structs and unions are always indirect. 488 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 489 return ABIArgInfo::getIndirect(0); 490 491 // Classify "single element" structs as their element type. 492 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) { 493 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 494 if (BT->isIntegerType()) { 495 // We need to use the size of the structure, padding 496 // bit-fields can adjust that to be larger than the single 497 // element type. 498 uint64_t Size = getContext().getTypeSize(RetTy); 499 return ABIArgInfo::getDirect( 500 llvm::IntegerType::get(getVMContext(), (unsigned)Size)); 501 } 502 503 if (BT->getKind() == BuiltinType::Float) { 504 assert(getContext().getTypeSize(RetTy) == 505 getContext().getTypeSize(SeltTy) && 506 "Unexpect single element structure size!"); 507 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext())); 508 } 509 510 if (BT->getKind() == BuiltinType::Double) { 511 assert(getContext().getTypeSize(RetTy) == 512 getContext().getTypeSize(SeltTy) && 513 "Unexpect single element structure size!"); 514 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext())); 515 } 516 } else if (SeltTy->isPointerType()) { 517 // FIXME: It would be really nice if this could come out as the proper 518 // pointer type. 519 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext()); 520 return ABIArgInfo::getDirect(PtrTy); 521 } else if (SeltTy->isVectorType()) { 522 // 64- and 128-bit vectors are never returned in a 523 // register when inside a structure. 524 uint64_t Size = getContext().getTypeSize(RetTy); 525 if (Size == 64 || Size == 128) 526 return ABIArgInfo::getIndirect(0); 527 528 return classifyReturnType(QualType(SeltTy, 0)); 529 } 530 } 531 532 // Small structures which are register sized are generally returned 533 // in a register. 534 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 535 uint64_t Size = getContext().getTypeSize(RetTy); 536 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 537 } 538 539 return ABIArgInfo::getIndirect(0); 540 } 541 542 // Treat an enum type as its underlying type. 543 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 544 RetTy = EnumTy->getDecl()->getIntegerType(); 545 546 return (RetTy->isPromotableIntegerType() ? 547 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 548} 549 550ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 551 if (!ByVal) 552 return ABIArgInfo::getIndirect(0, false); 553 554 // Compute the byval alignment. We trust the back-end to honor the 555 // minimum ABI alignment for byval, to make cleaner IR. 556 const unsigned MinABIAlign = 4; 557 unsigned Align = getContext().getTypeAlign(Ty) / 8; 558 if (Align > MinABIAlign) 559 return ABIArgInfo::getIndirect(Align); 560 return ABIArgInfo::getIndirect(0); 561} 562 563ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 564 // FIXME: Set alignment on indirect arguments. 565 if (isAggregateTypeForABI(Ty)) { 566 // Structures with flexible arrays are always indirect. 567 if (const RecordType *RT = Ty->getAs<RecordType>()) { 568 // Structures with either a non-trivial destructor or a non-trivial 569 // copy constructor are always indirect. 570 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 571 return getIndirectResult(Ty, /*ByVal=*/false); 572 573 if (RT->getDecl()->hasFlexibleArrayMember()) 574 return getIndirectResult(Ty); 575 } 576 577 // Ignore empty structs. 578 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0) 579 return ABIArgInfo::getIgnore(); 580 581 // Expand small (<= 128-bit) record types when we know that the stack layout 582 // of those arguments will match the struct. This is important because the 583 // LLVM backend isn't smart enough to remove byval, which inhibits many 584 // optimizations. 585 if (getContext().getTypeSize(Ty) <= 4*32 && 586 canExpandIndirectArgument(Ty, getContext())) 587 return ABIArgInfo::getExpand(); 588 589 return getIndirectResult(Ty); 590 } 591 592 if (const VectorType *VT = Ty->getAs<VectorType>()) { 593 // On Darwin, some vectors are passed in memory, we handle this by passing 594 // it as an i8/i16/i32/i64. 595 if (IsDarwinVectorABI) { 596 uint64_t Size = getContext().getTypeSize(Ty); 597 if ((Size == 8 || Size == 16 || Size == 32) || 598 (Size == 64 && VT->getNumElements() == 1)) 599 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 600 Size)); 601 return ABIArgInfo::getIndirect(0); 602 } 603 604 return ABIArgInfo::getDirect(); 605 } 606 607 608 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 609 Ty = EnumTy->getDecl()->getIntegerType(); 610 611 return (Ty->isPromotableIntegerType() ? 612 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 613} 614 615llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 616 CodeGenFunction &CGF) const { 617 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 618 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 619 620 CGBuilderTy &Builder = CGF.Builder; 621 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 622 "ap"); 623 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 624 llvm::Type *PTy = 625 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 626 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 627 628 uint64_t Offset = 629 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 630 llvm::Value *NextAddr = 631 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 632 "ap.next"); 633 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 634 635 return AddrTyped; 636} 637 638void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 639 llvm::GlobalValue *GV, 640 CodeGen::CodeGenModule &CGM) const { 641 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 642 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 643 // Get the LLVM function. 644 llvm::Function *Fn = cast<llvm::Function>(GV); 645 646 // Now add the 'alignstack' attribute with a value of 16. 647 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 648 } 649 } 650} 651 652bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 653 CodeGen::CodeGenFunction &CGF, 654 llvm::Value *Address) const { 655 CodeGen::CGBuilderTy &Builder = CGF.Builder; 656 llvm::LLVMContext &Context = CGF.getLLVMContext(); 657 658 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 659 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 660 661 // 0-7 are the eight integer registers; the order is different 662 // on Darwin (for EH), but the range is the same. 663 // 8 is %eip. 664 AssignToArrayRange(Builder, Address, Four8, 0, 8); 665 666 if (CGF.CGM.isTargetDarwin()) { 667 // 12-16 are st(0..4). Not sure why we stop at 4. 668 // These have size 16, which is sizeof(long double) on 669 // platforms with 8-byte alignment for that type. 670 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 671 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 672 673 } else { 674 // 9 is %eflags, which doesn't get a size on Darwin for some 675 // reason. 676 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 677 678 // 11-16 are st(0..5). Not sure why we stop at 5. 679 // These have size 12, which is sizeof(long double) on 680 // platforms with 4-byte alignment for that type. 681 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 682 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 683 } 684 685 return false; 686} 687 688//===----------------------------------------------------------------------===// 689// X86-64 ABI Implementation 690//===----------------------------------------------------------------------===// 691 692 693namespace { 694/// X86_64ABIInfo - The X86_64 ABI information. 695class X86_64ABIInfo : public ABIInfo { 696 enum Class { 697 Integer = 0, 698 SSE, 699 SSEUp, 700 X87, 701 X87Up, 702 ComplexX87, 703 NoClass, 704 Memory 705 }; 706 707 /// merge - Implement the X86_64 ABI merging algorithm. 708 /// 709 /// Merge an accumulating classification \arg Accum with a field 710 /// classification \arg Field. 711 /// 712 /// \param Accum - The accumulating classification. This should 713 /// always be either NoClass or the result of a previous merge 714 /// call. In addition, this should never be Memory (the caller 715 /// should just return Memory for the aggregate). 716 static Class merge(Class Accum, Class Field); 717 718 /// classify - Determine the x86_64 register classes in which the 719 /// given type T should be passed. 720 /// 721 /// \param Lo - The classification for the parts of the type 722 /// residing in the low word of the containing object. 723 /// 724 /// \param Hi - The classification for the parts of the type 725 /// residing in the high word of the containing object. 726 /// 727 /// \param OffsetBase - The bit offset of this type in the 728 /// containing object. Some parameters are classified different 729 /// depending on whether they straddle an eightbyte boundary. 730 /// 731 /// If a word is unused its result will be NoClass; if a type should 732 /// be passed in Memory then at least the classification of \arg Lo 733 /// will be Memory. 734 /// 735 /// The \arg Lo class will be NoClass iff the argument is ignored. 736 /// 737 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 738 /// also be ComplexX87. 739 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 740 741 const llvm::Type *Get16ByteVectorType(QualType Ty) const; 742 const llvm::Type *GetSSETypeAtOffset(const llvm::Type *IRType, 743 unsigned IROffset, QualType SourceTy, 744 unsigned SourceOffset) const; 745 const llvm::Type *GetINTEGERTypeAtOffset(const llvm::Type *IRType, 746 unsigned IROffset, QualType SourceTy, 747 unsigned SourceOffset) const; 748 749 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 750 /// such that the argument will be returned in memory. 751 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 752 753 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 754 /// such that the argument will be passed in memory. 755 ABIArgInfo getIndirectResult(QualType Ty) const; 756 757 ABIArgInfo classifyReturnType(QualType RetTy) const; 758 759 ABIArgInfo classifyArgumentType(QualType Ty, unsigned &neededInt, 760 unsigned &neededSSE) const; 761 762public: 763 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 764 765 virtual void computeInfo(CGFunctionInfo &FI) const; 766 767 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 768 CodeGenFunction &CGF) const; 769}; 770 771class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 772public: 773 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 774 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {} 775 776 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 777 return 7; 778 } 779 780 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 781 llvm::Value *Address) const { 782 CodeGen::CGBuilderTy &Builder = CGF.Builder; 783 llvm::LLVMContext &Context = CGF.getLLVMContext(); 784 785 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 786 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 787 788 // 0-15 are the 16 integer registers. 789 // 16 is %rip. 790 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 791 792 return false; 793 } 794}; 795 796} 797 798X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 799 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 800 // classified recursively so that always two fields are 801 // considered. The resulting class is calculated according to 802 // the classes of the fields in the eightbyte: 803 // 804 // (a) If both classes are equal, this is the resulting class. 805 // 806 // (b) If one of the classes is NO_CLASS, the resulting class is 807 // the other class. 808 // 809 // (c) If one of the classes is MEMORY, the result is the MEMORY 810 // class. 811 // 812 // (d) If one of the classes is INTEGER, the result is the 813 // INTEGER. 814 // 815 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 816 // MEMORY is used as class. 817 // 818 // (f) Otherwise class SSE is used. 819 820 // Accum should never be memory (we should have returned) or 821 // ComplexX87 (because this cannot be passed in a structure). 822 assert((Accum != Memory && Accum != ComplexX87) && 823 "Invalid accumulated classification during merge."); 824 if (Accum == Field || Field == NoClass) 825 return Accum; 826 if (Field == Memory) 827 return Memory; 828 if (Accum == NoClass) 829 return Field; 830 if (Accum == Integer || Field == Integer) 831 return Integer; 832 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 833 Accum == X87 || Accum == X87Up) 834 return Memory; 835 return SSE; 836} 837 838void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 839 Class &Lo, Class &Hi) const { 840 // FIXME: This code can be simplified by introducing a simple value class for 841 // Class pairs with appropriate constructor methods for the various 842 // situations. 843 844 // FIXME: Some of the split computations are wrong; unaligned vectors 845 // shouldn't be passed in registers for example, so there is no chance they 846 // can straddle an eightbyte. Verify & simplify. 847 848 Lo = Hi = NoClass; 849 850 Class &Current = OffsetBase < 64 ? Lo : Hi; 851 Current = Memory; 852 853 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 854 BuiltinType::Kind k = BT->getKind(); 855 856 if (k == BuiltinType::Void) { 857 Current = NoClass; 858 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 859 Lo = Integer; 860 Hi = Integer; 861 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 862 Current = Integer; 863 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 864 Current = SSE; 865 } else if (k == BuiltinType::LongDouble) { 866 Lo = X87; 867 Hi = X87Up; 868 } 869 // FIXME: _Decimal32 and _Decimal64 are SSE. 870 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 871 return; 872 } 873 874 if (const EnumType *ET = Ty->getAs<EnumType>()) { 875 // Classify the underlying integer type. 876 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 877 return; 878 } 879 880 if (Ty->hasPointerRepresentation()) { 881 Current = Integer; 882 return; 883 } 884 885 if (Ty->isMemberPointerType()) { 886 if (Ty->isMemberFunctionPointerType()) 887 Lo = Hi = Integer; 888 else 889 Current = Integer; 890 return; 891 } 892 893 if (const VectorType *VT = Ty->getAs<VectorType>()) { 894 uint64_t Size = getContext().getTypeSize(VT); 895 if (Size == 32) { 896 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 897 // float> as integer. 898 Current = Integer; 899 900 // If this type crosses an eightbyte boundary, it should be 901 // split. 902 uint64_t EB_Real = (OffsetBase) / 64; 903 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 904 if (EB_Real != EB_Imag) 905 Hi = Lo; 906 } else if (Size == 64) { 907 // gcc passes <1 x double> in memory. :( 908 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 909 return; 910 911 // gcc passes <1 x long long> as INTEGER. 912 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 913 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 914 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 915 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 916 Current = Integer; 917 else 918 Current = SSE; 919 920 // If this type crosses an eightbyte boundary, it should be 921 // split. 922 if (OffsetBase && OffsetBase != 64) 923 Hi = Lo; 924 } else if (Size == 128) { 925 Lo = SSE; 926 Hi = SSEUp; 927 } 928 return; 929 } 930 931 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 932 QualType ET = getContext().getCanonicalType(CT->getElementType()); 933 934 uint64_t Size = getContext().getTypeSize(Ty); 935 if (ET->isIntegralOrEnumerationType()) { 936 if (Size <= 64) 937 Current = Integer; 938 else if (Size <= 128) 939 Lo = Hi = Integer; 940 } else if (ET == getContext().FloatTy) 941 Current = SSE; 942 else if (ET == getContext().DoubleTy) 943 Lo = Hi = SSE; 944 else if (ET == getContext().LongDoubleTy) 945 Current = ComplexX87; 946 947 // If this complex type crosses an eightbyte boundary then it 948 // should be split. 949 uint64_t EB_Real = (OffsetBase) / 64; 950 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 951 if (Hi == NoClass && EB_Real != EB_Imag) 952 Hi = Lo; 953 954 return; 955 } 956 957 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 958 // Arrays are treated like structures. 959 960 uint64_t Size = getContext().getTypeSize(Ty); 961 962 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 963 // than two eightbytes, ..., it has class MEMORY. 964 if (Size > 128) 965 return; 966 967 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 968 // fields, it has class MEMORY. 969 // 970 // Only need to check alignment of array base. 971 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 972 return; 973 974 // Otherwise implement simplified merge. We could be smarter about 975 // this, but it isn't worth it and would be harder to verify. 976 Current = NoClass; 977 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 978 uint64_t ArraySize = AT->getSize().getZExtValue(); 979 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 980 Class FieldLo, FieldHi; 981 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 982 Lo = merge(Lo, FieldLo); 983 Hi = merge(Hi, FieldHi); 984 if (Lo == Memory || Hi == Memory) 985 break; 986 } 987 988 // Do post merger cleanup (see below). Only case we worry about is Memory. 989 if (Hi == Memory) 990 Lo = Memory; 991 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 992 return; 993 } 994 995 if (const RecordType *RT = Ty->getAs<RecordType>()) { 996 uint64_t Size = getContext().getTypeSize(Ty); 997 998 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 999 // than two eightbytes, ..., it has class MEMORY. 1000 if (Size > 128) 1001 return; 1002 1003 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1004 // copy constructor or a non-trivial destructor, it is passed by invisible 1005 // reference. 1006 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1007 return; 1008 1009 const RecordDecl *RD = RT->getDecl(); 1010 1011 // Assume variable sized types are passed in memory. 1012 if (RD->hasFlexibleArrayMember()) 1013 return; 1014 1015 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1016 1017 // Reset Lo class, this will be recomputed. 1018 Current = NoClass; 1019 1020 // If this is a C++ record, classify the bases first. 1021 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1022 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1023 e = CXXRD->bases_end(); i != e; ++i) { 1024 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1025 "Unexpected base class!"); 1026 const CXXRecordDecl *Base = 1027 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1028 1029 // Classify this field. 1030 // 1031 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1032 // single eightbyte, each is classified separately. Each eightbyte gets 1033 // initialized to class NO_CLASS. 1034 Class FieldLo, FieldHi; 1035 uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base); 1036 classify(i->getType(), Offset, FieldLo, FieldHi); 1037 Lo = merge(Lo, FieldLo); 1038 Hi = merge(Hi, FieldHi); 1039 if (Lo == Memory || Hi == Memory) 1040 break; 1041 } 1042 } 1043 1044 // Classify the fields one at a time, merging the results. 1045 unsigned idx = 0; 1046 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1047 i != e; ++i, ++idx) { 1048 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1049 bool BitField = i->isBitField(); 1050 1051 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1052 // fields, it has class MEMORY. 1053 // 1054 // Note, skip this test for bit-fields, see below. 1055 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1056 Lo = Memory; 1057 return; 1058 } 1059 1060 // Classify this field. 1061 // 1062 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1063 // exceeds a single eightbyte, each is classified 1064 // separately. Each eightbyte gets initialized to class 1065 // NO_CLASS. 1066 Class FieldLo, FieldHi; 1067 1068 // Bit-fields require special handling, they do not force the 1069 // structure to be passed in memory even if unaligned, and 1070 // therefore they can straddle an eightbyte. 1071 if (BitField) { 1072 // Ignore padding bit-fields. 1073 if (i->isUnnamedBitfield()) 1074 continue; 1075 1076 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1077 uint64_t Size = 1078 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue(); 1079 1080 uint64_t EB_Lo = Offset / 64; 1081 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1082 FieldLo = FieldHi = NoClass; 1083 if (EB_Lo) { 1084 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1085 FieldLo = NoClass; 1086 FieldHi = Integer; 1087 } else { 1088 FieldLo = Integer; 1089 FieldHi = EB_Hi ? Integer : NoClass; 1090 } 1091 } else 1092 classify(i->getType(), Offset, FieldLo, FieldHi); 1093 Lo = merge(Lo, FieldLo); 1094 Hi = merge(Hi, FieldHi); 1095 if (Lo == Memory || Hi == Memory) 1096 break; 1097 } 1098 1099 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1100 // 1101 // (a) If one of the classes is MEMORY, the whole argument is 1102 // passed in memory. 1103 // 1104 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 1105 1106 // The first of these conditions is guaranteed by how we implement 1107 // the merge (just bail). 1108 // 1109 // The second condition occurs in the case of unions; for example 1110 // union { _Complex double; unsigned; }. 1111 if (Hi == Memory) 1112 Lo = Memory; 1113 if (Hi == SSEUp && Lo != SSE) 1114 Hi = SSE; 1115 } 1116} 1117 1118ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1119 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1120 // place naturally. 1121 if (!isAggregateTypeForABI(Ty)) { 1122 // Treat an enum type as its underlying type. 1123 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1124 Ty = EnumTy->getDecl()->getIntegerType(); 1125 1126 return (Ty->isPromotableIntegerType() ? 1127 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1128 } 1129 1130 return ABIArgInfo::getIndirect(0); 1131} 1132 1133ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1134 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1135 // place naturally. 1136 if (!isAggregateTypeForABI(Ty)) { 1137 // Treat an enum type as its underlying type. 1138 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1139 Ty = EnumTy->getDecl()->getIntegerType(); 1140 1141 return (Ty->isPromotableIntegerType() ? 1142 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1143 } 1144 1145 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1146 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1147 1148 // Compute the byval alignment. We trust the back-end to honor the 1149 // minimum ABI alignment for byval, to make cleaner IR. 1150 const unsigned MinABIAlign = 8; 1151 unsigned Align = getContext().getTypeAlign(Ty) / 8; 1152 if (Align > MinABIAlign) 1153 return ABIArgInfo::getIndirect(Align); 1154 return ABIArgInfo::getIndirect(0); 1155} 1156 1157/// Get16ByteVectorType - The ABI specifies that a value should be passed in an 1158/// full vector XMM register. Pick an LLVM IR type that will be passed as a 1159/// vector register. 1160const llvm::Type *X86_64ABIInfo::Get16ByteVectorType(QualType Ty) const { 1161 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 1162 1163 // Wrapper structs that just contain vectors are passed just like vectors, 1164 // strip them off if present. 1165 const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1166 while (STy && STy->getNumElements() == 1) { 1167 IRType = STy->getElementType(0); 1168 STy = dyn_cast<llvm::StructType>(IRType); 1169 } 1170 1171 // If the preferred type is a 16-byte vector, prefer to pass it. 1172 if (const llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1173 const llvm::Type *EltTy = VT->getElementType(); 1174 if (VT->getBitWidth() == 128 && 1175 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1176 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1177 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1178 EltTy->isIntegerTy(128))) 1179 return VT; 1180 } 1181 1182 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1183} 1184 1185/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1186/// is known to either be off the end of the specified type or being in 1187/// alignment padding. The user type specified is known to be at most 128 bits 1188/// in size, and have passed through X86_64ABIInfo::classify with a successful 1189/// classification that put one of the two halves in the INTEGER class. 1190/// 1191/// It is conservatively correct to return false. 1192static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1193 unsigned EndBit, ASTContext &Context) { 1194 // If the bytes being queried are off the end of the type, there is no user 1195 // data hiding here. This handles analysis of builtins, vectors and other 1196 // types that don't contain interesting padding. 1197 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1198 if (TySize <= StartBit) 1199 return true; 1200 1201 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1202 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1203 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1204 1205 // Check each element to see if the element overlaps with the queried range. 1206 for (unsigned i = 0; i != NumElts; ++i) { 1207 // If the element is after the span we care about, then we're done.. 1208 unsigned EltOffset = i*EltSize; 1209 if (EltOffset >= EndBit) break; 1210 1211 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1212 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1213 EndBit-EltOffset, Context)) 1214 return false; 1215 } 1216 // If it overlaps no elements, then it is safe to process as padding. 1217 return true; 1218 } 1219 1220 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1221 const RecordDecl *RD = RT->getDecl(); 1222 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1223 1224 // If this is a C++ record, check the bases first. 1225 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1226 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1227 e = CXXRD->bases_end(); i != e; ++i) { 1228 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1229 "Unexpected base class!"); 1230 const CXXRecordDecl *Base = 1231 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1232 1233 // If the base is after the span we care about, ignore it. 1234 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffset(Base); 1235 if (BaseOffset >= EndBit) continue; 1236 1237 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1238 if (!BitsContainNoUserData(i->getType(), BaseStart, 1239 EndBit-BaseOffset, Context)) 1240 return false; 1241 } 1242 } 1243 1244 // Verify that no field has data that overlaps the region of interest. Yes 1245 // this could be sped up a lot by being smarter about queried fields, 1246 // however we're only looking at structs up to 16 bytes, so we don't care 1247 // much. 1248 unsigned idx = 0; 1249 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1250 i != e; ++i, ++idx) { 1251 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1252 1253 // If we found a field after the region we care about, then we're done. 1254 if (FieldOffset >= EndBit) break; 1255 1256 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1257 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1258 Context)) 1259 return false; 1260 } 1261 1262 // If nothing in this record overlapped the area of interest, then we're 1263 // clean. 1264 return true; 1265 } 1266 1267 return false; 1268} 1269 1270/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1271/// float member at the specified offset. For example, {int,{float}} has a 1272/// float at offset 4. It is conservatively correct for this routine to return 1273/// false. 1274static bool ContainsFloatAtOffset(const llvm::Type *IRType, unsigned IROffset, 1275 const llvm::TargetData &TD) { 1276 // Base case if we find a float. 1277 if (IROffset == 0 && IRType->isFloatTy()) 1278 return true; 1279 1280 // If this is a struct, recurse into the field at the specified offset. 1281 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1282 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1283 unsigned Elt = SL->getElementContainingOffset(IROffset); 1284 IROffset -= SL->getElementOffset(Elt); 1285 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1286 } 1287 1288 // If this is an array, recurse into the field at the specified offset. 1289 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1290 const llvm::Type *EltTy = ATy->getElementType(); 1291 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1292 IROffset -= IROffset/EltSize*EltSize; 1293 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1294 } 1295 1296 return false; 1297} 1298 1299 1300/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1301/// low 8 bytes of an XMM register, corresponding to the SSE class. 1302const llvm::Type *X86_64ABIInfo:: 1303GetSSETypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1304 QualType SourceTy, unsigned SourceOffset) const { 1305 // The only three choices we have are either double, <2 x float>, or float. We 1306 // pass as float if the last 4 bytes is just padding. This happens for 1307 // structs that contain 3 floats. 1308 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1309 SourceOffset*8+64, getContext())) 1310 return llvm::Type::getFloatTy(getVMContext()); 1311 1312 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1313 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1314 // case. 1315 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1316 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1317 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1318 1319 return llvm::Type::getDoubleTy(getVMContext()); 1320} 1321 1322 1323/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1324/// an 8-byte GPR. This means that we either have a scalar or we are talking 1325/// about the high or low part of an up-to-16-byte struct. This routine picks 1326/// the best LLVM IR type to represent this, which may be i64 or may be anything 1327/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1328/// etc). 1329/// 1330/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1331/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1332/// the 8-byte value references. PrefType may be null. 1333/// 1334/// SourceTy is the source level type for the entire argument. SourceOffset is 1335/// an offset into this that we're processing (which is always either 0 or 8). 1336/// 1337const llvm::Type *X86_64ABIInfo:: 1338GetINTEGERTypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1339 QualType SourceTy, unsigned SourceOffset) const { 1340 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1341 // returning an 8-byte unit starting with it. See if we can safely use it. 1342 if (IROffset == 0) { 1343 // Pointers and int64's always fill the 8-byte unit. 1344 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1345 return IRType; 1346 1347 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1348 // goodness in the source type is just tail padding. This is allowed to 1349 // kick in for struct {double,int} on the int, but not on 1350 // struct{double,int,int} because we wouldn't return the second int. We 1351 // have to do this analysis on the source type because we can't depend on 1352 // unions being lowered a specific way etc. 1353 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1354 IRType->isIntegerTy(32)) { 1355 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1356 1357 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1358 SourceOffset*8+64, getContext())) 1359 return IRType; 1360 } 1361 } 1362 1363 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1364 // If this is a struct, recurse into the field at the specified offset. 1365 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1366 if (IROffset < SL->getSizeInBytes()) { 1367 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1368 IROffset -= SL->getElementOffset(FieldIdx); 1369 1370 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1371 SourceTy, SourceOffset); 1372 } 1373 } 1374 1375 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1376 const llvm::Type *EltTy = ATy->getElementType(); 1377 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1378 unsigned EltOffset = IROffset/EltSize*EltSize; 1379 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1380 SourceOffset); 1381 } 1382 1383 // Okay, we don't have any better idea of what to pass, so we pass this in an 1384 // integer register that isn't too big to fit the rest of the struct. 1385 unsigned TySizeInBytes = 1386 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1387 1388 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1389 1390 // It is always safe to classify this as an integer type up to i64 that 1391 // isn't larger than the structure. 1392 return llvm::IntegerType::get(getVMContext(), 1393 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1394} 1395 1396ABIArgInfo X86_64ABIInfo:: 1397classifyReturnType(QualType RetTy) const { 1398 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1399 // classification algorithm. 1400 X86_64ABIInfo::Class Lo, Hi; 1401 classify(RetTy, 0, Lo, Hi); 1402 1403 // Check some invariants. 1404 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1405 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1406 1407 const llvm::Type *ResType = 0; 1408 switch (Lo) { 1409 case NoClass: 1410 if (Hi == NoClass) 1411 return ABIArgInfo::getIgnore(); 1412 // If the low part is just padding, it takes no register, leave ResType 1413 // null. 1414 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1415 "Unknown missing lo part"); 1416 break; 1417 1418 case SSEUp: 1419 case X87Up: 1420 assert(0 && "Invalid classification for lo word."); 1421 1422 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1423 // hidden argument. 1424 case Memory: 1425 return getIndirectReturnResult(RetTy); 1426 1427 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1428 // available register of the sequence %rax, %rdx is used. 1429 case Integer: 1430 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, 1431 RetTy, 0); 1432 1433 // If we have a sign or zero extended integer, make sure to return Extend 1434 // so that the parameter gets the right LLVM IR attributes. 1435 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1436 // Treat an enum type as its underlying type. 1437 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1438 RetTy = EnumTy->getDecl()->getIntegerType(); 1439 1440 if (RetTy->isIntegralOrEnumerationType() && 1441 RetTy->isPromotableIntegerType()) 1442 return ABIArgInfo::getExtend(); 1443 } 1444 break; 1445 1446 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1447 // available SSE register of the sequence %xmm0, %xmm1 is used. 1448 case SSE: 1449 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, RetTy, 0); 1450 break; 1451 1452 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1453 // returned on the X87 stack in %st0 as 80-bit x87 number. 1454 case X87: 1455 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1456 break; 1457 1458 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1459 // part of the value is returned in %st0 and the imaginary part in 1460 // %st1. 1461 case ComplexX87: 1462 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1463 ResType = llvm::StructType::get(getVMContext(), 1464 llvm::Type::getX86_FP80Ty(getVMContext()), 1465 llvm::Type::getX86_FP80Ty(getVMContext()), 1466 NULL); 1467 break; 1468 } 1469 1470 switch (Hi) { 1471 // Memory was handled previously and X87 should 1472 // never occur as a hi class. 1473 case Memory: 1474 case X87: 1475 assert(0 && "Invalid classification for hi word."); 1476 1477 case ComplexX87: // Previously handled. 1478 case NoClass: 1479 break; 1480 1481 case Integer: { 1482 const llvm::Type *HiType = 1483 GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1484 if (Lo == NoClass) // Return HiType at offset 8 in memory. 1485 return ABIArgInfo::getDirect(HiType, 8); 1486 1487 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1488 break; 1489 } 1490 case SSE: { 1491 const llvm::Type *HiType = 1492 GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1493 if (Lo == NoClass) // Return HiType at offset 8 in memory. 1494 return ABIArgInfo::getDirect(HiType, 8); 1495 1496 ResType = llvm::StructType::get(getVMContext(), ResType, HiType,NULL); 1497 break; 1498 } 1499 1500 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1501 // is passed in the upper half of the last used SSE register. 1502 // 1503 // SSEUP should always be preceeded by SSE, just widen. 1504 case SSEUp: 1505 assert(Lo == SSE && "Unexpected SSEUp classification."); 1506 ResType = Get16ByteVectorType(RetTy); 1507 break; 1508 1509 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1510 // returned together with the previous X87 value in %st0. 1511 case X87Up: 1512 // If X87Up is preceeded by X87, we don't need to do 1513 // anything. However, in some cases with unions it may not be 1514 // preceeded by X87. In such situations we follow gcc and pass the 1515 // extra bits in an SSE reg. 1516 if (Lo != X87) { 1517 const llvm::Type *HiType = 1518 GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1519 if (Lo == NoClass) // Return HiType at offset 8 in memory. 1520 return ABIArgInfo::getDirect(HiType, 8); 1521 1522 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1523 } 1524 break; 1525 } 1526 1527 return ABIArgInfo::getDirect(ResType); 1528} 1529 1530ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1531 unsigned &neededSSE) const { 1532 X86_64ABIInfo::Class Lo, Hi; 1533 classify(Ty, 0, Lo, Hi); 1534 1535 // Check some invariants. 1536 // FIXME: Enforce these by construction. 1537 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1538 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1539 1540 neededInt = 0; 1541 neededSSE = 0; 1542 const llvm::Type *ResType = 0; 1543 switch (Lo) { 1544 case NoClass: 1545 if (Hi == NoClass) 1546 return ABIArgInfo::getIgnore(); 1547 // If the low part is just padding, it takes no register, leave ResType 1548 // null. 1549 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1550 "Unknown missing lo part"); 1551 break; 1552 1553 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1554 // on the stack. 1555 case Memory: 1556 1557 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1558 // COMPLEX_X87, it is passed in memory. 1559 case X87: 1560 case ComplexX87: 1561 return getIndirectResult(Ty); 1562 1563 case SSEUp: 1564 case X87Up: 1565 assert(0 && "Invalid classification for lo word."); 1566 1567 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1568 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1569 // and %r9 is used. 1570 case Integer: 1571 ++neededInt; 1572 1573 // Pick an 8-byte type based on the preferred type. 1574 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1575 1576 // If we have a sign or zero extended integer, make sure to return Extend 1577 // so that the parameter gets the right LLVM IR attributes. 1578 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1579 // Treat an enum type as its underlying type. 1580 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1581 Ty = EnumTy->getDecl()->getIntegerType(); 1582 1583 if (Ty->isIntegralOrEnumerationType() && 1584 Ty->isPromotableIntegerType()) 1585 return ABIArgInfo::getExtend(); 1586 } 1587 1588 break; 1589 1590 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1591 // available SSE register is used, the registers are taken in the 1592 // order from %xmm0 to %xmm7. 1593 case SSE: 1594 ++neededSSE; 1595 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1596 break; 1597 } 1598 1599 switch (Hi) { 1600 // Memory was handled previously, ComplexX87 and X87 should 1601 // never occur as hi classes, and X87Up must be preceed by X87, 1602 // which is passed in memory. 1603 case Memory: 1604 case X87: 1605 case ComplexX87: 1606 assert(0 && "Invalid classification for hi word."); 1607 break; 1608 1609 case NoClass: break; 1610 1611 case Integer: { 1612 ++neededInt; 1613 // Pick an 8-byte type based on the preferred type. 1614 const llvm::Type *HiType = 1615 GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1616 1617 if (Lo == NoClass) // Pass HiType at offset 8 in memory. 1618 return ABIArgInfo::getDirect(HiType, 8); 1619 1620 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1621 break; 1622 } 1623 1624 // X87Up generally doesn't occur here (long double is passed in 1625 // memory), except in situations involving unions. 1626 case X87Up: 1627 case SSE: { 1628 const llvm::Type *HiType = 1629 GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1630 1631 if (Lo == NoClass) // Pass HiType at offset 8 in memory. 1632 return ABIArgInfo::getDirect(HiType, 8); 1633 1634 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1635 ++neededSSE; 1636 break; 1637 } 1638 1639 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1640 // eightbyte is passed in the upper half of the last used SSE 1641 // register. This only happens when 128-bit vectors are passed. 1642 case SSEUp: 1643 assert(Lo == SSE && "Unexpected SSEUp classification"); 1644 ResType = Get16ByteVectorType(Ty); 1645 break; 1646 } 1647 1648 return ABIArgInfo::getDirect(ResType); 1649} 1650 1651void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1652 1653 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1654 1655 // Keep track of the number of assigned registers. 1656 unsigned freeIntRegs = 6, freeSSERegs = 8; 1657 1658 // If the return value is indirect, then the hidden argument is consuming one 1659 // integer register. 1660 if (FI.getReturnInfo().isIndirect()) 1661 --freeIntRegs; 1662 1663 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1664 // get assigned (in left-to-right order) for passing as follows... 1665 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1666 it != ie; ++it) { 1667 unsigned neededInt, neededSSE; 1668 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1669 1670 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1671 // eightbyte of an argument, the whole argument is passed on the 1672 // stack. If registers have already been assigned for some 1673 // eightbytes of such an argument, the assignments get reverted. 1674 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1675 freeIntRegs -= neededInt; 1676 freeSSERegs -= neededSSE; 1677 } else { 1678 it->info = getIndirectResult(it->type); 1679 } 1680 } 1681} 1682 1683static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1684 QualType Ty, 1685 CodeGenFunction &CGF) { 1686 llvm::Value *overflow_arg_area_p = 1687 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1688 llvm::Value *overflow_arg_area = 1689 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1690 1691 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1692 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1693 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1694 if (Align > 8) { 1695 // Note that we follow the ABI & gcc here, even though the type 1696 // could in theory have an alignment greater than 16. This case 1697 // shouldn't ever matter in practice. 1698 1699 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1700 llvm::Value *Offset = 1701 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1702 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1703 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1704 CGF.Int64Ty); 1705 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1706 overflow_arg_area = 1707 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1708 overflow_arg_area->getType(), 1709 "overflow_arg_area.align"); 1710 } 1711 1712 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1713 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1714 llvm::Value *Res = 1715 CGF.Builder.CreateBitCast(overflow_arg_area, 1716 llvm::PointerType::getUnqual(LTy)); 1717 1718 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1719 // l->overflow_arg_area + sizeof(type). 1720 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1721 // an 8 byte boundary. 1722 1723 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1724 llvm::Value *Offset = 1725 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 1726 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1727 "overflow_arg_area.next"); 1728 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1729 1730 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1731 return Res; 1732} 1733 1734llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1735 CodeGenFunction &CGF) const { 1736 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1737 1738 // Assume that va_list type is correct; should be pointer to LLVM type: 1739 // struct { 1740 // i32 gp_offset; 1741 // i32 fp_offset; 1742 // i8* overflow_arg_area; 1743 // i8* reg_save_area; 1744 // }; 1745 unsigned neededInt, neededSSE; 1746 1747 Ty = CGF.getContext().getCanonicalType(Ty); 1748 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 1749 1750 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1751 // in the registers. If not go to step 7. 1752 if (!neededInt && !neededSSE) 1753 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1754 1755 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1756 // general purpose registers needed to pass type and num_fp to hold 1757 // the number of floating point registers needed. 1758 1759 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1760 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1761 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1762 // 1763 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1764 // register save space). 1765 1766 llvm::Value *InRegs = 0; 1767 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1768 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1769 if (neededInt) { 1770 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1771 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1772 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 1773 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 1774 } 1775 1776 if (neededSSE) { 1777 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1778 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1779 llvm::Value *FitsInFP = 1780 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 1781 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 1782 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1783 } 1784 1785 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1786 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1787 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1788 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1789 1790 // Emit code to load the value if it was passed in registers. 1791 1792 CGF.EmitBlock(InRegBlock); 1793 1794 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1795 // an offset of l->gp_offset and/or l->fp_offset. This may require 1796 // copying to a temporary location in case the parameter is passed 1797 // in different register classes or requires an alignment greater 1798 // than 8 for general purpose registers and 16 for XMM registers. 1799 // 1800 // FIXME: This really results in shameful code when we end up needing to 1801 // collect arguments from different places; often what should result in a 1802 // simple assembling of a structure from scattered addresses has many more 1803 // loads than necessary. Can we clean this up? 1804 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1805 llvm::Value *RegAddr = 1806 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1807 "reg_save_area"); 1808 if (neededInt && neededSSE) { 1809 // FIXME: Cleanup. 1810 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 1811 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1812 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1813 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1814 const llvm::Type *TyLo = ST->getElementType(0); 1815 const llvm::Type *TyHi = ST->getElementType(1); 1816 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 1817 "Unexpected ABI info for mixed regs"); 1818 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1819 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1820 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1821 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1822 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 1823 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 1824 llvm::Value *V = 1825 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 1826 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1827 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 1828 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1829 1830 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1831 llvm::PointerType::getUnqual(LTy)); 1832 } else if (neededInt) { 1833 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1834 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1835 llvm::PointerType::getUnqual(LTy)); 1836 } else if (neededSSE == 1) { 1837 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1838 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1839 llvm::PointerType::getUnqual(LTy)); 1840 } else { 1841 assert(neededSSE == 2 && "Invalid number of needed registers!"); 1842 // SSE registers are spaced 16 bytes apart in the register save 1843 // area, we need to collect the two eightbytes together. 1844 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1845 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 1846 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 1847 const llvm::Type *DblPtrTy = 1848 llvm::PointerType::getUnqual(DoubleTy); 1849 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 1850 DoubleTy, NULL); 1851 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 1852 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 1853 DblPtrTy)); 1854 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1855 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 1856 DblPtrTy)); 1857 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1858 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1859 llvm::PointerType::getUnqual(LTy)); 1860 } 1861 1862 // AMD64-ABI 3.5.7p5: Step 5. Set: 1863 // l->gp_offset = l->gp_offset + num_gp * 8 1864 // l->fp_offset = l->fp_offset + num_fp * 16. 1865 if (neededInt) { 1866 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 1867 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 1868 gp_offset_p); 1869 } 1870 if (neededSSE) { 1871 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 1872 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 1873 fp_offset_p); 1874 } 1875 CGF.EmitBranch(ContBlock); 1876 1877 // Emit code to load the value if it was passed in memory. 1878 1879 CGF.EmitBlock(InMemBlock); 1880 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1881 1882 // Return the appropriate result. 1883 1884 CGF.EmitBlock(ContBlock); 1885 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 1886 "vaarg.addr"); 1887 ResAddr->reserveOperandSpace(2); 1888 ResAddr->addIncoming(RegAddr, InRegBlock); 1889 ResAddr->addIncoming(MemAddr, InMemBlock); 1890 return ResAddr; 1891} 1892 1893 1894 1895//===----------------------------------------------------------------------===// 1896// PIC16 ABI Implementation 1897//===----------------------------------------------------------------------===// 1898 1899namespace { 1900 1901class PIC16ABIInfo : public ABIInfo { 1902public: 1903 PIC16ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 1904 1905 ABIArgInfo classifyReturnType(QualType RetTy) const; 1906 1907 ABIArgInfo classifyArgumentType(QualType RetTy) const; 1908 1909 virtual void computeInfo(CGFunctionInfo &FI) const { 1910 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1911 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1912 it != ie; ++it) 1913 it->info = classifyArgumentType(it->type); 1914 } 1915 1916 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1917 CodeGenFunction &CGF) const; 1918}; 1919 1920class PIC16TargetCodeGenInfo : public TargetCodeGenInfo { 1921public: 1922 PIC16TargetCodeGenInfo(CodeGenTypes &CGT) 1923 : TargetCodeGenInfo(new PIC16ABIInfo(CGT)) {} 1924}; 1925 1926} 1927 1928ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy) const { 1929 if (RetTy->isVoidType()) { 1930 return ABIArgInfo::getIgnore(); 1931 } else { 1932 return ABIArgInfo::getDirect(); 1933 } 1934} 1935 1936ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty) const { 1937 return ABIArgInfo::getDirect(); 1938} 1939 1940llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1941 CodeGenFunction &CGF) const { 1942 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1943 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1944 1945 CGBuilderTy &Builder = CGF.Builder; 1946 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1947 "ap"); 1948 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1949 llvm::Type *PTy = 1950 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1951 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1952 1953 uint64_t Offset = CGF.getContext().getTypeSize(Ty) / 8; 1954 1955 llvm::Value *NextAddr = 1956 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1957 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1958 "ap.next"); 1959 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1960 1961 return AddrTyped; 1962} 1963 1964 1965// PowerPC-32 1966 1967namespace { 1968class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 1969public: 1970 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 1971 1972 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 1973 // This is recovered from gcc output. 1974 return 1; // r1 is the dedicated stack pointer 1975 } 1976 1977 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1978 llvm::Value *Address) const; 1979}; 1980 1981} 1982 1983bool 1984PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1985 llvm::Value *Address) const { 1986 // This is calculated from the LLVM and GCC tables and verified 1987 // against gcc output. AFAIK all ABIs use the same encoding. 1988 1989 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1990 llvm::LLVMContext &Context = CGF.getLLVMContext(); 1991 1992 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 1993 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 1994 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 1995 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 1996 1997 // 0-31: r0-31, the 4-byte general-purpose registers 1998 AssignToArrayRange(Builder, Address, Four8, 0, 31); 1999 2000 // 32-63: fp0-31, the 8-byte floating-point registers 2001 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2002 2003 // 64-76 are various 4-byte special-purpose registers: 2004 // 64: mq 2005 // 65: lr 2006 // 66: ctr 2007 // 67: ap 2008 // 68-75 cr0-7 2009 // 76: xer 2010 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2011 2012 // 77-108: v0-31, the 16-byte vector registers 2013 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2014 2015 // 109: vrsave 2016 // 110: vscr 2017 // 111: spe_acc 2018 // 112: spefscr 2019 // 113: sfp 2020 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2021 2022 return false; 2023} 2024 2025 2026//===----------------------------------------------------------------------===// 2027// ARM ABI Implementation 2028//===----------------------------------------------------------------------===// 2029 2030namespace { 2031 2032class ARMABIInfo : public ABIInfo { 2033public: 2034 enum ABIKind { 2035 APCS = 0, 2036 AAPCS = 1, 2037 AAPCS_VFP 2038 }; 2039 2040private: 2041 ABIKind Kind; 2042 2043public: 2044 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2045 2046private: 2047 ABIKind getABIKind() const { return Kind; } 2048 2049 ABIArgInfo classifyReturnType(QualType RetTy) const; 2050 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2051 2052 virtual void computeInfo(CGFunctionInfo &FI) const; 2053 2054 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2055 CodeGenFunction &CGF) const; 2056}; 2057 2058class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2059public: 2060 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2061 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2062 2063 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2064 return 13; 2065 } 2066}; 2067 2068} 2069 2070void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2071 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2072 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2073 it != ie; ++it) 2074 it->info = classifyArgumentType(it->type); 2075 2076 const llvm::Triple &Triple(getContext().Target.getTriple()); 2077 llvm::CallingConv::ID DefaultCC; 2078 if (Triple.getEnvironmentName() == "gnueabi" || 2079 Triple.getEnvironmentName() == "eabi") 2080 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2081 else 2082 DefaultCC = llvm::CallingConv::ARM_APCS; 2083 2084 switch (getABIKind()) { 2085 case APCS: 2086 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2087 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2088 break; 2089 2090 case AAPCS: 2091 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2092 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2093 break; 2094 2095 case AAPCS_VFP: 2096 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2097 break; 2098 } 2099} 2100 2101ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2102 if (!isAggregateTypeForABI(Ty)) { 2103 // Treat an enum type as its underlying type. 2104 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2105 Ty = EnumTy->getDecl()->getIntegerType(); 2106 2107 return (Ty->isPromotableIntegerType() ? 2108 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2109 } 2110 2111 // Ignore empty records. 2112 if (isEmptyRecord(getContext(), Ty, true)) 2113 return ABIArgInfo::getIgnore(); 2114 2115 // Structures with either a non-trivial destructor or a non-trivial 2116 // copy constructor are always indirect. 2117 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2118 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2119 2120 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2121 // backend doesn't support byval. 2122 // FIXME: This doesn't handle alignment > 64 bits. 2123 const llvm::Type* ElemTy; 2124 unsigned SizeRegs; 2125 if (getContext().getTypeAlign(Ty) > 32) { 2126 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2127 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2128 } else { 2129 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2130 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2131 } 2132 std::vector<const llvm::Type*> LLVMFields; 2133 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 2134 const llvm::Type* STy = llvm::StructType::get(getVMContext(), LLVMFields, 2135 true); 2136 return ABIArgInfo::getDirect(STy); 2137} 2138 2139static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2140 llvm::LLVMContext &VMContext) { 2141 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2142 // is called integer-like if its size is less than or equal to one word, and 2143 // the offset of each of its addressable sub-fields is zero. 2144 2145 uint64_t Size = Context.getTypeSize(Ty); 2146 2147 // Check that the type fits in a word. 2148 if (Size > 32) 2149 return false; 2150 2151 // FIXME: Handle vector types! 2152 if (Ty->isVectorType()) 2153 return false; 2154 2155 // Float types are never treated as "integer like". 2156 if (Ty->isRealFloatingType()) 2157 return false; 2158 2159 // If this is a builtin or pointer type then it is ok. 2160 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2161 return true; 2162 2163 // Small complex integer types are "integer like". 2164 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2165 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2166 2167 // Single element and zero sized arrays should be allowed, by the definition 2168 // above, but they are not. 2169 2170 // Otherwise, it must be a record type. 2171 const RecordType *RT = Ty->getAs<RecordType>(); 2172 if (!RT) return false; 2173 2174 // Ignore records with flexible arrays. 2175 const RecordDecl *RD = RT->getDecl(); 2176 if (RD->hasFlexibleArrayMember()) 2177 return false; 2178 2179 // Check that all sub-fields are at offset 0, and are themselves "integer 2180 // like". 2181 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2182 2183 bool HadField = false; 2184 unsigned idx = 0; 2185 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2186 i != e; ++i, ++idx) { 2187 const FieldDecl *FD = *i; 2188 2189 // Bit-fields are not addressable, we only need to verify they are "integer 2190 // like". We still have to disallow a subsequent non-bitfield, for example: 2191 // struct { int : 0; int x } 2192 // is non-integer like according to gcc. 2193 if (FD->isBitField()) { 2194 if (!RD->isUnion()) 2195 HadField = true; 2196 2197 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2198 return false; 2199 2200 continue; 2201 } 2202 2203 // Check if this field is at offset 0. 2204 if (Layout.getFieldOffset(idx) != 0) 2205 return false; 2206 2207 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2208 return false; 2209 2210 // Only allow at most one field in a structure. This doesn't match the 2211 // wording above, but follows gcc in situations with a field following an 2212 // empty structure. 2213 if (!RD->isUnion()) { 2214 if (HadField) 2215 return false; 2216 2217 HadField = true; 2218 } 2219 } 2220 2221 return true; 2222} 2223 2224ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2225 if (RetTy->isVoidType()) 2226 return ABIArgInfo::getIgnore(); 2227 2228 if (!isAggregateTypeForABI(RetTy)) { 2229 // Treat an enum type as its underlying type. 2230 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2231 RetTy = EnumTy->getDecl()->getIntegerType(); 2232 2233 return (RetTy->isPromotableIntegerType() ? 2234 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2235 } 2236 2237 // Structures with either a non-trivial destructor or a non-trivial 2238 // copy constructor are always indirect. 2239 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2240 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2241 2242 // Are we following APCS? 2243 if (getABIKind() == APCS) { 2244 if (isEmptyRecord(getContext(), RetTy, false)) 2245 return ABIArgInfo::getIgnore(); 2246 2247 // Complex types are all returned as packed integers. 2248 // 2249 // FIXME: Consider using 2 x vector types if the back end handles them 2250 // correctly. 2251 if (RetTy->isAnyComplexType()) 2252 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2253 getContext().getTypeSize(RetTy))); 2254 2255 // Integer like structures are returned in r0. 2256 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2257 // Return in the smallest viable integer type. 2258 uint64_t Size = getContext().getTypeSize(RetTy); 2259 if (Size <= 8) 2260 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2261 if (Size <= 16) 2262 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2263 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2264 } 2265 2266 // Otherwise return in memory. 2267 return ABIArgInfo::getIndirect(0); 2268 } 2269 2270 // Otherwise this is an AAPCS variant. 2271 2272 if (isEmptyRecord(getContext(), RetTy, true)) 2273 return ABIArgInfo::getIgnore(); 2274 2275 // Aggregates <= 4 bytes are returned in r0; other aggregates 2276 // are returned indirectly. 2277 uint64_t Size = getContext().getTypeSize(RetTy); 2278 if (Size <= 32) { 2279 // Return in the smallest viable integer type. 2280 if (Size <= 8) 2281 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2282 if (Size <= 16) 2283 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2284 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2285 } 2286 2287 return ABIArgInfo::getIndirect(0); 2288} 2289 2290llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2291 CodeGenFunction &CGF) const { 2292 // FIXME: Need to handle alignment 2293 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2294 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2295 2296 CGBuilderTy &Builder = CGF.Builder; 2297 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2298 "ap"); 2299 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2300 llvm::Type *PTy = 2301 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2302 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2303 2304 uint64_t Offset = 2305 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2306 llvm::Value *NextAddr = 2307 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2308 "ap.next"); 2309 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2310 2311 return AddrTyped; 2312} 2313 2314ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 2315 if (RetTy->isVoidType()) 2316 return ABIArgInfo::getIgnore(); 2317 2318 if (isAggregateTypeForABI(RetTy)) 2319 return ABIArgInfo::getIndirect(0); 2320 2321 // Treat an enum type as its underlying type. 2322 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2323 RetTy = EnumTy->getDecl()->getIntegerType(); 2324 2325 return (RetTy->isPromotableIntegerType() ? 2326 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2327} 2328 2329//===----------------------------------------------------------------------===// 2330// SystemZ ABI Implementation 2331//===----------------------------------------------------------------------===// 2332 2333namespace { 2334 2335class SystemZABIInfo : public ABIInfo { 2336public: 2337 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2338 2339 bool isPromotableIntegerType(QualType Ty) const; 2340 2341 ABIArgInfo classifyReturnType(QualType RetTy) const; 2342 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2343 2344 virtual void computeInfo(CGFunctionInfo &FI) const { 2345 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2346 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2347 it != ie; ++it) 2348 it->info = classifyArgumentType(it->type); 2349 } 2350 2351 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2352 CodeGenFunction &CGF) const; 2353}; 2354 2355class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2356public: 2357 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 2358 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 2359}; 2360 2361} 2362 2363bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2364 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2365 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2366 switch (BT->getKind()) { 2367 case BuiltinType::Bool: 2368 case BuiltinType::Char_S: 2369 case BuiltinType::Char_U: 2370 case BuiltinType::SChar: 2371 case BuiltinType::UChar: 2372 case BuiltinType::Short: 2373 case BuiltinType::UShort: 2374 case BuiltinType::Int: 2375 case BuiltinType::UInt: 2376 return true; 2377 default: 2378 return false; 2379 } 2380 return false; 2381} 2382 2383llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2384 CodeGenFunction &CGF) const { 2385 // FIXME: Implement 2386 return 0; 2387} 2388 2389 2390ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 2391 if (RetTy->isVoidType()) 2392 return ABIArgInfo::getIgnore(); 2393 if (isAggregateTypeForABI(RetTy)) 2394 return ABIArgInfo::getIndirect(0); 2395 2396 return (isPromotableIntegerType(RetTy) ? 2397 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2398} 2399 2400ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 2401 if (isAggregateTypeForABI(Ty)) 2402 return ABIArgInfo::getIndirect(0); 2403 2404 return (isPromotableIntegerType(Ty) ? 2405 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2406} 2407 2408//===----------------------------------------------------------------------===// 2409// MSP430 ABI Implementation 2410//===----------------------------------------------------------------------===// 2411 2412namespace { 2413 2414class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2415public: 2416 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2417 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2418 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2419 CodeGen::CodeGenModule &M) const; 2420}; 2421 2422} 2423 2424void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2425 llvm::GlobalValue *GV, 2426 CodeGen::CodeGenModule &M) const { 2427 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2428 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2429 // Handle 'interrupt' attribute: 2430 llvm::Function *F = cast<llvm::Function>(GV); 2431 2432 // Step 1: Set ISR calling convention. 2433 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2434 2435 // Step 2: Add attributes goodness. 2436 F->addFnAttr(llvm::Attribute::NoInline); 2437 2438 // Step 3: Emit ISR vector alias. 2439 unsigned Num = attr->getNumber() + 0xffe0; 2440 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2441 "vector_" + 2442 llvm::LowercaseString(llvm::utohexstr(Num)), 2443 GV, &M.getModule()); 2444 } 2445 } 2446} 2447 2448//===----------------------------------------------------------------------===// 2449// MIPS ABI Implementation. This works for both little-endian and 2450// big-endian variants. 2451//===----------------------------------------------------------------------===// 2452 2453namespace { 2454class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 2455public: 2456 MIPSTargetCodeGenInfo(CodeGenTypes &CGT) 2457 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2458 2459 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 2460 return 29; 2461 } 2462 2463 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2464 llvm::Value *Address) const; 2465}; 2466} 2467 2468bool 2469MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2470 llvm::Value *Address) const { 2471 // This information comes from gcc's implementation, which seems to 2472 // as canonical as it gets. 2473 2474 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2475 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2476 2477 // Everything on MIPS is 4 bytes. Double-precision FP registers 2478 // are aliased to pairs of single-precision FP registers. 2479 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2480 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2481 2482 // 0-31 are the general purpose registers, $0 - $31. 2483 // 32-63 are the floating-point registers, $f0 - $f31. 2484 // 64 and 65 are the multiply/divide registers, $hi and $lo. 2485 // 66 is the (notional, I think) register for signal-handler return. 2486 AssignToArrayRange(Builder, Address, Four8, 0, 65); 2487 2488 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 2489 // They are one bit wide and ignored here. 2490 2491 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 2492 // (coprocessor 1 is the FP unit) 2493 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 2494 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 2495 // 176-181 are the DSP accumulator registers. 2496 AssignToArrayRange(Builder, Address, Four8, 80, 181); 2497 2498 return false; 2499} 2500 2501 2502const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 2503 if (TheTargetCodeGenInfo) 2504 return *TheTargetCodeGenInfo; 2505 2506 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2507 // free it. 2508 2509 const llvm::Triple &Triple = getContext().Target.getTriple(); 2510 switch (Triple.getArch()) { 2511 default: 2512 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 2513 2514 case llvm::Triple::mips: 2515 case llvm::Triple::mipsel: 2516 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types)); 2517 2518 case llvm::Triple::arm: 2519 case llvm::Triple::thumb: 2520 // FIXME: We want to know the float calling convention as well. 2521 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2522 return *(TheTargetCodeGenInfo = 2523 new ARMTargetCodeGenInfo(Types, ARMABIInfo::APCS)); 2524 2525 return *(TheTargetCodeGenInfo = 2526 new ARMTargetCodeGenInfo(Types, ARMABIInfo::AAPCS)); 2527 2528 case llvm::Triple::pic16: 2529 return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo(Types)); 2530 2531 case llvm::Triple::ppc: 2532 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 2533 2534 case llvm::Triple::systemz: 2535 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 2536 2537 case llvm::Triple::msp430: 2538 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 2539 2540 case llvm::Triple::x86: 2541 switch (Triple.getOS()) { 2542 case llvm::Triple::Darwin: 2543 return *(TheTargetCodeGenInfo = 2544 new X86_32TargetCodeGenInfo(Types, true, true)); 2545 case llvm::Triple::Cygwin: 2546 case llvm::Triple::MinGW32: 2547 case llvm::Triple::MinGW64: 2548 case llvm::Triple::AuroraUX: 2549 case llvm::Triple::DragonFly: 2550 case llvm::Triple::FreeBSD: 2551 case llvm::Triple::OpenBSD: 2552 return *(TheTargetCodeGenInfo = 2553 new X86_32TargetCodeGenInfo(Types, false, true)); 2554 2555 default: 2556 return *(TheTargetCodeGenInfo = 2557 new X86_32TargetCodeGenInfo(Types, false, false)); 2558 } 2559 2560 case llvm::Triple::x86_64: 2561 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types)); 2562 } 2563} 2564