TargetInfo.cpp revision 9ed63f8b87b1f7d074d21cc1210fd28d93291bea
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "clang/Frontend/CodeGenOptions.h" 20#include "llvm/Type.h" 21#include "llvm/Target/TargetData.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39static bool isAggregateTypeForABI(QualType T) { 40 return CodeGenFunction::hasAggregateLLVMType(T) || 41 T->isMemberFunctionPointerType(); 42} 43 44ABIInfo::~ABIInfo() {} 45 46ASTContext &ABIInfo::getContext() const { 47 return CGT.getContext(); 48} 49 50llvm::LLVMContext &ABIInfo::getVMContext() const { 51 return CGT.getLLVMContext(); 52} 53 54const llvm::TargetData &ABIInfo::getTargetData() const { 55 return CGT.getTargetData(); 56} 57 58 59void ABIArgInfo::dump() const { 60 raw_ostream &OS = llvm::errs(); 61 OS << "(ABIArgInfo Kind="; 62 switch (TheKind) { 63 case Direct: 64 OS << "Direct Type="; 65 if (llvm::Type *Ty = getCoerceToType()) 66 Ty->print(OS); 67 else 68 OS << "null"; 69 break; 70 case Extend: 71 OS << "Extend"; 72 break; 73 case Ignore: 74 OS << "Ignore"; 75 break; 76 case Indirect: 77 OS << "Indirect Align=" << getIndirectAlign() 78 << " ByVal=" << getIndirectByVal() 79 << " Realign=" << getIndirectRealign(); 80 break; 81 case Expand: 82 OS << "Expand"; 83 break; 84 } 85 OS << ")\n"; 86} 87 88TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 89 90// If someone can figure out a general rule for this, that would be great. 91// It's probably just doomed to be platform-dependent, though. 92unsigned TargetCodeGenInfo::getSizeOfUnwindException() const { 93 // Verified for: 94 // x86-64 FreeBSD, Linux, Darwin 95 // x86-32 FreeBSD, Linux, Darwin 96 // PowerPC Linux, Darwin 97 // ARM Darwin (*not* EABI) 98 return 32; 99} 100 101bool TargetCodeGenInfo::isNoProtoCallVariadic(const CallArgList &args, 102 const FunctionNoProtoType *fnType) const { 103 // The following conventions are known to require this to be false: 104 // x86_stdcall 105 // MIPS 106 // For everything else, we just prefer false unless we opt out. 107 return false; 108} 109 110static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 111 112/// isEmptyField - Return true iff a the field is "empty", that is it 113/// is an unnamed bit-field or an (array of) empty record(s). 114static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 115 bool AllowArrays) { 116 if (FD->isUnnamedBitfield()) 117 return true; 118 119 QualType FT = FD->getType(); 120 121 // Constant arrays of empty records count as empty, strip them off. 122 // Constant arrays of zero length always count as empty. 123 if (AllowArrays) 124 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 125 if (AT->getSize() == 0) 126 return true; 127 FT = AT->getElementType(); 128 } 129 130 const RecordType *RT = FT->getAs<RecordType>(); 131 if (!RT) 132 return false; 133 134 // C++ record fields are never empty, at least in the Itanium ABI. 135 // 136 // FIXME: We should use a predicate for whether this behavior is true in the 137 // current ABI. 138 if (isa<CXXRecordDecl>(RT->getDecl())) 139 return false; 140 141 return isEmptyRecord(Context, FT, AllowArrays); 142} 143 144/// isEmptyRecord - Return true iff a structure contains only empty 145/// fields. Note that a structure with a flexible array member is not 146/// considered empty. 147static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 148 const RecordType *RT = T->getAs<RecordType>(); 149 if (!RT) 150 return 0; 151 const RecordDecl *RD = RT->getDecl(); 152 if (RD->hasFlexibleArrayMember()) 153 return false; 154 155 // If this is a C++ record, check the bases first. 156 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 157 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 158 e = CXXRD->bases_end(); i != e; ++i) 159 if (!isEmptyRecord(Context, i->getType(), true)) 160 return false; 161 162 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 163 i != e; ++i) 164 if (!isEmptyField(Context, *i, AllowArrays)) 165 return false; 166 return true; 167} 168 169/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 170/// a non-trivial destructor or a non-trivial copy constructor. 171static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 172 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 173 if (!RD) 174 return false; 175 176 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 177} 178 179/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 180/// a record type with either a non-trivial destructor or a non-trivial copy 181/// constructor. 182static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 183 const RecordType *RT = T->getAs<RecordType>(); 184 if (!RT) 185 return false; 186 187 return hasNonTrivialDestructorOrCopyConstructor(RT); 188} 189 190/// isSingleElementStruct - Determine if a structure is a "single 191/// element struct", i.e. it has exactly one non-empty field or 192/// exactly one field which is itself a single element 193/// struct. Structures with flexible array members are never 194/// considered single element structs. 195/// 196/// \return The field declaration for the single non-empty field, if 197/// it exists. 198static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 199 const RecordType *RT = T->getAsStructureType(); 200 if (!RT) 201 return 0; 202 203 const RecordDecl *RD = RT->getDecl(); 204 if (RD->hasFlexibleArrayMember()) 205 return 0; 206 207 const Type *Found = 0; 208 209 // If this is a C++ record, check the bases first. 210 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 211 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 212 e = CXXRD->bases_end(); i != e; ++i) { 213 // Ignore empty records. 214 if (isEmptyRecord(Context, i->getType(), true)) 215 continue; 216 217 // If we already found an element then this isn't a single-element struct. 218 if (Found) 219 return 0; 220 221 // If this is non-empty and not a single element struct, the composite 222 // cannot be a single element struct. 223 Found = isSingleElementStruct(i->getType(), Context); 224 if (!Found) 225 return 0; 226 } 227 } 228 229 // Check for single element. 230 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 231 i != e; ++i) { 232 const FieldDecl *FD = *i; 233 QualType FT = FD->getType(); 234 235 // Ignore empty fields. 236 if (isEmptyField(Context, FD, true)) 237 continue; 238 239 // If we already found an element then this isn't a single-element 240 // struct. 241 if (Found) 242 return 0; 243 244 // Treat single element arrays as the element. 245 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 246 if (AT->getSize().getZExtValue() != 1) 247 break; 248 FT = AT->getElementType(); 249 } 250 251 if (!isAggregateTypeForABI(FT)) { 252 Found = FT.getTypePtr(); 253 } else { 254 Found = isSingleElementStruct(FT, Context); 255 if (!Found) 256 return 0; 257 } 258 } 259 260 // We don't consider a struct a single-element struct if it has 261 // padding beyond the element type. 262 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T)) 263 return 0; 264 265 return Found; 266} 267 268static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 269 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 270 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 271 !Ty->isBlockPointerType()) 272 return false; 273 274 uint64_t Size = Context.getTypeSize(Ty); 275 return Size == 32 || Size == 64; 276} 277 278/// canExpandIndirectArgument - Test whether an argument type which is to be 279/// passed indirectly (on the stack) would have the equivalent layout if it was 280/// expanded into separate arguments. If so, we prefer to do the latter to avoid 281/// inhibiting optimizations. 282/// 283// FIXME: This predicate is missing many cases, currently it just follows 284// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 285// should probably make this smarter, or better yet make the LLVM backend 286// capable of handling it. 287static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 288 // We can only expand structure types. 289 const RecordType *RT = Ty->getAs<RecordType>(); 290 if (!RT) 291 return false; 292 293 // We can only expand (C) structures. 294 // 295 // FIXME: This needs to be generalized to handle classes as well. 296 const RecordDecl *RD = RT->getDecl(); 297 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 298 return false; 299 300 uint64_t Size = 0; 301 302 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 303 i != e; ++i) { 304 const FieldDecl *FD = *i; 305 306 if (!is32Or64BitBasicType(FD->getType(), Context)) 307 return false; 308 309 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 310 // how to expand them yet, and the predicate for telling if a bitfield still 311 // counts as "basic" is more complicated than what we were doing previously. 312 if (FD->isBitField()) 313 return false; 314 315 Size += Context.getTypeSize(FD->getType()); 316 } 317 318 // Make sure there are not any holes in the struct. 319 if (Size != Context.getTypeSize(Ty)) 320 return false; 321 322 return true; 323} 324 325namespace { 326/// DefaultABIInfo - The default implementation for ABI specific 327/// details. This implementation provides information which results in 328/// self-consistent and sensible LLVM IR generation, but does not 329/// conform to any particular ABI. 330class DefaultABIInfo : public ABIInfo { 331public: 332 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 333 334 ABIArgInfo classifyReturnType(QualType RetTy) const; 335 ABIArgInfo classifyArgumentType(QualType RetTy) const; 336 337 virtual void computeInfo(CGFunctionInfo &FI) const { 338 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 339 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 340 it != ie; ++it) 341 it->info = classifyArgumentType(it->type); 342 } 343 344 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 345 CodeGenFunction &CGF) const; 346}; 347 348class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 349public: 350 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 351 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 352}; 353 354llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 355 CodeGenFunction &CGF) const { 356 return 0; 357} 358 359ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 360 if (isAggregateTypeForABI(Ty)) { 361 // Records with non trivial destructors/constructors should not be passed 362 // by value. 363 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 364 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 365 366 return ABIArgInfo::getIndirect(0); 367 } 368 369 // Treat an enum type as its underlying type. 370 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 371 Ty = EnumTy->getDecl()->getIntegerType(); 372 373 return (Ty->isPromotableIntegerType() ? 374 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 375} 376 377ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 378 if (RetTy->isVoidType()) 379 return ABIArgInfo::getIgnore(); 380 381 if (isAggregateTypeForABI(RetTy)) 382 return ABIArgInfo::getIndirect(0); 383 384 // Treat an enum type as its underlying type. 385 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 386 RetTy = EnumTy->getDecl()->getIntegerType(); 387 388 return (RetTy->isPromotableIntegerType() ? 389 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 390} 391 392//===----------------------------------------------------------------------===// 393// le32/PNaCl bitcode ABI Implementation 394//===----------------------------------------------------------------------===// 395 396class PNaClABIInfo : public ABIInfo { 397 public: 398 PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 399 400 ABIArgInfo classifyReturnType(QualType RetTy) const; 401 ABIArgInfo classifyArgumentType(QualType RetTy, unsigned &FreeRegs) const; 402 403 virtual void computeInfo(CGFunctionInfo &FI) const; 404 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 405 CodeGenFunction &CGF) const; 406}; 407 408class PNaClTargetCodeGenInfo : public TargetCodeGenInfo { 409 public: 410 PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 411 : TargetCodeGenInfo(new PNaClABIInfo(CGT)) {} 412}; 413 414void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const { 415 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 416 417 unsigned FreeRegs = FI.getHasRegParm() ? FI.getRegParm() : 0; 418 419 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 420 it != ie; ++it) 421 it->info = classifyArgumentType(it->type, FreeRegs); 422 } 423 424llvm::Value *PNaClABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 425 CodeGenFunction &CGF) const { 426 return 0; 427} 428 429ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty, 430 unsigned &FreeRegs) const { 431 if (isAggregateTypeForABI(Ty)) { 432 // Records with non trivial destructors/constructors should not be passed 433 // by value. 434 FreeRegs = 0; 435 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 436 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 437 438 return ABIArgInfo::getIndirect(0); 439 } 440 441 // Treat an enum type as its underlying type. 442 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 443 Ty = EnumTy->getDecl()->getIntegerType(); 444 445 ABIArgInfo BaseInfo = (Ty->isPromotableIntegerType() ? 446 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 447 448 // Regparm regs hold 32 bits. 449 unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32; 450 if (SizeInRegs == 0) return BaseInfo; 451 if (SizeInRegs > FreeRegs) { 452 FreeRegs = 0; 453 return BaseInfo; 454 } 455 FreeRegs -= SizeInRegs; 456 return BaseInfo.isDirect() ? 457 ABIArgInfo::getDirectInReg(BaseInfo.getCoerceToType()) : 458 ABIArgInfo::getExtendInReg(BaseInfo.getCoerceToType()); 459} 460 461ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const { 462 if (RetTy->isVoidType()) 463 return ABIArgInfo::getIgnore(); 464 465 if (isAggregateTypeForABI(RetTy)) 466 return ABIArgInfo::getIndirect(0); 467 468 // Treat an enum type as its underlying type. 469 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 470 RetTy = EnumTy->getDecl()->getIntegerType(); 471 472 return (RetTy->isPromotableIntegerType() ? 473 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 474} 475 476/// UseX86_MMXType - Return true if this is an MMX type that should use the 477/// special x86_mmx type. 478bool UseX86_MMXType(llvm::Type *IRType) { 479 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the 480 // special x86_mmx type. 481 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 482 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 483 IRType->getScalarSizeInBits() != 64; 484} 485 486static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 487 StringRef Constraint, 488 llvm::Type* Ty) { 489 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) 490 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 491 return Ty; 492} 493 494//===----------------------------------------------------------------------===// 495// X86-32 ABI Implementation 496//===----------------------------------------------------------------------===// 497 498/// X86_32ABIInfo - The X86-32 ABI information. 499class X86_32ABIInfo : public ABIInfo { 500 enum Class { 501 Integer, 502 Float 503 }; 504 505 static const unsigned MinABIStackAlignInBytes = 4; 506 507 bool IsDarwinVectorABI; 508 bool IsSmallStructInRegABI; 509 bool IsMMXDisabled; 510 bool IsWin32FloatStructABI; 511 unsigned DefaultNumRegisterParameters; 512 513 static bool isRegisterSize(unsigned Size) { 514 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 515 } 516 517 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context, 518 unsigned callingConvention); 519 520 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 521 /// such that the argument will be passed in memory. 522 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 523 524 /// \brief Return the alignment to use for the given type on the stack. 525 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 526 527 Class classify(QualType Ty) const; 528 ABIArgInfo classifyReturnType(QualType RetTy, 529 unsigned callingConvention) const; 530 ABIArgInfo classifyArgumentTypeWithReg(QualType RetTy, 531 unsigned &FreeRegs) const; 532 ABIArgInfo classifyArgumentType(QualType RetTy) const; 533 534public: 535 536 virtual void computeInfo(CGFunctionInfo &FI) const; 537 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 538 CodeGenFunction &CGF) const; 539 540 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m, bool w, 541 unsigned r) 542 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 543 IsMMXDisabled(m), IsWin32FloatStructABI(w), 544 DefaultNumRegisterParameters(r) {} 545}; 546 547class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 548public: 549 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, 550 bool d, bool p, bool m, bool w, unsigned r) 551 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m, w, r)) {} 552 553 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 554 CodeGen::CodeGenModule &CGM) const; 555 556 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 557 // Darwin uses different dwarf register numbers for EH. 558 if (CGM.isTargetDarwin()) return 5; 559 560 return 4; 561 } 562 563 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 564 llvm::Value *Address) const; 565 566 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 567 StringRef Constraint, 568 llvm::Type* Ty) const { 569 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 570 } 571 572}; 573 574} 575 576/// shouldReturnTypeInRegister - Determine if the given type should be 577/// passed in a register (for the Darwin ABI). 578bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 579 ASTContext &Context, 580 unsigned callingConvention) { 581 uint64_t Size = Context.getTypeSize(Ty); 582 583 // Type must be register sized. 584 if (!isRegisterSize(Size)) 585 return false; 586 587 if (Ty->isVectorType()) { 588 // 64- and 128- bit vectors inside structures are not returned in 589 // registers. 590 if (Size == 64 || Size == 128) 591 return false; 592 593 return true; 594 } 595 596 // If this is a builtin, pointer, enum, complex type, member pointer, or 597 // member function pointer it is ok. 598 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 599 Ty->isAnyComplexType() || Ty->isEnumeralType() || 600 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 601 return true; 602 603 // Arrays are treated like records. 604 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 605 return shouldReturnTypeInRegister(AT->getElementType(), Context, 606 callingConvention); 607 608 // Otherwise, it must be a record type. 609 const RecordType *RT = Ty->getAs<RecordType>(); 610 if (!RT) return false; 611 612 // FIXME: Traverse bases here too. 613 614 // For thiscall conventions, structures will never be returned in 615 // a register. This is for compatibility with the MSVC ABI 616 if (callingConvention == llvm::CallingConv::X86_ThisCall && 617 RT->isStructureType()) { 618 return false; 619 } 620 621 // Structure types are passed in register if all fields would be 622 // passed in a register. 623 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 624 e = RT->getDecl()->field_end(); i != e; ++i) { 625 const FieldDecl *FD = *i; 626 627 // Empty fields are ignored. 628 if (isEmptyField(Context, FD, true)) 629 continue; 630 631 // Check fields recursively. 632 if (!shouldReturnTypeInRegister(FD->getType(), Context, 633 callingConvention)) 634 return false; 635 } 636 return true; 637} 638 639ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 640 unsigned callingConvention) const { 641 if (RetTy->isVoidType()) 642 return ABIArgInfo::getIgnore(); 643 644 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 645 // On Darwin, some vectors are returned in registers. 646 if (IsDarwinVectorABI) { 647 uint64_t Size = getContext().getTypeSize(RetTy); 648 649 // 128-bit vectors are a special case; they are returned in 650 // registers and we need to make sure to pick a type the LLVM 651 // backend will like. 652 if (Size == 128) 653 return ABIArgInfo::getDirect(llvm::VectorType::get( 654 llvm::Type::getInt64Ty(getVMContext()), 2)); 655 656 // Always return in register if it fits in a general purpose 657 // register, or if it is 64 bits and has a single element. 658 if ((Size == 8 || Size == 16 || Size == 32) || 659 (Size == 64 && VT->getNumElements() == 1)) 660 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 661 Size)); 662 663 return ABIArgInfo::getIndirect(0); 664 } 665 666 return ABIArgInfo::getDirect(); 667 } 668 669 if (isAggregateTypeForABI(RetTy)) { 670 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 671 // Structures with either a non-trivial destructor or a non-trivial 672 // copy constructor are always indirect. 673 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 674 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 675 676 // Structures with flexible arrays are always indirect. 677 if (RT->getDecl()->hasFlexibleArrayMember()) 678 return ABIArgInfo::getIndirect(0); 679 } 680 681 // If specified, structs and unions are always indirect. 682 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 683 return ABIArgInfo::getIndirect(0); 684 685 // Small structures which are register sized are generally returned 686 // in a register. 687 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext(), 688 callingConvention)) { 689 uint64_t Size = getContext().getTypeSize(RetTy); 690 691 // As a special-case, if the struct is a "single-element" struct, and 692 // the field is of type "float" or "double", return it in a 693 // floating-point register. (MSVC does not apply this special case.) 694 // We apply a similar transformation for pointer types to improve the 695 // quality of the generated IR. 696 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) 697 if ((!IsWin32FloatStructABI && SeltTy->isRealFloatingType()) 698 || SeltTy->hasPointerRepresentation()) 699 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0))); 700 701 // FIXME: We should be able to narrow this integer in cases with dead 702 // padding. 703 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 704 } 705 706 return ABIArgInfo::getIndirect(0); 707 } 708 709 // Treat an enum type as its underlying type. 710 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 711 RetTy = EnumTy->getDecl()->getIntegerType(); 712 713 return (RetTy->isPromotableIntegerType() ? 714 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 715} 716 717static bool isSSEVectorType(ASTContext &Context, QualType Ty) { 718 return Ty->getAs<VectorType>() && Context.getTypeSize(Ty) == 128; 719} 720 721static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 722 const RecordType *RT = Ty->getAs<RecordType>(); 723 if (!RT) 724 return 0; 725 const RecordDecl *RD = RT->getDecl(); 726 727 // If this is a C++ record, check the bases first. 728 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 729 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 730 e = CXXRD->bases_end(); i != e; ++i) 731 if (!isRecordWithSSEVectorType(Context, i->getType())) 732 return false; 733 734 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 735 i != e; ++i) { 736 QualType FT = i->getType(); 737 738 if (isSSEVectorType(Context, FT)) 739 return true; 740 741 if (isRecordWithSSEVectorType(Context, FT)) 742 return true; 743 } 744 745 return false; 746} 747 748unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 749 unsigned Align) const { 750 // Otherwise, if the alignment is less than or equal to the minimum ABI 751 // alignment, just use the default; the backend will handle this. 752 if (Align <= MinABIStackAlignInBytes) 753 return 0; // Use default alignment. 754 755 // On non-Darwin, the stack type alignment is always 4. 756 if (!IsDarwinVectorABI) { 757 // Set explicit alignment, since we may need to realign the top. 758 return MinABIStackAlignInBytes; 759 } 760 761 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 762 if (Align >= 16 && (isSSEVectorType(getContext(), Ty) || 763 isRecordWithSSEVectorType(getContext(), Ty))) 764 return 16; 765 766 return MinABIStackAlignInBytes; 767} 768 769ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 770 if (!ByVal) 771 return ABIArgInfo::getIndirect(0, false); 772 773 // Compute the byval alignment. 774 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 775 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 776 if (StackAlign == 0) 777 return ABIArgInfo::getIndirect(4); 778 779 // If the stack alignment is less than the type alignment, realign the 780 // argument. 781 if (StackAlign < TypeAlign) 782 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 783 /*Realign=*/true); 784 785 return ABIArgInfo::getIndirect(StackAlign); 786} 787 788X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const { 789 const Type *T = isSingleElementStruct(Ty, getContext()); 790 if (!T) 791 T = Ty.getTypePtr(); 792 793 if (const BuiltinType *BT = T->getAs<BuiltinType>()) { 794 BuiltinType::Kind K = BT->getKind(); 795 if (K == BuiltinType::Float || K == BuiltinType::Double) 796 return Float; 797 } 798 return Integer; 799} 800 801ABIArgInfo 802X86_32ABIInfo::classifyArgumentTypeWithReg(QualType Ty, 803 unsigned &FreeRegs) const { 804 // Common case first. 805 if (FreeRegs == 0) 806 return classifyArgumentType(Ty); 807 808 Class C = classify(Ty); 809 if (C == Float) 810 return classifyArgumentType(Ty); 811 812 unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32; 813 if (SizeInRegs == 0) 814 return classifyArgumentType(Ty); 815 816 if (SizeInRegs > FreeRegs) { 817 FreeRegs = 0; 818 return classifyArgumentType(Ty); 819 } 820 assert(SizeInRegs >= 1 && SizeInRegs <= 3); 821 FreeRegs -= SizeInRegs; 822 823 // If it is a simple scalar, keep the type so that we produce a cleaner IR. 824 ABIArgInfo Foo = classifyArgumentType(Ty); 825 if (Foo.isDirect() && !Foo.getDirectOffset() && !Foo.getPaddingType()) 826 return ABIArgInfo::getDirectInReg(Foo.getCoerceToType()); 827 if (Foo.isExtend()) 828 return ABIArgInfo::getExtendInReg(Foo.getCoerceToType()); 829 830 llvm::LLVMContext &LLVMContext = getVMContext(); 831 llvm::Type *Int32 = llvm::Type::getInt32Ty(LLVMContext); 832 SmallVector<llvm::Type*, 3> Elements; 833 for (unsigned I = 0; I < SizeInRegs; ++I) 834 Elements.push_back(Int32); 835 llvm::Type *Result = llvm::StructType::get(LLVMContext, Elements); 836 return ABIArgInfo::getDirectInReg(Result); 837} 838 839ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 840 // FIXME: Set alignment on indirect arguments. 841 if (isAggregateTypeForABI(Ty)) { 842 // Structures with flexible arrays are always indirect. 843 if (const RecordType *RT = Ty->getAs<RecordType>()) { 844 // Structures with either a non-trivial destructor or a non-trivial 845 // copy constructor are always indirect. 846 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 847 return getIndirectResult(Ty, /*ByVal=*/false); 848 849 if (RT->getDecl()->hasFlexibleArrayMember()) 850 return getIndirectResult(Ty); 851 } 852 853 // Ignore empty structs/unions. 854 if (isEmptyRecord(getContext(), Ty, true)) 855 return ABIArgInfo::getIgnore(); 856 857 // Expand small (<= 128-bit) record types when we know that the stack layout 858 // of those arguments will match the struct. This is important because the 859 // LLVM backend isn't smart enough to remove byval, which inhibits many 860 // optimizations. 861 if (getContext().getTypeSize(Ty) <= 4*32 && 862 canExpandIndirectArgument(Ty, getContext())) 863 return ABIArgInfo::getExpand(); 864 865 return getIndirectResult(Ty); 866 } 867 868 if (const VectorType *VT = Ty->getAs<VectorType>()) { 869 // On Darwin, some vectors are passed in memory, we handle this by passing 870 // it as an i8/i16/i32/i64. 871 if (IsDarwinVectorABI) { 872 uint64_t Size = getContext().getTypeSize(Ty); 873 if ((Size == 8 || Size == 16 || Size == 32) || 874 (Size == 64 && VT->getNumElements() == 1)) 875 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 876 Size)); 877 } 878 879 llvm::Type *IRType = CGT.ConvertType(Ty); 880 if (UseX86_MMXType(IRType)) { 881 if (IsMMXDisabled) 882 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 883 64)); 884 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType); 885 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext())); 886 return AAI; 887 } 888 889 return ABIArgInfo::getDirect(); 890 } 891 892 893 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 894 Ty = EnumTy->getDecl()->getIntegerType(); 895 896 return (Ty->isPromotableIntegerType() ? 897 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 898} 899 900void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const { 901 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 902 FI.getCallingConvention()); 903 904 unsigned FreeRegs = FI.getHasRegParm() ? FI.getRegParm() : 905 DefaultNumRegisterParameters; 906 907 // If the return value is indirect, then the hidden argument is consuming one 908 // integer register. 909 if (FI.getReturnInfo().isIndirect() && FreeRegs) { 910 --FreeRegs; 911 ABIArgInfo &Old = FI.getReturnInfo(); 912 Old = ABIArgInfo::getIndirectInReg(Old.getIndirectAlign(), 913 Old.getIndirectByVal(), 914 Old.getIndirectRealign()); 915 } 916 917 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 918 it != ie; ++it) 919 it->info = classifyArgumentTypeWithReg(it->type, FreeRegs); 920} 921 922llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 923 CodeGenFunction &CGF) const { 924 llvm::Type *BPP = CGF.Int8PtrPtrTy; 925 926 CGBuilderTy &Builder = CGF.Builder; 927 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 928 "ap"); 929 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 930 931 // Compute if the address needs to be aligned 932 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity(); 933 Align = getTypeStackAlignInBytes(Ty, Align); 934 Align = std::max(Align, 4U); 935 if (Align > 4) { 936 // addr = (addr + align - 1) & -align; 937 llvm::Value *Offset = 938 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1); 939 Addr = CGF.Builder.CreateGEP(Addr, Offset); 940 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr, 941 CGF.Int32Ty); 942 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align); 943 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 944 Addr->getType(), 945 "ap.cur.aligned"); 946 } 947 948 llvm::Type *PTy = 949 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 950 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 951 952 uint64_t Offset = 953 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align); 954 llvm::Value *NextAddr = 955 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 956 "ap.next"); 957 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 958 959 return AddrTyped; 960} 961 962void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 963 llvm::GlobalValue *GV, 964 CodeGen::CodeGenModule &CGM) const { 965 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 966 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 967 // Get the LLVM function. 968 llvm::Function *Fn = cast<llvm::Function>(GV); 969 970 // Now add the 'alignstack' attribute with a value of 16. 971 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 972 } 973 } 974} 975 976bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 977 CodeGen::CodeGenFunction &CGF, 978 llvm::Value *Address) const { 979 CodeGen::CGBuilderTy &Builder = CGF.Builder; 980 981 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 982 983 // 0-7 are the eight integer registers; the order is different 984 // on Darwin (for EH), but the range is the same. 985 // 8 is %eip. 986 AssignToArrayRange(Builder, Address, Four8, 0, 8); 987 988 if (CGF.CGM.isTargetDarwin()) { 989 // 12-16 are st(0..4). Not sure why we stop at 4. 990 // These have size 16, which is sizeof(long double) on 991 // platforms with 8-byte alignment for that type. 992 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 993 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 994 995 } else { 996 // 9 is %eflags, which doesn't get a size on Darwin for some 997 // reason. 998 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 999 1000 // 11-16 are st(0..5). Not sure why we stop at 5. 1001 // These have size 12, which is sizeof(long double) on 1002 // platforms with 4-byte alignment for that type. 1003 llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12); 1004 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 1005 } 1006 1007 return false; 1008} 1009 1010//===----------------------------------------------------------------------===// 1011// X86-64 ABI Implementation 1012//===----------------------------------------------------------------------===// 1013 1014 1015namespace { 1016/// X86_64ABIInfo - The X86_64 ABI information. 1017class X86_64ABIInfo : public ABIInfo { 1018 enum Class { 1019 Integer = 0, 1020 SSE, 1021 SSEUp, 1022 X87, 1023 X87Up, 1024 ComplexX87, 1025 NoClass, 1026 Memory 1027 }; 1028 1029 /// merge - Implement the X86_64 ABI merging algorithm. 1030 /// 1031 /// Merge an accumulating classification \arg Accum with a field 1032 /// classification \arg Field. 1033 /// 1034 /// \param Accum - The accumulating classification. This should 1035 /// always be either NoClass or the result of a previous merge 1036 /// call. In addition, this should never be Memory (the caller 1037 /// should just return Memory for the aggregate). 1038 static Class merge(Class Accum, Class Field); 1039 1040 /// postMerge - Implement the X86_64 ABI post merging algorithm. 1041 /// 1042 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 1043 /// final MEMORY or SSE classes when necessary. 1044 /// 1045 /// \param AggregateSize - The size of the current aggregate in 1046 /// the classification process. 1047 /// 1048 /// \param Lo - The classification for the parts of the type 1049 /// residing in the low word of the containing object. 1050 /// 1051 /// \param Hi - The classification for the parts of the type 1052 /// residing in the higher words of the containing object. 1053 /// 1054 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 1055 1056 /// classify - Determine the x86_64 register classes in which the 1057 /// given type T should be passed. 1058 /// 1059 /// \param Lo - The classification for the parts of the type 1060 /// residing in the low word of the containing object. 1061 /// 1062 /// \param Hi - The classification for the parts of the type 1063 /// residing in the high word of the containing object. 1064 /// 1065 /// \param OffsetBase - The bit offset of this type in the 1066 /// containing object. Some parameters are classified different 1067 /// depending on whether they straddle an eightbyte boundary. 1068 /// 1069 /// If a word is unused its result will be NoClass; if a type should 1070 /// be passed in Memory then at least the classification of \arg Lo 1071 /// will be Memory. 1072 /// 1073 /// The \arg Lo class will be NoClass iff the argument is ignored. 1074 /// 1075 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 1076 /// also be ComplexX87. 1077 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 1078 1079 llvm::Type *GetByteVectorType(QualType Ty) const; 1080 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 1081 unsigned IROffset, QualType SourceTy, 1082 unsigned SourceOffset) const; 1083 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 1084 unsigned IROffset, QualType SourceTy, 1085 unsigned SourceOffset) const; 1086 1087 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1088 /// such that the argument will be returned in memory. 1089 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 1090 1091 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1092 /// such that the argument will be passed in memory. 1093 /// 1094 /// \param freeIntRegs - The number of free integer registers remaining 1095 /// available. 1096 ABIArgInfo getIndirectResult(QualType Ty, unsigned freeIntRegs) const; 1097 1098 ABIArgInfo classifyReturnType(QualType RetTy) const; 1099 1100 ABIArgInfo classifyArgumentType(QualType Ty, 1101 unsigned freeIntRegs, 1102 unsigned &neededInt, 1103 unsigned &neededSSE) const; 1104 1105 bool IsIllegalVectorType(QualType Ty) const; 1106 1107 /// The 0.98 ABI revision clarified a lot of ambiguities, 1108 /// unfortunately in ways that were not always consistent with 1109 /// certain previous compilers. In particular, platforms which 1110 /// required strict binary compatibility with older versions of GCC 1111 /// may need to exempt themselves. 1112 bool honorsRevision0_98() const { 1113 return !getContext().getTargetInfo().getTriple().isOSDarwin(); 1114 } 1115 1116 bool HasAVX; 1117 1118public: 1119 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) : 1120 ABIInfo(CGT), HasAVX(hasavx) {} 1121 1122 bool isPassedUsingAVXType(QualType type) const { 1123 unsigned neededInt, neededSSE; 1124 // The freeIntRegs argument doesn't matter here. 1125 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE); 1126 if (info.isDirect()) { 1127 llvm::Type *ty = info.getCoerceToType(); 1128 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty)) 1129 return (vectorTy->getBitWidth() > 128); 1130 } 1131 return false; 1132 } 1133 1134 virtual void computeInfo(CGFunctionInfo &FI) const; 1135 1136 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1137 CodeGenFunction &CGF) const; 1138}; 1139 1140/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 1141class WinX86_64ABIInfo : public ABIInfo { 1142 1143 ABIArgInfo classify(QualType Ty) const; 1144 1145public: 1146 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 1147 1148 virtual void computeInfo(CGFunctionInfo &FI) const; 1149 1150 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1151 CodeGenFunction &CGF) const; 1152}; 1153 1154class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1155public: 1156 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 1157 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {} 1158 1159 const X86_64ABIInfo &getABIInfo() const { 1160 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 1161 } 1162 1163 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1164 return 7; 1165 } 1166 1167 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1168 llvm::Value *Address) const { 1169 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1170 1171 // 0-15 are the 16 integer registers. 1172 // 16 is %rip. 1173 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1174 return false; 1175 } 1176 1177 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 1178 StringRef Constraint, 1179 llvm::Type* Ty) const { 1180 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 1181 } 1182 1183 bool isNoProtoCallVariadic(const CallArgList &args, 1184 const FunctionNoProtoType *fnType) const { 1185 // The default CC on x86-64 sets %al to the number of SSA 1186 // registers used, and GCC sets this when calling an unprototyped 1187 // function, so we override the default behavior. However, don't do 1188 // that when AVX types are involved: the ABI explicitly states it is 1189 // undefined, and it doesn't work in practice because of how the ABI 1190 // defines varargs anyway. 1191 if (fnType->getCallConv() == CC_Default || fnType->getCallConv() == CC_C) { 1192 bool HasAVXType = false; 1193 for (CallArgList::const_iterator 1194 it = args.begin(), ie = args.end(); it != ie; ++it) { 1195 if (getABIInfo().isPassedUsingAVXType(it->Ty)) { 1196 HasAVXType = true; 1197 break; 1198 } 1199 } 1200 1201 if (!HasAVXType) 1202 return true; 1203 } 1204 1205 return TargetCodeGenInfo::isNoProtoCallVariadic(args, fnType); 1206 } 1207 1208}; 1209 1210class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1211public: 1212 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 1213 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 1214 1215 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1216 return 7; 1217 } 1218 1219 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1220 llvm::Value *Address) const { 1221 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1222 1223 // 0-15 are the 16 integer registers. 1224 // 16 is %rip. 1225 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1226 return false; 1227 } 1228}; 1229 1230} 1231 1232void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 1233 Class &Hi) const { 1234 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1235 // 1236 // (a) If one of the classes is Memory, the whole argument is passed in 1237 // memory. 1238 // 1239 // (b) If X87UP is not preceded by X87, the whole argument is passed in 1240 // memory. 1241 // 1242 // (c) If the size of the aggregate exceeds two eightbytes and the first 1243 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 1244 // argument is passed in memory. NOTE: This is necessary to keep the 1245 // ABI working for processors that don't support the __m256 type. 1246 // 1247 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1248 // 1249 // Some of these are enforced by the merging logic. Others can arise 1250 // only with unions; for example: 1251 // union { _Complex double; unsigned; } 1252 // 1253 // Note that clauses (b) and (c) were added in 0.98. 1254 // 1255 if (Hi == Memory) 1256 Lo = Memory; 1257 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1258 Lo = Memory; 1259 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1260 Lo = Memory; 1261 if (Hi == SSEUp && Lo != SSE) 1262 Hi = SSE; 1263} 1264 1265X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1266 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1267 // classified recursively so that always two fields are 1268 // considered. The resulting class is calculated according to 1269 // the classes of the fields in the eightbyte: 1270 // 1271 // (a) If both classes are equal, this is the resulting class. 1272 // 1273 // (b) If one of the classes is NO_CLASS, the resulting class is 1274 // the other class. 1275 // 1276 // (c) If one of the classes is MEMORY, the result is the MEMORY 1277 // class. 1278 // 1279 // (d) If one of the classes is INTEGER, the result is the 1280 // INTEGER. 1281 // 1282 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1283 // MEMORY is used as class. 1284 // 1285 // (f) Otherwise class SSE is used. 1286 1287 // Accum should never be memory (we should have returned) or 1288 // ComplexX87 (because this cannot be passed in a structure). 1289 assert((Accum != Memory && Accum != ComplexX87) && 1290 "Invalid accumulated classification during merge."); 1291 if (Accum == Field || Field == NoClass) 1292 return Accum; 1293 if (Field == Memory) 1294 return Memory; 1295 if (Accum == NoClass) 1296 return Field; 1297 if (Accum == Integer || Field == Integer) 1298 return Integer; 1299 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1300 Accum == X87 || Accum == X87Up) 1301 return Memory; 1302 return SSE; 1303} 1304 1305void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1306 Class &Lo, Class &Hi) const { 1307 // FIXME: This code can be simplified by introducing a simple value class for 1308 // Class pairs with appropriate constructor methods for the various 1309 // situations. 1310 1311 // FIXME: Some of the split computations are wrong; unaligned vectors 1312 // shouldn't be passed in registers for example, so there is no chance they 1313 // can straddle an eightbyte. Verify & simplify. 1314 1315 Lo = Hi = NoClass; 1316 1317 Class &Current = OffsetBase < 64 ? Lo : Hi; 1318 Current = Memory; 1319 1320 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1321 BuiltinType::Kind k = BT->getKind(); 1322 1323 if (k == BuiltinType::Void) { 1324 Current = NoClass; 1325 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1326 Lo = Integer; 1327 Hi = Integer; 1328 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1329 Current = Integer; 1330 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 1331 Current = SSE; 1332 } else if (k == BuiltinType::LongDouble) { 1333 Lo = X87; 1334 Hi = X87Up; 1335 } 1336 // FIXME: _Decimal32 and _Decimal64 are SSE. 1337 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1338 return; 1339 } 1340 1341 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1342 // Classify the underlying integer type. 1343 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1344 return; 1345 } 1346 1347 if (Ty->hasPointerRepresentation()) { 1348 Current = Integer; 1349 return; 1350 } 1351 1352 if (Ty->isMemberPointerType()) { 1353 if (Ty->isMemberFunctionPointerType()) 1354 Lo = Hi = Integer; 1355 else 1356 Current = Integer; 1357 return; 1358 } 1359 1360 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1361 uint64_t Size = getContext().getTypeSize(VT); 1362 if (Size == 32) { 1363 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1364 // float> as integer. 1365 Current = Integer; 1366 1367 // If this type crosses an eightbyte boundary, it should be 1368 // split. 1369 uint64_t EB_Real = (OffsetBase) / 64; 1370 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1371 if (EB_Real != EB_Imag) 1372 Hi = Lo; 1373 } else if (Size == 64) { 1374 // gcc passes <1 x double> in memory. :( 1375 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1376 return; 1377 1378 // gcc passes <1 x long long> as INTEGER. 1379 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1380 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1381 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1382 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1383 Current = Integer; 1384 else 1385 Current = SSE; 1386 1387 // If this type crosses an eightbyte boundary, it should be 1388 // split. 1389 if (OffsetBase && OffsetBase != 64) 1390 Hi = Lo; 1391 } else if (Size == 128 || (HasAVX && Size == 256)) { 1392 // Arguments of 256-bits are split into four eightbyte chunks. The 1393 // least significant one belongs to class SSE and all the others to class 1394 // SSEUP. The original Lo and Hi design considers that types can't be 1395 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1396 // This design isn't correct for 256-bits, but since there're no cases 1397 // where the upper parts would need to be inspected, avoid adding 1398 // complexity and just consider Hi to match the 64-256 part. 1399 Lo = SSE; 1400 Hi = SSEUp; 1401 } 1402 return; 1403 } 1404 1405 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1406 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1407 1408 uint64_t Size = getContext().getTypeSize(Ty); 1409 if (ET->isIntegralOrEnumerationType()) { 1410 if (Size <= 64) 1411 Current = Integer; 1412 else if (Size <= 128) 1413 Lo = Hi = Integer; 1414 } else if (ET == getContext().FloatTy) 1415 Current = SSE; 1416 else if (ET == getContext().DoubleTy) 1417 Lo = Hi = SSE; 1418 else if (ET == getContext().LongDoubleTy) 1419 Current = ComplexX87; 1420 1421 // If this complex type crosses an eightbyte boundary then it 1422 // should be split. 1423 uint64_t EB_Real = (OffsetBase) / 64; 1424 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1425 if (Hi == NoClass && EB_Real != EB_Imag) 1426 Hi = Lo; 1427 1428 return; 1429 } 1430 1431 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1432 // Arrays are treated like structures. 1433 1434 uint64_t Size = getContext().getTypeSize(Ty); 1435 1436 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1437 // than four eightbytes, ..., it has class MEMORY. 1438 if (Size > 256) 1439 return; 1440 1441 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1442 // fields, it has class MEMORY. 1443 // 1444 // Only need to check alignment of array base. 1445 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1446 return; 1447 1448 // Otherwise implement simplified merge. We could be smarter about 1449 // this, but it isn't worth it and would be harder to verify. 1450 Current = NoClass; 1451 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1452 uint64_t ArraySize = AT->getSize().getZExtValue(); 1453 1454 // The only case a 256-bit wide vector could be used is when the array 1455 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1456 // to work for sizes wider than 128, early check and fallback to memory. 1457 if (Size > 128 && EltSize != 256) 1458 return; 1459 1460 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1461 Class FieldLo, FieldHi; 1462 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1463 Lo = merge(Lo, FieldLo); 1464 Hi = merge(Hi, FieldHi); 1465 if (Lo == Memory || Hi == Memory) 1466 break; 1467 } 1468 1469 postMerge(Size, Lo, Hi); 1470 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1471 return; 1472 } 1473 1474 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1475 uint64_t Size = getContext().getTypeSize(Ty); 1476 1477 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1478 // than four eightbytes, ..., it has class MEMORY. 1479 if (Size > 256) 1480 return; 1481 1482 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1483 // copy constructor or a non-trivial destructor, it is passed by invisible 1484 // reference. 1485 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1486 return; 1487 1488 const RecordDecl *RD = RT->getDecl(); 1489 1490 // Assume variable sized types are passed in memory. 1491 if (RD->hasFlexibleArrayMember()) 1492 return; 1493 1494 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1495 1496 // Reset Lo class, this will be recomputed. 1497 Current = NoClass; 1498 1499 // If this is a C++ record, classify the bases first. 1500 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1501 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1502 e = CXXRD->bases_end(); i != e; ++i) { 1503 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1504 "Unexpected base class!"); 1505 const CXXRecordDecl *Base = 1506 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1507 1508 // Classify this field. 1509 // 1510 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1511 // single eightbyte, each is classified separately. Each eightbyte gets 1512 // initialized to class NO_CLASS. 1513 Class FieldLo, FieldHi; 1514 uint64_t Offset = 1515 OffsetBase + getContext().toBits(Layout.getBaseClassOffset(Base)); 1516 classify(i->getType(), Offset, FieldLo, FieldHi); 1517 Lo = merge(Lo, FieldLo); 1518 Hi = merge(Hi, FieldHi); 1519 if (Lo == Memory || Hi == Memory) 1520 break; 1521 } 1522 } 1523 1524 // Classify the fields one at a time, merging the results. 1525 unsigned idx = 0; 1526 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1527 i != e; ++i, ++idx) { 1528 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1529 bool BitField = i->isBitField(); 1530 1531 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 1532 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 1533 // 1534 // The only case a 256-bit wide vector could be used is when the struct 1535 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1536 // to work for sizes wider than 128, early check and fallback to memory. 1537 // 1538 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 1539 Lo = Memory; 1540 return; 1541 } 1542 // Note, skip this test for bit-fields, see below. 1543 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1544 Lo = Memory; 1545 return; 1546 } 1547 1548 // Classify this field. 1549 // 1550 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1551 // exceeds a single eightbyte, each is classified 1552 // separately. Each eightbyte gets initialized to class 1553 // NO_CLASS. 1554 Class FieldLo, FieldHi; 1555 1556 // Bit-fields require special handling, they do not force the 1557 // structure to be passed in memory even if unaligned, and 1558 // therefore they can straddle an eightbyte. 1559 if (BitField) { 1560 // Ignore padding bit-fields. 1561 if (i->isUnnamedBitfield()) 1562 continue; 1563 1564 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1565 uint64_t Size = i->getBitWidthValue(getContext()); 1566 1567 uint64_t EB_Lo = Offset / 64; 1568 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1569 FieldLo = FieldHi = NoClass; 1570 if (EB_Lo) { 1571 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1572 FieldLo = NoClass; 1573 FieldHi = Integer; 1574 } else { 1575 FieldLo = Integer; 1576 FieldHi = EB_Hi ? Integer : NoClass; 1577 } 1578 } else 1579 classify(i->getType(), Offset, FieldLo, FieldHi); 1580 Lo = merge(Lo, FieldLo); 1581 Hi = merge(Hi, FieldHi); 1582 if (Lo == Memory || Hi == Memory) 1583 break; 1584 } 1585 1586 postMerge(Size, Lo, Hi); 1587 } 1588} 1589 1590ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1591 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1592 // place naturally. 1593 if (!isAggregateTypeForABI(Ty)) { 1594 // Treat an enum type as its underlying type. 1595 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1596 Ty = EnumTy->getDecl()->getIntegerType(); 1597 1598 return (Ty->isPromotableIntegerType() ? 1599 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1600 } 1601 1602 return ABIArgInfo::getIndirect(0); 1603} 1604 1605bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const { 1606 if (const VectorType *VecTy = Ty->getAs<VectorType>()) { 1607 uint64_t Size = getContext().getTypeSize(VecTy); 1608 unsigned LargestVector = HasAVX ? 256 : 128; 1609 if (Size <= 64 || Size > LargestVector) 1610 return true; 1611 } 1612 1613 return false; 1614} 1615 1616ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 1617 unsigned freeIntRegs) const { 1618 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1619 // place naturally. 1620 // 1621 // This assumption is optimistic, as there could be free registers available 1622 // when we need to pass this argument in memory, and LLVM could try to pass 1623 // the argument in the free register. This does not seem to happen currently, 1624 // but this code would be much safer if we could mark the argument with 1625 // 'onstack'. See PR12193. 1626 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) { 1627 // Treat an enum type as its underlying type. 1628 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1629 Ty = EnumTy->getDecl()->getIntegerType(); 1630 1631 return (Ty->isPromotableIntegerType() ? 1632 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1633 } 1634 1635 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1636 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1637 1638 // Compute the byval alignment. We specify the alignment of the byval in all 1639 // cases so that the mid-level optimizer knows the alignment of the byval. 1640 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1641 1642 // Attempt to avoid passing indirect results using byval when possible. This 1643 // is important for good codegen. 1644 // 1645 // We do this by coercing the value into a scalar type which the backend can 1646 // handle naturally (i.e., without using byval). 1647 // 1648 // For simplicity, we currently only do this when we have exhausted all of the 1649 // free integer registers. Doing this when there are free integer registers 1650 // would require more care, as we would have to ensure that the coerced value 1651 // did not claim the unused register. That would require either reording the 1652 // arguments to the function (so that any subsequent inreg values came first), 1653 // or only doing this optimization when there were no following arguments that 1654 // might be inreg. 1655 // 1656 // We currently expect it to be rare (particularly in well written code) for 1657 // arguments to be passed on the stack when there are still free integer 1658 // registers available (this would typically imply large structs being passed 1659 // by value), so this seems like a fair tradeoff for now. 1660 // 1661 // We can revisit this if the backend grows support for 'onstack' parameter 1662 // attributes. See PR12193. 1663 if (freeIntRegs == 0) { 1664 uint64_t Size = getContext().getTypeSize(Ty); 1665 1666 // If this type fits in an eightbyte, coerce it into the matching integral 1667 // type, which will end up on the stack (with alignment 8). 1668 if (Align == 8 && Size <= 64) 1669 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 1670 Size)); 1671 } 1672 1673 return ABIArgInfo::getIndirect(Align); 1674} 1675 1676/// GetByteVectorType - The ABI specifies that a value should be passed in an 1677/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a 1678/// vector register. 1679llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 1680 llvm::Type *IRType = CGT.ConvertType(Ty); 1681 1682 // Wrapper structs that just contain vectors are passed just like vectors, 1683 // strip them off if present. 1684 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1685 while (STy && STy->getNumElements() == 1) { 1686 IRType = STy->getElementType(0); 1687 STy = dyn_cast<llvm::StructType>(IRType); 1688 } 1689 1690 // If the preferred type is a 16-byte vector, prefer to pass it. 1691 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1692 llvm::Type *EltTy = VT->getElementType(); 1693 unsigned BitWidth = VT->getBitWidth(); 1694 if ((BitWidth >= 128 && BitWidth <= 256) && 1695 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1696 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1697 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1698 EltTy->isIntegerTy(128))) 1699 return VT; 1700 } 1701 1702 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1703} 1704 1705/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1706/// is known to either be off the end of the specified type or being in 1707/// alignment padding. The user type specified is known to be at most 128 bits 1708/// in size, and have passed through X86_64ABIInfo::classify with a successful 1709/// classification that put one of the two halves in the INTEGER class. 1710/// 1711/// It is conservatively correct to return false. 1712static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1713 unsigned EndBit, ASTContext &Context) { 1714 // If the bytes being queried are off the end of the type, there is no user 1715 // data hiding here. This handles analysis of builtins, vectors and other 1716 // types that don't contain interesting padding. 1717 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1718 if (TySize <= StartBit) 1719 return true; 1720 1721 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1722 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1723 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1724 1725 // Check each element to see if the element overlaps with the queried range. 1726 for (unsigned i = 0; i != NumElts; ++i) { 1727 // If the element is after the span we care about, then we're done.. 1728 unsigned EltOffset = i*EltSize; 1729 if (EltOffset >= EndBit) break; 1730 1731 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1732 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1733 EndBit-EltOffset, Context)) 1734 return false; 1735 } 1736 // If it overlaps no elements, then it is safe to process as padding. 1737 return true; 1738 } 1739 1740 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1741 const RecordDecl *RD = RT->getDecl(); 1742 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1743 1744 // If this is a C++ record, check the bases first. 1745 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1746 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1747 e = CXXRD->bases_end(); i != e; ++i) { 1748 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1749 "Unexpected base class!"); 1750 const CXXRecordDecl *Base = 1751 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1752 1753 // If the base is after the span we care about, ignore it. 1754 unsigned BaseOffset = Context.toBits(Layout.getBaseClassOffset(Base)); 1755 if (BaseOffset >= EndBit) continue; 1756 1757 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1758 if (!BitsContainNoUserData(i->getType(), BaseStart, 1759 EndBit-BaseOffset, Context)) 1760 return false; 1761 } 1762 } 1763 1764 // Verify that no field has data that overlaps the region of interest. Yes 1765 // this could be sped up a lot by being smarter about queried fields, 1766 // however we're only looking at structs up to 16 bytes, so we don't care 1767 // much. 1768 unsigned idx = 0; 1769 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1770 i != e; ++i, ++idx) { 1771 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1772 1773 // If we found a field after the region we care about, then we're done. 1774 if (FieldOffset >= EndBit) break; 1775 1776 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1777 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1778 Context)) 1779 return false; 1780 } 1781 1782 // If nothing in this record overlapped the area of interest, then we're 1783 // clean. 1784 return true; 1785 } 1786 1787 return false; 1788} 1789 1790/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1791/// float member at the specified offset. For example, {int,{float}} has a 1792/// float at offset 4. It is conservatively correct for this routine to return 1793/// false. 1794static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 1795 const llvm::TargetData &TD) { 1796 // Base case if we find a float. 1797 if (IROffset == 0 && IRType->isFloatTy()) 1798 return true; 1799 1800 // If this is a struct, recurse into the field at the specified offset. 1801 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1802 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1803 unsigned Elt = SL->getElementContainingOffset(IROffset); 1804 IROffset -= SL->getElementOffset(Elt); 1805 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1806 } 1807 1808 // If this is an array, recurse into the field at the specified offset. 1809 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1810 llvm::Type *EltTy = ATy->getElementType(); 1811 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1812 IROffset -= IROffset/EltSize*EltSize; 1813 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1814 } 1815 1816 return false; 1817} 1818 1819 1820/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1821/// low 8 bytes of an XMM register, corresponding to the SSE class. 1822llvm::Type *X86_64ABIInfo:: 1823GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1824 QualType SourceTy, unsigned SourceOffset) const { 1825 // The only three choices we have are either double, <2 x float>, or float. We 1826 // pass as float if the last 4 bytes is just padding. This happens for 1827 // structs that contain 3 floats. 1828 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1829 SourceOffset*8+64, getContext())) 1830 return llvm::Type::getFloatTy(getVMContext()); 1831 1832 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1833 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1834 // case. 1835 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1836 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1837 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1838 1839 return llvm::Type::getDoubleTy(getVMContext()); 1840} 1841 1842 1843/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1844/// an 8-byte GPR. This means that we either have a scalar or we are talking 1845/// about the high or low part of an up-to-16-byte struct. This routine picks 1846/// the best LLVM IR type to represent this, which may be i64 or may be anything 1847/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1848/// etc). 1849/// 1850/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1851/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1852/// the 8-byte value references. PrefType may be null. 1853/// 1854/// SourceTy is the source level type for the entire argument. SourceOffset is 1855/// an offset into this that we're processing (which is always either 0 or 8). 1856/// 1857llvm::Type *X86_64ABIInfo:: 1858GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1859 QualType SourceTy, unsigned SourceOffset) const { 1860 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1861 // returning an 8-byte unit starting with it. See if we can safely use it. 1862 if (IROffset == 0) { 1863 // Pointers and int64's always fill the 8-byte unit. 1864 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1865 return IRType; 1866 1867 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1868 // goodness in the source type is just tail padding. This is allowed to 1869 // kick in for struct {double,int} on the int, but not on 1870 // struct{double,int,int} because we wouldn't return the second int. We 1871 // have to do this analysis on the source type because we can't depend on 1872 // unions being lowered a specific way etc. 1873 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1874 IRType->isIntegerTy(32)) { 1875 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1876 1877 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1878 SourceOffset*8+64, getContext())) 1879 return IRType; 1880 } 1881 } 1882 1883 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1884 // If this is a struct, recurse into the field at the specified offset. 1885 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1886 if (IROffset < SL->getSizeInBytes()) { 1887 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1888 IROffset -= SL->getElementOffset(FieldIdx); 1889 1890 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1891 SourceTy, SourceOffset); 1892 } 1893 } 1894 1895 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1896 llvm::Type *EltTy = ATy->getElementType(); 1897 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1898 unsigned EltOffset = IROffset/EltSize*EltSize; 1899 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1900 SourceOffset); 1901 } 1902 1903 // Okay, we don't have any better idea of what to pass, so we pass this in an 1904 // integer register that isn't too big to fit the rest of the struct. 1905 unsigned TySizeInBytes = 1906 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1907 1908 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1909 1910 // It is always safe to classify this as an integer type up to i64 that 1911 // isn't larger than the structure. 1912 return llvm::IntegerType::get(getVMContext(), 1913 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1914} 1915 1916 1917/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 1918/// be used as elements of a two register pair to pass or return, return a 1919/// first class aggregate to represent them. For example, if the low part of 1920/// a by-value argument should be passed as i32* and the high part as float, 1921/// return {i32*, float}. 1922static llvm::Type * 1923GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 1924 const llvm::TargetData &TD) { 1925 // In order to correctly satisfy the ABI, we need to the high part to start 1926 // at offset 8. If the high and low parts we inferred are both 4-byte types 1927 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 1928 // the second element at offset 8. Check for this: 1929 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 1930 unsigned HiAlign = TD.getABITypeAlignment(Hi); 1931 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign); 1932 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 1933 1934 // To handle this, we have to increase the size of the low part so that the 1935 // second element will start at an 8 byte offset. We can't increase the size 1936 // of the second element because it might make us access off the end of the 1937 // struct. 1938 if (HiStart != 8) { 1939 // There are only two sorts of types the ABI generation code can produce for 1940 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 1941 // Promote these to a larger type. 1942 if (Lo->isFloatTy()) 1943 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 1944 else { 1945 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 1946 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 1947 } 1948 } 1949 1950 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL); 1951 1952 1953 // Verify that the second element is at an 8-byte offset. 1954 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 1955 "Invalid x86-64 argument pair!"); 1956 return Result; 1957} 1958 1959ABIArgInfo X86_64ABIInfo:: 1960classifyReturnType(QualType RetTy) const { 1961 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1962 // classification algorithm. 1963 X86_64ABIInfo::Class Lo, Hi; 1964 classify(RetTy, 0, Lo, Hi); 1965 1966 // Check some invariants. 1967 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1968 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1969 1970 llvm::Type *ResType = 0; 1971 switch (Lo) { 1972 case NoClass: 1973 if (Hi == NoClass) 1974 return ABIArgInfo::getIgnore(); 1975 // If the low part is just padding, it takes no register, leave ResType 1976 // null. 1977 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1978 "Unknown missing lo part"); 1979 break; 1980 1981 case SSEUp: 1982 case X87Up: 1983 llvm_unreachable("Invalid classification for lo word."); 1984 1985 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1986 // hidden argument. 1987 case Memory: 1988 return getIndirectReturnResult(RetTy); 1989 1990 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1991 // available register of the sequence %rax, %rdx is used. 1992 case Integer: 1993 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1994 1995 // If we have a sign or zero extended integer, make sure to return Extend 1996 // so that the parameter gets the right LLVM IR attributes. 1997 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1998 // Treat an enum type as its underlying type. 1999 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2000 RetTy = EnumTy->getDecl()->getIntegerType(); 2001 2002 if (RetTy->isIntegralOrEnumerationType() && 2003 RetTy->isPromotableIntegerType()) 2004 return ABIArgInfo::getExtend(); 2005 } 2006 break; 2007 2008 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 2009 // available SSE register of the sequence %xmm0, %xmm1 is used. 2010 case SSE: 2011 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2012 break; 2013 2014 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 2015 // returned on the X87 stack in %st0 as 80-bit x87 number. 2016 case X87: 2017 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 2018 break; 2019 2020 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 2021 // part of the value is returned in %st0 and the imaginary part in 2022 // %st1. 2023 case ComplexX87: 2024 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 2025 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 2026 llvm::Type::getX86_FP80Ty(getVMContext()), 2027 NULL); 2028 break; 2029 } 2030 2031 llvm::Type *HighPart = 0; 2032 switch (Hi) { 2033 // Memory was handled previously and X87 should 2034 // never occur as a hi class. 2035 case Memory: 2036 case X87: 2037 llvm_unreachable("Invalid classification for hi word."); 2038 2039 case ComplexX87: // Previously handled. 2040 case NoClass: 2041 break; 2042 2043 case Integer: 2044 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2045 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2046 return ABIArgInfo::getDirect(HighPart, 8); 2047 break; 2048 case SSE: 2049 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2050 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2051 return ABIArgInfo::getDirect(HighPart, 8); 2052 break; 2053 2054 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 2055 // is passed in the next available eightbyte chunk if the last used 2056 // vector register. 2057 // 2058 // SSEUP should always be preceded by SSE, just widen. 2059 case SSEUp: 2060 assert(Lo == SSE && "Unexpected SSEUp classification."); 2061 ResType = GetByteVectorType(RetTy); 2062 break; 2063 2064 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 2065 // returned together with the previous X87 value in %st0. 2066 case X87Up: 2067 // If X87Up is preceded by X87, we don't need to do 2068 // anything. However, in some cases with unions it may not be 2069 // preceded by X87. In such situations we follow gcc and pass the 2070 // extra bits in an SSE reg. 2071 if (Lo != X87) { 2072 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2073 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2074 return ABIArgInfo::getDirect(HighPart, 8); 2075 } 2076 break; 2077 } 2078 2079 // If a high part was specified, merge it together with the low part. It is 2080 // known to pass in the high eightbyte of the result. We do this by forming a 2081 // first class struct aggregate with the high and low part: {low, high} 2082 if (HighPart) 2083 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 2084 2085 return ABIArgInfo::getDirect(ResType); 2086} 2087 2088ABIArgInfo X86_64ABIInfo::classifyArgumentType( 2089 QualType Ty, unsigned freeIntRegs, unsigned &neededInt, unsigned &neededSSE) 2090 const 2091{ 2092 X86_64ABIInfo::Class Lo, Hi; 2093 classify(Ty, 0, Lo, Hi); 2094 2095 // Check some invariants. 2096 // FIXME: Enforce these by construction. 2097 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2098 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2099 2100 neededInt = 0; 2101 neededSSE = 0; 2102 llvm::Type *ResType = 0; 2103 switch (Lo) { 2104 case NoClass: 2105 if (Hi == NoClass) 2106 return ABIArgInfo::getIgnore(); 2107 // If the low part is just padding, it takes no register, leave ResType 2108 // null. 2109 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2110 "Unknown missing lo part"); 2111 break; 2112 2113 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 2114 // on the stack. 2115 case Memory: 2116 2117 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 2118 // COMPLEX_X87, it is passed in memory. 2119 case X87: 2120 case ComplexX87: 2121 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2122 ++neededInt; 2123 return getIndirectResult(Ty, freeIntRegs); 2124 2125 case SSEUp: 2126 case X87Up: 2127 llvm_unreachable("Invalid classification for lo word."); 2128 2129 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 2130 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 2131 // and %r9 is used. 2132 case Integer: 2133 ++neededInt; 2134 2135 // Pick an 8-byte type based on the preferred type. 2136 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 2137 2138 // If we have a sign or zero extended integer, make sure to return Extend 2139 // so that the parameter gets the right LLVM IR attributes. 2140 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2141 // Treat an enum type as its underlying type. 2142 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2143 Ty = EnumTy->getDecl()->getIntegerType(); 2144 2145 if (Ty->isIntegralOrEnumerationType() && 2146 Ty->isPromotableIntegerType()) 2147 return ABIArgInfo::getExtend(); 2148 } 2149 2150 break; 2151 2152 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 2153 // available SSE register is used, the registers are taken in the 2154 // order from %xmm0 to %xmm7. 2155 case SSE: { 2156 llvm::Type *IRType = CGT.ConvertType(Ty); 2157 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 2158 ++neededSSE; 2159 break; 2160 } 2161 } 2162 2163 llvm::Type *HighPart = 0; 2164 switch (Hi) { 2165 // Memory was handled previously, ComplexX87 and X87 should 2166 // never occur as hi classes, and X87Up must be preceded by X87, 2167 // which is passed in memory. 2168 case Memory: 2169 case X87: 2170 case ComplexX87: 2171 llvm_unreachable("Invalid classification for hi word."); 2172 2173 case NoClass: break; 2174 2175 case Integer: 2176 ++neededInt; 2177 // Pick an 8-byte type based on the preferred type. 2178 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2179 2180 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2181 return ABIArgInfo::getDirect(HighPart, 8); 2182 break; 2183 2184 // X87Up generally doesn't occur here (long double is passed in 2185 // memory), except in situations involving unions. 2186 case X87Up: 2187 case SSE: 2188 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2189 2190 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2191 return ABIArgInfo::getDirect(HighPart, 8); 2192 2193 ++neededSSE; 2194 break; 2195 2196 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 2197 // eightbyte is passed in the upper half of the last used SSE 2198 // register. This only happens when 128-bit vectors are passed. 2199 case SSEUp: 2200 assert(Lo == SSE && "Unexpected SSEUp classification"); 2201 ResType = GetByteVectorType(Ty); 2202 break; 2203 } 2204 2205 // If a high part was specified, merge it together with the low part. It is 2206 // known to pass in the high eightbyte of the result. We do this by forming a 2207 // first class struct aggregate with the high and low part: {low, high} 2208 if (HighPart) 2209 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 2210 2211 return ABIArgInfo::getDirect(ResType); 2212} 2213 2214void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2215 2216 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2217 2218 // Keep track of the number of assigned registers. 2219 unsigned freeIntRegs = 6, freeSSERegs = 8; 2220 2221 // If the return value is indirect, then the hidden argument is consuming one 2222 // integer register. 2223 if (FI.getReturnInfo().isIndirect()) 2224 --freeIntRegs; 2225 2226 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 2227 // get assigned (in left-to-right order) for passing as follows... 2228 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2229 it != ie; ++it) { 2230 unsigned neededInt, neededSSE; 2231 it->info = classifyArgumentType(it->type, freeIntRegs, neededInt, 2232 neededSSE); 2233 2234 // AMD64-ABI 3.2.3p3: If there are no registers available for any 2235 // eightbyte of an argument, the whole argument is passed on the 2236 // stack. If registers have already been assigned for some 2237 // eightbytes of such an argument, the assignments get reverted. 2238 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 2239 freeIntRegs -= neededInt; 2240 freeSSERegs -= neededSSE; 2241 } else { 2242 it->info = getIndirectResult(it->type, freeIntRegs); 2243 } 2244 } 2245} 2246 2247static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 2248 QualType Ty, 2249 CodeGenFunction &CGF) { 2250 llvm::Value *overflow_arg_area_p = 2251 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 2252 llvm::Value *overflow_arg_area = 2253 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 2254 2255 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 2256 // byte boundary if alignment needed by type exceeds 8 byte boundary. 2257 // It isn't stated explicitly in the standard, but in practice we use 2258 // alignment greater than 16 where necessary. 2259 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 2260 if (Align > 8) { 2261 // overflow_arg_area = (overflow_arg_area + align - 1) & -align; 2262 llvm::Value *Offset = 2263 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1); 2264 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 2265 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 2266 CGF.Int64Ty); 2267 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align); 2268 overflow_arg_area = 2269 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 2270 overflow_arg_area->getType(), 2271 "overflow_arg_area.align"); 2272 } 2273 2274 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 2275 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2276 llvm::Value *Res = 2277 CGF.Builder.CreateBitCast(overflow_arg_area, 2278 llvm::PointerType::getUnqual(LTy)); 2279 2280 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 2281 // l->overflow_arg_area + sizeof(type). 2282 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 2283 // an 8 byte boundary. 2284 2285 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 2286 llvm::Value *Offset = 2287 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 2288 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 2289 "overflow_arg_area.next"); 2290 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 2291 2292 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 2293 return Res; 2294} 2295 2296llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2297 CodeGenFunction &CGF) const { 2298 // Assume that va_list type is correct; should be pointer to LLVM type: 2299 // struct { 2300 // i32 gp_offset; 2301 // i32 fp_offset; 2302 // i8* overflow_arg_area; 2303 // i8* reg_save_area; 2304 // }; 2305 unsigned neededInt, neededSSE; 2306 2307 Ty = CGF.getContext().getCanonicalType(Ty); 2308 ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE); 2309 2310 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2311 // in the registers. If not go to step 7. 2312 if (!neededInt && !neededSSE) 2313 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2314 2315 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2316 // general purpose registers needed to pass type and num_fp to hold 2317 // the number of floating point registers needed. 2318 2319 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2320 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2321 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2322 // 2323 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2324 // register save space). 2325 2326 llvm::Value *InRegs = 0; 2327 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 2328 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 2329 if (neededInt) { 2330 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 2331 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2332 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2333 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2334 } 2335 2336 if (neededSSE) { 2337 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 2338 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2339 llvm::Value *FitsInFP = 2340 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2341 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2342 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2343 } 2344 2345 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2346 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2347 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2348 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2349 2350 // Emit code to load the value if it was passed in registers. 2351 2352 CGF.EmitBlock(InRegBlock); 2353 2354 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2355 // an offset of l->gp_offset and/or l->fp_offset. This may require 2356 // copying to a temporary location in case the parameter is passed 2357 // in different register classes or requires an alignment greater 2358 // than 8 for general purpose registers and 16 for XMM registers. 2359 // 2360 // FIXME: This really results in shameful code when we end up needing to 2361 // collect arguments from different places; often what should result in a 2362 // simple assembling of a structure from scattered addresses has many more 2363 // loads than necessary. Can we clean this up? 2364 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2365 llvm::Value *RegAddr = 2366 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2367 "reg_save_area"); 2368 if (neededInt && neededSSE) { 2369 // FIXME: Cleanup. 2370 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2371 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2372 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2373 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2374 llvm::Type *TyLo = ST->getElementType(0); 2375 llvm::Type *TyHi = ST->getElementType(1); 2376 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2377 "Unexpected ABI info for mixed regs"); 2378 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2379 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2380 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2381 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2382 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2383 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2384 llvm::Value *V = 2385 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2386 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2387 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2388 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2389 2390 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2391 llvm::PointerType::getUnqual(LTy)); 2392 } else if (neededInt) { 2393 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2394 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2395 llvm::PointerType::getUnqual(LTy)); 2396 } else if (neededSSE == 1) { 2397 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2398 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2399 llvm::PointerType::getUnqual(LTy)); 2400 } else { 2401 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2402 // SSE registers are spaced 16 bytes apart in the register save 2403 // area, we need to collect the two eightbytes together. 2404 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2405 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2406 llvm::Type *DoubleTy = CGF.DoubleTy; 2407 llvm::Type *DblPtrTy = 2408 llvm::PointerType::getUnqual(DoubleTy); 2409 llvm::StructType *ST = llvm::StructType::get(DoubleTy, 2410 DoubleTy, NULL); 2411 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2412 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2413 DblPtrTy)); 2414 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2415 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2416 DblPtrTy)); 2417 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2418 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2419 llvm::PointerType::getUnqual(LTy)); 2420 } 2421 2422 // AMD64-ABI 3.5.7p5: Step 5. Set: 2423 // l->gp_offset = l->gp_offset + num_gp * 8 2424 // l->fp_offset = l->fp_offset + num_fp * 16. 2425 if (neededInt) { 2426 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2427 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2428 gp_offset_p); 2429 } 2430 if (neededSSE) { 2431 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2432 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2433 fp_offset_p); 2434 } 2435 CGF.EmitBranch(ContBlock); 2436 2437 // Emit code to load the value if it was passed in memory. 2438 2439 CGF.EmitBlock(InMemBlock); 2440 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2441 2442 // Return the appropriate result. 2443 2444 CGF.EmitBlock(ContBlock); 2445 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2446 "vaarg.addr"); 2447 ResAddr->addIncoming(RegAddr, InRegBlock); 2448 ResAddr->addIncoming(MemAddr, InMemBlock); 2449 return ResAddr; 2450} 2451 2452ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const { 2453 2454 if (Ty->isVoidType()) 2455 return ABIArgInfo::getIgnore(); 2456 2457 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2458 Ty = EnumTy->getDecl()->getIntegerType(); 2459 2460 uint64_t Size = getContext().getTypeSize(Ty); 2461 2462 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2463 if (hasNonTrivialDestructorOrCopyConstructor(RT) || 2464 RT->getDecl()->hasFlexibleArrayMember()) 2465 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2466 2467 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2468 if (Size == 128 && 2469 getContext().getTargetInfo().getTriple().getOS() 2470 == llvm::Triple::MinGW32) 2471 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2472 Size)); 2473 2474 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2475 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2476 if (Size <= 64 && 2477 (Size & (Size - 1)) == 0) 2478 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2479 Size)); 2480 2481 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2482 } 2483 2484 if (Ty->isPromotableIntegerType()) 2485 return ABIArgInfo::getExtend(); 2486 2487 return ABIArgInfo::getDirect(); 2488} 2489 2490void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2491 2492 QualType RetTy = FI.getReturnType(); 2493 FI.getReturnInfo() = classify(RetTy); 2494 2495 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2496 it != ie; ++it) 2497 it->info = classify(it->type); 2498} 2499 2500llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2501 CodeGenFunction &CGF) const { 2502 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2503 2504 CGBuilderTy &Builder = CGF.Builder; 2505 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2506 "ap"); 2507 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2508 llvm::Type *PTy = 2509 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2510 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2511 2512 uint64_t Offset = 2513 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2514 llvm::Value *NextAddr = 2515 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2516 "ap.next"); 2517 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2518 2519 return AddrTyped; 2520} 2521 2522// PowerPC-32 2523 2524namespace { 2525class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2526public: 2527 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2528 2529 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2530 // This is recovered from gcc output. 2531 return 1; // r1 is the dedicated stack pointer 2532 } 2533 2534 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2535 llvm::Value *Address) const; 2536}; 2537 2538} 2539 2540bool 2541PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2542 llvm::Value *Address) const { 2543 // This is calculated from the LLVM and GCC tables and verified 2544 // against gcc output. AFAIK all ABIs use the same encoding. 2545 2546 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2547 2548 llvm::IntegerType *i8 = CGF.Int8Ty; 2549 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2550 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2551 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2552 2553 // 0-31: r0-31, the 4-byte general-purpose registers 2554 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2555 2556 // 32-63: fp0-31, the 8-byte floating-point registers 2557 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2558 2559 // 64-76 are various 4-byte special-purpose registers: 2560 // 64: mq 2561 // 65: lr 2562 // 66: ctr 2563 // 67: ap 2564 // 68-75 cr0-7 2565 // 76: xer 2566 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2567 2568 // 77-108: v0-31, the 16-byte vector registers 2569 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2570 2571 // 109: vrsave 2572 // 110: vscr 2573 // 111: spe_acc 2574 // 112: spefscr 2575 // 113: sfp 2576 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2577 2578 return false; 2579} 2580 2581// PowerPC-64 2582 2583namespace { 2584class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2585public: 2586 PPC64TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2587 2588 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2589 // This is recovered from gcc output. 2590 return 1; // r1 is the dedicated stack pointer 2591 } 2592 2593 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2594 llvm::Value *Address) const; 2595}; 2596 2597} 2598 2599bool 2600PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2601 llvm::Value *Address) const { 2602 // This is calculated from the LLVM and GCC tables and verified 2603 // against gcc output. AFAIK all ABIs use the same encoding. 2604 2605 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2606 2607 llvm::IntegerType *i8 = CGF.Int8Ty; 2608 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2609 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2610 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2611 2612 // 0-31: r0-31, the 8-byte general-purpose registers 2613 AssignToArrayRange(Builder, Address, Eight8, 0, 31); 2614 2615 // 32-63: fp0-31, the 8-byte floating-point registers 2616 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2617 2618 // 64-76 are various 4-byte special-purpose registers: 2619 // 64: mq 2620 // 65: lr 2621 // 66: ctr 2622 // 67: ap 2623 // 68-75 cr0-7 2624 // 76: xer 2625 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2626 2627 // 77-108: v0-31, the 16-byte vector registers 2628 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2629 2630 // 109: vrsave 2631 // 110: vscr 2632 // 111: spe_acc 2633 // 112: spefscr 2634 // 113: sfp 2635 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2636 2637 return false; 2638} 2639 2640//===----------------------------------------------------------------------===// 2641// ARM ABI Implementation 2642//===----------------------------------------------------------------------===// 2643 2644namespace { 2645 2646class ARMABIInfo : public ABIInfo { 2647public: 2648 enum ABIKind { 2649 APCS = 0, 2650 AAPCS = 1, 2651 AAPCS_VFP 2652 }; 2653 2654private: 2655 ABIKind Kind; 2656 2657public: 2658 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2659 2660 bool isEABI() const { 2661 StringRef Env = 2662 getContext().getTargetInfo().getTriple().getEnvironmentName(); 2663 return (Env == "gnueabi" || Env == "eabi" || 2664 Env == "android" || Env == "androideabi"); 2665 } 2666 2667private: 2668 ABIKind getABIKind() const { return Kind; } 2669 2670 ABIArgInfo classifyReturnType(QualType RetTy) const; 2671 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2672 2673 virtual void computeInfo(CGFunctionInfo &FI) const; 2674 2675 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2676 CodeGenFunction &CGF) const; 2677}; 2678 2679class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2680public: 2681 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2682 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2683 2684 const ARMABIInfo &getABIInfo() const { 2685 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo()); 2686 } 2687 2688 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2689 return 13; 2690 } 2691 2692 StringRef getARCRetainAutoreleasedReturnValueMarker() const { 2693 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 2694 } 2695 2696 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2697 llvm::Value *Address) const { 2698 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 2699 2700 // 0-15 are the 16 integer registers. 2701 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15); 2702 return false; 2703 } 2704 2705 unsigned getSizeOfUnwindException() const { 2706 if (getABIInfo().isEABI()) return 88; 2707 return TargetCodeGenInfo::getSizeOfUnwindException(); 2708 } 2709}; 2710 2711} 2712 2713void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2714 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2715 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2716 it != ie; ++it) 2717 it->info = classifyArgumentType(it->type); 2718 2719 // Always honor user-specified calling convention. 2720 if (FI.getCallingConvention() != llvm::CallingConv::C) 2721 return; 2722 2723 // Calling convention as default by an ABI. 2724 llvm::CallingConv::ID DefaultCC; 2725 if (isEABI()) 2726 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2727 else 2728 DefaultCC = llvm::CallingConv::ARM_APCS; 2729 2730 // If user did not ask for specific calling convention explicitly (e.g. via 2731 // pcs attribute), set effective calling convention if it's different than ABI 2732 // default. 2733 switch (getABIKind()) { 2734 case APCS: 2735 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2736 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2737 break; 2738 case AAPCS: 2739 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2740 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2741 break; 2742 case AAPCS_VFP: 2743 if (DefaultCC != llvm::CallingConv::ARM_AAPCS_VFP) 2744 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2745 break; 2746 } 2747} 2748 2749/// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous 2750/// aggregate. If HAMembers is non-null, the number of base elements 2751/// contained in the type is returned through it; this is used for the 2752/// recursive calls that check aggregate component types. 2753static bool isHomogeneousAggregate(QualType Ty, const Type *&Base, 2754 ASTContext &Context, 2755 uint64_t *HAMembers = 0) { 2756 uint64_t Members = 0; 2757 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 2758 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members)) 2759 return false; 2760 Members *= AT->getSize().getZExtValue(); 2761 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 2762 const RecordDecl *RD = RT->getDecl(); 2763 if (RD->hasFlexibleArrayMember()) 2764 return false; 2765 2766 Members = 0; 2767 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2768 i != e; ++i) { 2769 const FieldDecl *FD = *i; 2770 uint64_t FldMembers; 2771 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers)) 2772 return false; 2773 2774 Members = (RD->isUnion() ? 2775 std::max(Members, FldMembers) : Members + FldMembers); 2776 } 2777 } else { 2778 Members = 1; 2779 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 2780 Members = 2; 2781 Ty = CT->getElementType(); 2782 } 2783 2784 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 2785 // double, or 64-bit or 128-bit vectors. 2786 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 2787 if (BT->getKind() != BuiltinType::Float && 2788 BT->getKind() != BuiltinType::Double && 2789 BT->getKind() != BuiltinType::LongDouble) 2790 return false; 2791 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 2792 unsigned VecSize = Context.getTypeSize(VT); 2793 if (VecSize != 64 && VecSize != 128) 2794 return false; 2795 } else { 2796 return false; 2797 } 2798 2799 // The base type must be the same for all members. Vector types of the 2800 // same total size are treated as being equivalent here. 2801 const Type *TyPtr = Ty.getTypePtr(); 2802 if (!Base) 2803 Base = TyPtr; 2804 if (Base != TyPtr && 2805 (!Base->isVectorType() || !TyPtr->isVectorType() || 2806 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr))) 2807 return false; 2808 } 2809 2810 // Homogeneous Aggregates can have at most 4 members of the base type. 2811 if (HAMembers) 2812 *HAMembers = Members; 2813 2814 return (Members > 0 && Members <= 4); 2815} 2816 2817ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2818 if (!isAggregateTypeForABI(Ty)) { 2819 // Treat an enum type as its underlying type. 2820 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2821 Ty = EnumTy->getDecl()->getIntegerType(); 2822 2823 return (Ty->isPromotableIntegerType() ? 2824 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2825 } 2826 2827 // Ignore empty records. 2828 if (isEmptyRecord(getContext(), Ty, true)) 2829 return ABIArgInfo::getIgnore(); 2830 2831 // Structures with either a non-trivial destructor or a non-trivial 2832 // copy constructor are always indirect. 2833 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2834 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2835 2836 if (getABIKind() == ARMABIInfo::AAPCS_VFP) { 2837 // Homogeneous Aggregates need to be expanded. 2838 const Type *Base = 0; 2839 if (isHomogeneousAggregate(Ty, Base, getContext())) { 2840 assert(Base && "Base class should be set for homogeneous aggregate"); 2841 return ABIArgInfo::getExpand(); 2842 } 2843 } 2844 2845 // Support byval for ARM. 2846 if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64) || 2847 getContext().getTypeAlign(Ty) > 64) { 2848 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 2849 } 2850 2851 // Otherwise, pass by coercing to a structure of the appropriate size. 2852 llvm::Type* ElemTy; 2853 unsigned SizeRegs; 2854 // FIXME: Try to match the types of the arguments more accurately where 2855 // we can. 2856 if (getContext().getTypeAlign(Ty) <= 32) { 2857 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2858 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2859 } else { 2860 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2861 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2862 } 2863 2864 llvm::Type *STy = 2865 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL); 2866 return ABIArgInfo::getDirect(STy); 2867} 2868 2869static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2870 llvm::LLVMContext &VMContext) { 2871 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2872 // is called integer-like if its size is less than or equal to one word, and 2873 // the offset of each of its addressable sub-fields is zero. 2874 2875 uint64_t Size = Context.getTypeSize(Ty); 2876 2877 // Check that the type fits in a word. 2878 if (Size > 32) 2879 return false; 2880 2881 // FIXME: Handle vector types! 2882 if (Ty->isVectorType()) 2883 return false; 2884 2885 // Float types are never treated as "integer like". 2886 if (Ty->isRealFloatingType()) 2887 return false; 2888 2889 // If this is a builtin or pointer type then it is ok. 2890 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2891 return true; 2892 2893 // Small complex integer types are "integer like". 2894 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2895 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2896 2897 // Single element and zero sized arrays should be allowed, by the definition 2898 // above, but they are not. 2899 2900 // Otherwise, it must be a record type. 2901 const RecordType *RT = Ty->getAs<RecordType>(); 2902 if (!RT) return false; 2903 2904 // Ignore records with flexible arrays. 2905 const RecordDecl *RD = RT->getDecl(); 2906 if (RD->hasFlexibleArrayMember()) 2907 return false; 2908 2909 // Check that all sub-fields are at offset 0, and are themselves "integer 2910 // like". 2911 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2912 2913 bool HadField = false; 2914 unsigned idx = 0; 2915 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2916 i != e; ++i, ++idx) { 2917 const FieldDecl *FD = *i; 2918 2919 // Bit-fields are not addressable, we only need to verify they are "integer 2920 // like". We still have to disallow a subsequent non-bitfield, for example: 2921 // struct { int : 0; int x } 2922 // is non-integer like according to gcc. 2923 if (FD->isBitField()) { 2924 if (!RD->isUnion()) 2925 HadField = true; 2926 2927 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2928 return false; 2929 2930 continue; 2931 } 2932 2933 // Check if this field is at offset 0. 2934 if (Layout.getFieldOffset(idx) != 0) 2935 return false; 2936 2937 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2938 return false; 2939 2940 // Only allow at most one field in a structure. This doesn't match the 2941 // wording above, but follows gcc in situations with a field following an 2942 // empty structure. 2943 if (!RD->isUnion()) { 2944 if (HadField) 2945 return false; 2946 2947 HadField = true; 2948 } 2949 } 2950 2951 return true; 2952} 2953 2954ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2955 if (RetTy->isVoidType()) 2956 return ABIArgInfo::getIgnore(); 2957 2958 // Large vector types should be returned via memory. 2959 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 2960 return ABIArgInfo::getIndirect(0); 2961 2962 if (!isAggregateTypeForABI(RetTy)) { 2963 // Treat an enum type as its underlying type. 2964 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2965 RetTy = EnumTy->getDecl()->getIntegerType(); 2966 2967 return (RetTy->isPromotableIntegerType() ? 2968 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2969 } 2970 2971 // Structures with either a non-trivial destructor or a non-trivial 2972 // copy constructor are always indirect. 2973 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2974 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2975 2976 // Are we following APCS? 2977 if (getABIKind() == APCS) { 2978 if (isEmptyRecord(getContext(), RetTy, false)) 2979 return ABIArgInfo::getIgnore(); 2980 2981 // Complex types are all returned as packed integers. 2982 // 2983 // FIXME: Consider using 2 x vector types if the back end handles them 2984 // correctly. 2985 if (RetTy->isAnyComplexType()) 2986 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2987 getContext().getTypeSize(RetTy))); 2988 2989 // Integer like structures are returned in r0. 2990 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2991 // Return in the smallest viable integer type. 2992 uint64_t Size = getContext().getTypeSize(RetTy); 2993 if (Size <= 8) 2994 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2995 if (Size <= 16) 2996 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2997 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2998 } 2999 3000 // Otherwise return in memory. 3001 return ABIArgInfo::getIndirect(0); 3002 } 3003 3004 // Otherwise this is an AAPCS variant. 3005 3006 if (isEmptyRecord(getContext(), RetTy, true)) 3007 return ABIArgInfo::getIgnore(); 3008 3009 // Check for homogeneous aggregates with AAPCS-VFP. 3010 if (getABIKind() == AAPCS_VFP) { 3011 const Type *Base = 0; 3012 if (isHomogeneousAggregate(RetTy, Base, getContext())) { 3013 assert(Base && "Base class should be set for homogeneous aggregate"); 3014 // Homogeneous Aggregates are returned directly. 3015 return ABIArgInfo::getDirect(); 3016 } 3017 } 3018 3019 // Aggregates <= 4 bytes are returned in r0; other aggregates 3020 // are returned indirectly. 3021 uint64_t Size = getContext().getTypeSize(RetTy); 3022 if (Size <= 32) { 3023 // Return in the smallest viable integer type. 3024 if (Size <= 8) 3025 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3026 if (Size <= 16) 3027 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3028 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3029 } 3030 3031 return ABIArgInfo::getIndirect(0); 3032} 3033 3034llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3035 CodeGenFunction &CGF) const { 3036 llvm::Type *BP = CGF.Int8PtrTy; 3037 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3038 3039 CGBuilderTy &Builder = CGF.Builder; 3040 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3041 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3042 // Handle address alignment for type alignment > 32 bits 3043 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 3044 if (TyAlign > 4) { 3045 assert((TyAlign & (TyAlign - 1)) == 0 && 3046 "Alignment is not power of 2!"); 3047 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 3048 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 3049 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 3050 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 3051 } 3052 llvm::Type *PTy = 3053 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3054 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 3055 3056 uint64_t Offset = 3057 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 3058 llvm::Value *NextAddr = 3059 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3060 "ap.next"); 3061 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3062 3063 return AddrTyped; 3064} 3065 3066//===----------------------------------------------------------------------===// 3067// NVPTX ABI Implementation 3068//===----------------------------------------------------------------------===// 3069 3070namespace { 3071 3072class NVPTXABIInfo : public ABIInfo { 3073public: 3074 NVPTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3075 3076 ABIArgInfo classifyReturnType(QualType RetTy) const; 3077 ABIArgInfo classifyArgumentType(QualType Ty) const; 3078 3079 virtual void computeInfo(CGFunctionInfo &FI) const; 3080 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3081 CodeGenFunction &CFG) const; 3082}; 3083 3084class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo { 3085public: 3086 NVPTXTargetCodeGenInfo(CodeGenTypes &CGT) 3087 : TargetCodeGenInfo(new NVPTXABIInfo(CGT)) {} 3088 3089 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 3090 CodeGen::CodeGenModule &M) const; 3091}; 3092 3093ABIArgInfo NVPTXABIInfo::classifyReturnType(QualType RetTy) const { 3094 if (RetTy->isVoidType()) 3095 return ABIArgInfo::getIgnore(); 3096 if (isAggregateTypeForABI(RetTy)) 3097 return ABIArgInfo::getIndirect(0); 3098 return ABIArgInfo::getDirect(); 3099} 3100 3101ABIArgInfo NVPTXABIInfo::classifyArgumentType(QualType Ty) const { 3102 if (isAggregateTypeForABI(Ty)) 3103 return ABIArgInfo::getIndirect(0); 3104 3105 return ABIArgInfo::getDirect(); 3106} 3107 3108void NVPTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 3109 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3110 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3111 it != ie; ++it) 3112 it->info = classifyArgumentType(it->type); 3113 3114 // Always honor user-specified calling convention. 3115 if (FI.getCallingConvention() != llvm::CallingConv::C) 3116 return; 3117 3118 // Calling convention as default by an ABI. 3119 // We're still using the PTX_Kernel/PTX_Device calling conventions here, 3120 // but we should switch to NVVM metadata later on. 3121 llvm::CallingConv::ID DefaultCC; 3122 const LangOptions &LangOpts = getContext().getLangOpts(); 3123 if (LangOpts.OpenCL || LangOpts.CUDA) { 3124 // If we are in OpenCL or CUDA mode, then default to device functions 3125 DefaultCC = llvm::CallingConv::PTX_Device; 3126 } else { 3127 // If we are in standard C/C++ mode, use the triple to decide on the default 3128 StringRef Env = 3129 getContext().getTargetInfo().getTriple().getEnvironmentName(); 3130 if (Env == "device") 3131 DefaultCC = llvm::CallingConv::PTX_Device; 3132 else 3133 DefaultCC = llvm::CallingConv::PTX_Kernel; 3134 } 3135 FI.setEffectiveCallingConvention(DefaultCC); 3136 3137} 3138 3139llvm::Value *NVPTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3140 CodeGenFunction &CFG) const { 3141 llvm_unreachable("NVPTX does not support varargs"); 3142} 3143 3144void NVPTXTargetCodeGenInfo:: 3145SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 3146 CodeGen::CodeGenModule &M) const{ 3147 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 3148 if (!FD) return; 3149 3150 llvm::Function *F = cast<llvm::Function>(GV); 3151 3152 // Perform special handling in OpenCL mode 3153 if (M.getLangOpts().OpenCL) { 3154 // Use OpenCL function attributes to set proper calling conventions 3155 // By default, all functions are device functions 3156 if (FD->hasAttr<OpenCLKernelAttr>()) { 3157 // OpenCL __kernel functions get a kernel calling convention 3158 F->setCallingConv(llvm::CallingConv::PTX_Kernel); 3159 // And kernel functions are not subject to inlining 3160 F->addFnAttr(llvm::Attribute::NoInline); 3161 } 3162 } 3163 3164 // Perform special handling in CUDA mode. 3165 if (M.getLangOpts().CUDA) { 3166 // CUDA __global__ functions get a kernel calling convention. Since 3167 // __global__ functions cannot be called from the device, we do not 3168 // need to set the noinline attribute. 3169 if (FD->getAttr<CUDAGlobalAttr>()) 3170 F->setCallingConv(llvm::CallingConv::PTX_Kernel); 3171 } 3172} 3173 3174} 3175 3176//===----------------------------------------------------------------------===// 3177// MBlaze ABI Implementation 3178//===----------------------------------------------------------------------===// 3179 3180namespace { 3181 3182class MBlazeABIInfo : public ABIInfo { 3183public: 3184 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3185 3186 bool isPromotableIntegerType(QualType Ty) const; 3187 3188 ABIArgInfo classifyReturnType(QualType RetTy) const; 3189 ABIArgInfo classifyArgumentType(QualType RetTy) const; 3190 3191 virtual void computeInfo(CGFunctionInfo &FI) const { 3192 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3193 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3194 it != ie; ++it) 3195 it->info = classifyArgumentType(it->type); 3196 } 3197 3198 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3199 CodeGenFunction &CGF) const; 3200}; 3201 3202class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 3203public: 3204 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 3205 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 3206 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 3207 CodeGen::CodeGenModule &M) const; 3208}; 3209 3210} 3211 3212bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 3213 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 3214 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 3215 switch (BT->getKind()) { 3216 case BuiltinType::Bool: 3217 case BuiltinType::Char_S: 3218 case BuiltinType::Char_U: 3219 case BuiltinType::SChar: 3220 case BuiltinType::UChar: 3221 case BuiltinType::Short: 3222 case BuiltinType::UShort: 3223 return true; 3224 default: 3225 return false; 3226 } 3227 return false; 3228} 3229 3230llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3231 CodeGenFunction &CGF) const { 3232 // FIXME: Implement 3233 return 0; 3234} 3235 3236 3237ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 3238 if (RetTy->isVoidType()) 3239 return ABIArgInfo::getIgnore(); 3240 if (isAggregateTypeForABI(RetTy)) 3241 return ABIArgInfo::getIndirect(0); 3242 3243 return (isPromotableIntegerType(RetTy) ? 3244 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3245} 3246 3247ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 3248 if (isAggregateTypeForABI(Ty)) 3249 return ABIArgInfo::getIndirect(0); 3250 3251 return (isPromotableIntegerType(Ty) ? 3252 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3253} 3254 3255void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 3256 llvm::GlobalValue *GV, 3257 CodeGen::CodeGenModule &M) 3258 const { 3259 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 3260 if (!FD) return; 3261 3262 llvm::CallingConv::ID CC = llvm::CallingConv::C; 3263 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 3264 CC = llvm::CallingConv::MBLAZE_INTR; 3265 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 3266 CC = llvm::CallingConv::MBLAZE_SVOL; 3267 3268 if (CC != llvm::CallingConv::C) { 3269 // Handle 'interrupt_handler' attribute: 3270 llvm::Function *F = cast<llvm::Function>(GV); 3271 3272 // Step 1: Set ISR calling convention. 3273 F->setCallingConv(CC); 3274 3275 // Step 2: Add attributes goodness. 3276 F->addFnAttr(llvm::Attribute::NoInline); 3277 } 3278 3279 // Step 3: Emit _interrupt_handler alias. 3280 if (CC == llvm::CallingConv::MBLAZE_INTR) 3281 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 3282 "_interrupt_handler", GV, &M.getModule()); 3283} 3284 3285 3286//===----------------------------------------------------------------------===// 3287// MSP430 ABI Implementation 3288//===----------------------------------------------------------------------===// 3289 3290namespace { 3291 3292class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 3293public: 3294 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 3295 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 3296 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 3297 CodeGen::CodeGenModule &M) const; 3298}; 3299 3300} 3301 3302void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 3303 llvm::GlobalValue *GV, 3304 CodeGen::CodeGenModule &M) const { 3305 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 3306 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 3307 // Handle 'interrupt' attribute: 3308 llvm::Function *F = cast<llvm::Function>(GV); 3309 3310 // Step 1: Set ISR calling convention. 3311 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 3312 3313 // Step 2: Add attributes goodness. 3314 F->addFnAttr(llvm::Attribute::NoInline); 3315 3316 // Step 3: Emit ISR vector alias. 3317 unsigned Num = attr->getNumber() + 0xffe0; 3318 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 3319 "vector_" + Twine::utohexstr(Num), 3320 GV, &M.getModule()); 3321 } 3322 } 3323} 3324 3325//===----------------------------------------------------------------------===// 3326// MIPS ABI Implementation. This works for both little-endian and 3327// big-endian variants. 3328//===----------------------------------------------------------------------===// 3329 3330namespace { 3331class MipsABIInfo : public ABIInfo { 3332 bool IsO32; 3333 unsigned MinABIStackAlignInBytes, StackAlignInBytes; 3334 void CoerceToIntArgs(uint64_t TySize, 3335 SmallVector<llvm::Type*, 8> &ArgList) const; 3336 llvm::Type* HandleAggregates(QualType Ty, uint64_t TySize) const; 3337 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const; 3338 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const; 3339public: 3340 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) : 3341 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8), 3342 StackAlignInBytes(IsO32 ? 8 : 16) {} 3343 3344 ABIArgInfo classifyReturnType(QualType RetTy) const; 3345 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const; 3346 virtual void computeInfo(CGFunctionInfo &FI) const; 3347 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3348 CodeGenFunction &CGF) const; 3349}; 3350 3351class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 3352 unsigned SizeOfUnwindException; 3353public: 3354 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32) 3355 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)), 3356 SizeOfUnwindException(IsO32 ? 24 : 32) {} 3357 3358 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 3359 return 29; 3360 } 3361 3362 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3363 llvm::Value *Address) const; 3364 3365 unsigned getSizeOfUnwindException() const { 3366 return SizeOfUnwindException; 3367 } 3368}; 3369} 3370 3371void MipsABIInfo::CoerceToIntArgs(uint64_t TySize, 3372 SmallVector<llvm::Type*, 8> &ArgList) const { 3373 llvm::IntegerType *IntTy = 3374 llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8); 3375 3376 // Add (TySize / MinABIStackAlignInBytes) args of IntTy. 3377 for (unsigned N = TySize / (MinABIStackAlignInBytes * 8); N; --N) 3378 ArgList.push_back(IntTy); 3379 3380 // If necessary, add one more integer type to ArgList. 3381 unsigned R = TySize % (MinABIStackAlignInBytes * 8); 3382 3383 if (R) 3384 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R)); 3385} 3386 3387// In N32/64, an aligned double precision floating point field is passed in 3388// a register. 3389llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty, uint64_t TySize) const { 3390 SmallVector<llvm::Type*, 8> ArgList, IntArgList; 3391 3392 if (IsO32) { 3393 CoerceToIntArgs(TySize, ArgList); 3394 return llvm::StructType::get(getVMContext(), ArgList); 3395 } 3396 3397 if (Ty->isComplexType()) 3398 return CGT.ConvertType(Ty); 3399 3400 const RecordType *RT = Ty->getAs<RecordType>(); 3401 3402 // Unions/vectors are passed in integer registers. 3403 if (!RT || !RT->isStructureOrClassType()) { 3404 CoerceToIntArgs(TySize, ArgList); 3405 return llvm::StructType::get(getVMContext(), ArgList); 3406 } 3407 3408 const RecordDecl *RD = RT->getDecl(); 3409 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 3410 assert(!(TySize % 8) && "Size of structure must be multiple of 8."); 3411 3412 uint64_t LastOffset = 0; 3413 unsigned idx = 0; 3414 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64); 3415 3416 // Iterate over fields in the struct/class and check if there are any aligned 3417 // double fields. 3418 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3419 i != e; ++i, ++idx) { 3420 const QualType Ty = i->getType(); 3421 const BuiltinType *BT = Ty->getAs<BuiltinType>(); 3422 3423 if (!BT || BT->getKind() != BuiltinType::Double) 3424 continue; 3425 3426 uint64_t Offset = Layout.getFieldOffset(idx); 3427 if (Offset % 64) // Ignore doubles that are not aligned. 3428 continue; 3429 3430 // Add ((Offset - LastOffset) / 64) args of type i64. 3431 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j) 3432 ArgList.push_back(I64); 3433 3434 // Add double type. 3435 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext())); 3436 LastOffset = Offset + 64; 3437 } 3438 3439 CoerceToIntArgs(TySize - LastOffset, IntArgList); 3440 ArgList.append(IntArgList.begin(), IntArgList.end()); 3441 3442 return llvm::StructType::get(getVMContext(), ArgList); 3443} 3444 3445llvm::Type *MipsABIInfo::getPaddingType(uint64_t Align, uint64_t Offset) const { 3446 assert((Offset % MinABIStackAlignInBytes) == 0); 3447 3448 if ((Align - 1) & Offset) 3449 return llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8); 3450 3451 return 0; 3452} 3453 3454ABIArgInfo 3455MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const { 3456 uint64_t OrigOffset = Offset; 3457 uint64_t TySize = getContext().getTypeSize(Ty); 3458 uint64_t Align = getContext().getTypeAlign(Ty) / 8; 3459 3460 Align = std::min(std::max(Align, (uint64_t)MinABIStackAlignInBytes), 3461 (uint64_t)StackAlignInBytes); 3462 Offset = llvm::RoundUpToAlignment(Offset, Align); 3463 Offset += llvm::RoundUpToAlignment(TySize, Align * 8) / 8; 3464 3465 if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) { 3466 // Ignore empty aggregates. 3467 if (TySize == 0) 3468 return ABIArgInfo::getIgnore(); 3469 3470 // Records with non trivial destructors/constructors should not be passed 3471 // by value. 3472 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) { 3473 Offset = OrigOffset + MinABIStackAlignInBytes; 3474 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3475 } 3476 3477 // If we have reached here, aggregates are passed directly by coercing to 3478 // another structure type. Padding is inserted if the offset of the 3479 // aggregate is unaligned. 3480 return ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0, 3481 getPaddingType(Align, OrigOffset)); 3482 } 3483 3484 // Treat an enum type as its underlying type. 3485 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3486 Ty = EnumTy->getDecl()->getIntegerType(); 3487 3488 if (Ty->isPromotableIntegerType()) 3489 return ABIArgInfo::getExtend(); 3490 3491 return ABIArgInfo::getDirect(0, 0, getPaddingType(Align, OrigOffset)); 3492} 3493 3494llvm::Type* 3495MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const { 3496 const RecordType *RT = RetTy->getAs<RecordType>(); 3497 SmallVector<llvm::Type*, 8> RTList; 3498 3499 if (RT && RT->isStructureOrClassType()) { 3500 const RecordDecl *RD = RT->getDecl(); 3501 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 3502 unsigned FieldCnt = Layout.getFieldCount(); 3503 3504 // N32/64 returns struct/classes in floating point registers if the 3505 // following conditions are met: 3506 // 1. The size of the struct/class is no larger than 128-bit. 3507 // 2. The struct/class has one or two fields all of which are floating 3508 // point types. 3509 // 3. The offset of the first field is zero (this follows what gcc does). 3510 // 3511 // Any other composite results are returned in integer registers. 3512 // 3513 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) { 3514 RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end(); 3515 for (; b != e; ++b) { 3516 const BuiltinType *BT = b->getType()->getAs<BuiltinType>(); 3517 3518 if (!BT || !BT->isFloatingPoint()) 3519 break; 3520 3521 RTList.push_back(CGT.ConvertType(b->getType())); 3522 } 3523 3524 if (b == e) 3525 return llvm::StructType::get(getVMContext(), RTList, 3526 RD->hasAttr<PackedAttr>()); 3527 3528 RTList.clear(); 3529 } 3530 } 3531 3532 CoerceToIntArgs(Size, RTList); 3533 return llvm::StructType::get(getVMContext(), RTList); 3534} 3535 3536ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 3537 uint64_t Size = getContext().getTypeSize(RetTy); 3538 3539 if (RetTy->isVoidType() || Size == 0) 3540 return ABIArgInfo::getIgnore(); 3541 3542 if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) { 3543 if (Size <= 128) { 3544 if (RetTy->isAnyComplexType()) 3545 return ABIArgInfo::getDirect(); 3546 3547 // O32 returns integer vectors in registers. 3548 if (IsO32 && RetTy->isVectorType() && !RetTy->hasFloatingRepresentation()) 3549 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 3550 3551 if (!IsO32 && !isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 3552 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 3553 } 3554 3555 return ABIArgInfo::getIndirect(0); 3556 } 3557 3558 // Treat an enum type as its underlying type. 3559 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3560 RetTy = EnumTy->getDecl()->getIntegerType(); 3561 3562 return (RetTy->isPromotableIntegerType() ? 3563 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3564} 3565 3566void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 3567 ABIArgInfo &RetInfo = FI.getReturnInfo(); 3568 RetInfo = classifyReturnType(FI.getReturnType()); 3569 3570 // Check if a pointer to an aggregate is passed as a hidden argument. 3571 uint64_t Offset = RetInfo.isIndirect() ? MinABIStackAlignInBytes : 0; 3572 3573 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3574 it != ie; ++it) 3575 it->info = classifyArgumentType(it->type, Offset); 3576} 3577 3578llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3579 CodeGenFunction &CGF) const { 3580 llvm::Type *BP = CGF.Int8PtrTy; 3581 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3582 3583 CGBuilderTy &Builder = CGF.Builder; 3584 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3585 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3586 int64_t TypeAlign = getContext().getTypeAlign(Ty) / 8; 3587 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3588 llvm::Value *AddrTyped; 3589 unsigned PtrWidth = getContext().getTargetInfo().getPointerWidth(0); 3590 llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty; 3591 3592 if (TypeAlign > MinABIStackAlignInBytes) { 3593 llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy); 3594 llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1); 3595 llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign); 3596 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc); 3597 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 3598 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 3599 } 3600 else 3601 AddrTyped = Builder.CreateBitCast(Addr, PTy); 3602 3603 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 3604 TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes); 3605 uint64_t Offset = 3606 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); 3607 llvm::Value *NextAddr = 3608 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset), 3609 "ap.next"); 3610 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3611 3612 return AddrTyped; 3613} 3614 3615bool 3616MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3617 llvm::Value *Address) const { 3618 // This information comes from gcc's implementation, which seems to 3619 // as canonical as it gets. 3620 3621 // Everything on MIPS is 4 bytes. Double-precision FP registers 3622 // are aliased to pairs of single-precision FP registers. 3623 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 3624 3625 // 0-31 are the general purpose registers, $0 - $31. 3626 // 32-63 are the floating-point registers, $f0 - $f31. 3627 // 64 and 65 are the multiply/divide registers, $hi and $lo. 3628 // 66 is the (notional, I think) register for signal-handler return. 3629 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65); 3630 3631 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 3632 // They are one bit wide and ignored here. 3633 3634 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 3635 // (coprocessor 1 is the FP unit) 3636 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 3637 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 3638 // 176-181 are the DSP accumulator registers. 3639 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181); 3640 return false; 3641} 3642 3643//===----------------------------------------------------------------------===// 3644// TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults. 3645// Currently subclassed only to implement custom OpenCL C function attribute 3646// handling. 3647//===----------------------------------------------------------------------===// 3648 3649namespace { 3650 3651class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo { 3652public: 3653 TCETargetCodeGenInfo(CodeGenTypes &CGT) 3654 : DefaultTargetCodeGenInfo(CGT) {} 3655 3656 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 3657 CodeGen::CodeGenModule &M) const; 3658}; 3659 3660void TCETargetCodeGenInfo::SetTargetAttributes(const Decl *D, 3661 llvm::GlobalValue *GV, 3662 CodeGen::CodeGenModule &M) const { 3663 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 3664 if (!FD) return; 3665 3666 llvm::Function *F = cast<llvm::Function>(GV); 3667 3668 if (M.getLangOpts().OpenCL) { 3669 if (FD->hasAttr<OpenCLKernelAttr>()) { 3670 // OpenCL C Kernel functions are not subject to inlining 3671 F->addFnAttr(llvm::Attribute::NoInline); 3672 3673 if (FD->hasAttr<ReqdWorkGroupSizeAttr>()) { 3674 3675 // Convert the reqd_work_group_size() attributes to metadata. 3676 llvm::LLVMContext &Context = F->getContext(); 3677 llvm::NamedMDNode *OpenCLMetadata = 3678 M.getModule().getOrInsertNamedMetadata("opencl.kernel_wg_size_info"); 3679 3680 SmallVector<llvm::Value*, 5> Operands; 3681 Operands.push_back(F); 3682 3683 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 3684 llvm::APInt(32, 3685 FD->getAttr<ReqdWorkGroupSizeAttr>()->getXDim()))); 3686 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 3687 llvm::APInt(32, 3688 FD->getAttr<ReqdWorkGroupSizeAttr>()->getYDim()))); 3689 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 3690 llvm::APInt(32, 3691 FD->getAttr<ReqdWorkGroupSizeAttr>()->getZDim()))); 3692 3693 // Add a boolean constant operand for "required" (true) or "hint" (false) 3694 // for implementing the work_group_size_hint attr later. Currently 3695 // always true as the hint is not yet implemented. 3696 Operands.push_back(llvm::ConstantInt::getTrue(Context)); 3697 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands)); 3698 } 3699 } 3700 } 3701} 3702 3703} 3704 3705//===----------------------------------------------------------------------===// 3706// Hexagon ABI Implementation 3707//===----------------------------------------------------------------------===// 3708 3709namespace { 3710 3711class HexagonABIInfo : public ABIInfo { 3712 3713 3714public: 3715 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3716 3717private: 3718 3719 ABIArgInfo classifyReturnType(QualType RetTy) const; 3720 ABIArgInfo classifyArgumentType(QualType RetTy) const; 3721 3722 virtual void computeInfo(CGFunctionInfo &FI) const; 3723 3724 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3725 CodeGenFunction &CGF) const; 3726}; 3727 3728class HexagonTargetCodeGenInfo : public TargetCodeGenInfo { 3729public: 3730 HexagonTargetCodeGenInfo(CodeGenTypes &CGT) 3731 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {} 3732 3733 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 3734 return 29; 3735 } 3736}; 3737 3738} 3739 3740void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const { 3741 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3742 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3743 it != ie; ++it) 3744 it->info = classifyArgumentType(it->type); 3745} 3746 3747ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const { 3748 if (!isAggregateTypeForABI(Ty)) { 3749 // Treat an enum type as its underlying type. 3750 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3751 Ty = EnumTy->getDecl()->getIntegerType(); 3752 3753 return (Ty->isPromotableIntegerType() ? 3754 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3755 } 3756 3757 // Ignore empty records. 3758 if (isEmptyRecord(getContext(), Ty, true)) 3759 return ABIArgInfo::getIgnore(); 3760 3761 // Structures with either a non-trivial destructor or a non-trivial 3762 // copy constructor are always indirect. 3763 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 3764 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3765 3766 uint64_t Size = getContext().getTypeSize(Ty); 3767 if (Size > 64) 3768 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 3769 // Pass in the smallest viable integer type. 3770 else if (Size > 32) 3771 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 3772 else if (Size > 16) 3773 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3774 else if (Size > 8) 3775 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3776 else 3777 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3778} 3779 3780ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const { 3781 if (RetTy->isVoidType()) 3782 return ABIArgInfo::getIgnore(); 3783 3784 // Large vector types should be returned via memory. 3785 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64) 3786 return ABIArgInfo::getIndirect(0); 3787 3788 if (!isAggregateTypeForABI(RetTy)) { 3789 // Treat an enum type as its underlying type. 3790 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3791 RetTy = EnumTy->getDecl()->getIntegerType(); 3792 3793 return (RetTy->isPromotableIntegerType() ? 3794 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3795 } 3796 3797 // Structures with either a non-trivial destructor or a non-trivial 3798 // copy constructor are always indirect. 3799 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 3800 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3801 3802 if (isEmptyRecord(getContext(), RetTy, true)) 3803 return ABIArgInfo::getIgnore(); 3804 3805 // Aggregates <= 8 bytes are returned in r0; other aggregates 3806 // are returned indirectly. 3807 uint64_t Size = getContext().getTypeSize(RetTy); 3808 if (Size <= 64) { 3809 // Return in the smallest viable integer type. 3810 if (Size <= 8) 3811 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3812 if (Size <= 16) 3813 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3814 if (Size <= 32) 3815 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3816 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 3817 } 3818 3819 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 3820} 3821 3822llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3823 CodeGenFunction &CGF) const { 3824 // FIXME: Need to handle alignment 3825 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3826 3827 CGBuilderTy &Builder = CGF.Builder; 3828 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 3829 "ap"); 3830 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3831 llvm::Type *PTy = 3832 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3833 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 3834 3835 uint64_t Offset = 3836 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 3837 llvm::Value *NextAddr = 3838 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3839 "ap.next"); 3840 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3841 3842 return AddrTyped; 3843} 3844 3845 3846const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 3847 if (TheTargetCodeGenInfo) 3848 return *TheTargetCodeGenInfo; 3849 3850 const llvm::Triple &Triple = getContext().getTargetInfo().getTriple(); 3851 switch (Triple.getArch()) { 3852 default: 3853 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 3854 3855 case llvm::Triple::le32: 3856 return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types)); 3857 case llvm::Triple::mips: 3858 case llvm::Triple::mipsel: 3859 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true)); 3860 3861 case llvm::Triple::mips64: 3862 case llvm::Triple::mips64el: 3863 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false)); 3864 3865 case llvm::Triple::arm: 3866 case llvm::Triple::thumb: 3867 { 3868 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 3869 3870 if (strcmp(getContext().getTargetInfo().getABI(), "apcs-gnu") == 0) 3871 Kind = ARMABIInfo::APCS; 3872 else if (CodeGenOpts.FloatABI == "hard") 3873 Kind = ARMABIInfo::AAPCS_VFP; 3874 3875 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind)); 3876 } 3877 3878 case llvm::Triple::ppc: 3879 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 3880 case llvm::Triple::ppc64: 3881 return *(TheTargetCodeGenInfo = new PPC64TargetCodeGenInfo(Types)); 3882 3883 case llvm::Triple::nvptx: 3884 case llvm::Triple::nvptx64: 3885 return *(TheTargetCodeGenInfo = new NVPTXTargetCodeGenInfo(Types)); 3886 3887 case llvm::Triple::mblaze: 3888 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 3889 3890 case llvm::Triple::msp430: 3891 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 3892 3893 case llvm::Triple::tce: 3894 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types)); 3895 3896 case llvm::Triple::x86: { 3897 bool DisableMMX = strcmp(getContext().getTargetInfo().getABI(), "no-mmx") == 0; 3898 3899 if (Triple.isOSDarwin()) 3900 return *(TheTargetCodeGenInfo = 3901 new X86_32TargetCodeGenInfo(Types, true, true, DisableMMX, false, 3902 CodeGenOpts.NumRegisterParameters)); 3903 3904 switch (Triple.getOS()) { 3905 case llvm::Triple::Cygwin: 3906 case llvm::Triple::MinGW32: 3907 case llvm::Triple::AuroraUX: 3908 case llvm::Triple::DragonFly: 3909 case llvm::Triple::FreeBSD: 3910 case llvm::Triple::OpenBSD: 3911 case llvm::Triple::Bitrig: 3912 return *(TheTargetCodeGenInfo = 3913 new X86_32TargetCodeGenInfo(Types, false, true, DisableMMX, 3914 false, 3915 CodeGenOpts.NumRegisterParameters)); 3916 3917 case llvm::Triple::Win32: 3918 return *(TheTargetCodeGenInfo = 3919 new X86_32TargetCodeGenInfo(Types, false, true, DisableMMX, true, 3920 CodeGenOpts.NumRegisterParameters)); 3921 3922 default: 3923 return *(TheTargetCodeGenInfo = 3924 new X86_32TargetCodeGenInfo(Types, false, false, DisableMMX, 3925 false, 3926 CodeGenOpts.NumRegisterParameters)); 3927 } 3928 } 3929 3930 case llvm::Triple::x86_64: { 3931 bool HasAVX = strcmp(getContext().getTargetInfo().getABI(), "avx") == 0; 3932 3933 switch (Triple.getOS()) { 3934 case llvm::Triple::Win32: 3935 case llvm::Triple::MinGW32: 3936 case llvm::Triple::Cygwin: 3937 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 3938 default: 3939 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types, 3940 HasAVX)); 3941 } 3942 } 3943 case llvm::Triple::hexagon: 3944 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types)); 3945 } 3946} 3947