TargetInfo.cpp revision aa74a1e49f7c4b89539830290f76fe2c3e97187f
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/ADT/Triple.h" 22#include "llvm/Support/raw_ostream.h" 23using namespace clang; 24using namespace CodeGen; 25 26ABIInfo::~ABIInfo() {} 27 28void ABIArgInfo::dump() const { 29 llvm::raw_ostream &OS = llvm::errs(); 30 OS << "(ABIArgInfo Kind="; 31 switch (TheKind) { 32 case Direct: 33 OS << "Direct"; 34 break; 35 case Extend: 36 OS << "Extend"; 37 break; 38 case Ignore: 39 OS << "Ignore"; 40 break; 41 case Coerce: 42 OS << "Coerce Type="; 43 getCoerceToType()->print(OS); 44 break; 45 case Indirect: 46 OS << "Indirect Align=" << getIndirectAlign(); 47 break; 48 case Expand: 49 OS << "Expand"; 50 break; 51 } 52 OS << ")\n"; 53} 54 55TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 56 57static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 58 59/// isEmptyField - Return true iff a the field is "empty", that is it 60/// is an unnamed bit-field or an (array of) empty record(s). 61static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 62 bool AllowArrays) { 63 if (FD->isUnnamedBitfield()) 64 return true; 65 66 QualType FT = FD->getType(); 67 68 // Constant arrays of empty records count as empty, strip them off. 69 if (AllowArrays) 70 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 71 FT = AT->getElementType(); 72 73 return isEmptyRecord(Context, FT, AllowArrays); 74} 75 76/// isEmptyRecord - Return true iff a structure contains only empty 77/// fields. Note that a structure with a flexible array member is not 78/// considered empty. 79static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 80 const RecordType *RT = T->getAs<RecordType>(); 81 if (!RT) 82 return 0; 83 const RecordDecl *RD = RT->getDecl(); 84 if (RD->hasFlexibleArrayMember()) 85 return false; 86 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 87 i != e; ++i) 88 if (!isEmptyField(Context, *i, AllowArrays)) 89 return false; 90 return true; 91} 92 93/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 94/// a non-trivial destructor or a non-trivial copy constructor. 95static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 96 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 97 if (!RD) 98 return false; 99 100 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 101} 102 103/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 104/// a record type with either a non-trivial destructor or a non-trivial copy 105/// constructor. 106static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 107 const RecordType *RT = T->getAs<RecordType>(); 108 if (!RT) 109 return false; 110 111 return hasNonTrivialDestructorOrCopyConstructor(RT); 112} 113 114/// isSingleElementStruct - Determine if a structure is a "single 115/// element struct", i.e. it has exactly one non-empty field or 116/// exactly one field which is itself a single element 117/// struct. Structures with flexible array members are never 118/// considered single element structs. 119/// 120/// \return The field declaration for the single non-empty field, if 121/// it exists. 122static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 123 const RecordType *RT = T->getAsStructureType(); 124 if (!RT) 125 return 0; 126 127 const RecordDecl *RD = RT->getDecl(); 128 if (RD->hasFlexibleArrayMember()) 129 return 0; 130 131 const Type *Found = 0; 132 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 133 i != e; ++i) { 134 const FieldDecl *FD = *i; 135 QualType FT = FD->getType(); 136 137 // Ignore empty fields. 138 if (isEmptyField(Context, FD, true)) 139 continue; 140 141 // If we already found an element then this isn't a single-element 142 // struct. 143 if (Found) 144 return 0; 145 146 // Treat single element arrays as the element. 147 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 148 if (AT->getSize().getZExtValue() != 1) 149 break; 150 FT = AT->getElementType(); 151 } 152 153 if (!CodeGenFunction::hasAggregateLLVMType(FT)) { 154 Found = FT.getTypePtr(); 155 } else { 156 Found = isSingleElementStruct(FT, Context); 157 if (!Found) 158 return 0; 159 } 160 } 161 162 return Found; 163} 164 165static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 166 if (!Ty->getAs<BuiltinType>() && !Ty->isAnyPointerType() && 167 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 168 !Ty->isBlockPointerType()) 169 return false; 170 171 uint64_t Size = Context.getTypeSize(Ty); 172 return Size == 32 || Size == 64; 173} 174 175/// canExpandIndirectArgument - Test whether an argument type which is to be 176/// passed indirectly (on the stack) would have the equivalent layout if it was 177/// expanded into separate arguments. If so, we prefer to do the latter to avoid 178/// inhibiting optimizations. 179/// 180// FIXME: This predicate is missing many cases, currently it just follows 181// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 182// should probably make this smarter, or better yet make the LLVM backend 183// capable of handling it. 184static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 185 // We can only expand structure types. 186 const RecordType *RT = Ty->getAs<RecordType>(); 187 if (!RT) 188 return false; 189 190 // We can only expand (C) structures. 191 // 192 // FIXME: This needs to be generalized to handle classes as well. 193 const RecordDecl *RD = RT->getDecl(); 194 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 195 return false; 196 197 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 198 i != e; ++i) { 199 const FieldDecl *FD = *i; 200 201 if (!is32Or64BitBasicType(FD->getType(), Context)) 202 return false; 203 204 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 205 // how to expand them yet, and the predicate for telling if a bitfield still 206 // counts as "basic" is more complicated than what we were doing previously. 207 if (FD->isBitField()) 208 return false; 209 } 210 211 return true; 212} 213 214static bool typeContainsSSEVector(const RecordDecl *RD, ASTContext &Context) { 215 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 216 i != e; ++i) { 217 const FieldDecl *FD = *i; 218 219 if (FD->getType()->isVectorType() && 220 Context.getTypeSize(FD->getType()) >= 128) 221 return true; 222 223 if (const RecordType* RT = FD->getType()->getAs<RecordType>()) 224 if (typeContainsSSEVector(RT->getDecl(), Context)) 225 return true; 226 } 227 228 return false; 229} 230 231namespace { 232/// DefaultABIInfo - The default implementation for ABI specific 233/// details. This implementation provides information which results in 234/// self-consistent and sensible LLVM IR generation, but does not 235/// conform to any particular ABI. 236class DefaultABIInfo : public ABIInfo { 237 ABIArgInfo classifyReturnType(QualType RetTy, 238 ASTContext &Context, 239 llvm::LLVMContext &VMContext) const; 240 241 ABIArgInfo classifyArgumentType(QualType RetTy, 242 ASTContext &Context, 243 llvm::LLVMContext &VMContext) const; 244 245 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 246 llvm::LLVMContext &VMContext) const { 247 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 248 VMContext); 249 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 250 it != ie; ++it) 251 it->info = classifyArgumentType(it->type, Context, VMContext); 252 } 253 254 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 255 CodeGenFunction &CGF) const; 256}; 257 258class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 259public: 260 DefaultTargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 261}; 262 263llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 264 CodeGenFunction &CGF) const { 265 return 0; 266} 267 268ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty, 269 ASTContext &Context, 270 llvm::LLVMContext &VMContext) const { 271 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 272 return ABIArgInfo::getIndirect(0); 273 } else { 274 // Treat an enum type as its underlying type. 275 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 276 Ty = EnumTy->getDecl()->getIntegerType(); 277 278 return (Ty->isPromotableIntegerType() ? 279 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 280 } 281} 282 283/// X86_32ABIInfo - The X86-32 ABI information. 284class X86_32ABIInfo : public ABIInfo { 285 ASTContext &Context; 286 bool IsDarwinVectorABI; 287 bool IsSmallStructInRegABI; 288 289 static bool isRegisterSize(unsigned Size) { 290 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 291 } 292 293 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 294 295 static unsigned getIndirectArgumentAlignment(QualType Ty, 296 ASTContext &Context); 297 298public: 299 ABIArgInfo classifyReturnType(QualType RetTy, 300 ASTContext &Context, 301 llvm::LLVMContext &VMContext) const; 302 303 ABIArgInfo classifyArgumentType(QualType RetTy, 304 ASTContext &Context, 305 llvm::LLVMContext &VMContext) const; 306 307 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 308 llvm::LLVMContext &VMContext) const { 309 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 310 VMContext); 311 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 312 it != ie; ++it) 313 it->info = classifyArgumentType(it->type, Context, VMContext); 314 } 315 316 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 317 CodeGenFunction &CGF) const; 318 319 X86_32ABIInfo(ASTContext &Context, bool d, bool p) 320 : ABIInfo(), Context(Context), IsDarwinVectorABI(d), 321 IsSmallStructInRegABI(p) {} 322}; 323 324class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 325public: 326 X86_32TargetCodeGenInfo(ASTContext &Context, bool d, bool p) 327 :TargetCodeGenInfo(new X86_32ABIInfo(Context, d, p)) {} 328}; 329 330} 331 332/// shouldReturnTypeInRegister - Determine if the given type should be 333/// passed in a register (for the Darwin ABI). 334bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 335 ASTContext &Context) { 336 uint64_t Size = Context.getTypeSize(Ty); 337 338 // Type must be register sized. 339 if (!isRegisterSize(Size)) 340 return false; 341 342 if (Ty->isVectorType()) { 343 // 64- and 128- bit vectors inside structures are not returned in 344 // registers. 345 if (Size == 64 || Size == 128) 346 return false; 347 348 return true; 349 } 350 351 // If this is a builtin, pointer, enum, or complex type, it is ok. 352 if (Ty->getAs<BuiltinType>() || Ty->isAnyPointerType() || 353 Ty->isAnyComplexType() || Ty->isEnumeralType() || 354 Ty->isBlockPointerType()) 355 return true; 356 357 // Arrays are treated like records. 358 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 359 return shouldReturnTypeInRegister(AT->getElementType(), Context); 360 361 // Otherwise, it must be a record type. 362 const RecordType *RT = Ty->getAs<RecordType>(); 363 if (!RT) return false; 364 365 // FIXME: Traverse bases here too. 366 367 // Structure types are passed in register if all fields would be 368 // passed in a register. 369 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 370 e = RT->getDecl()->field_end(); i != e; ++i) { 371 const FieldDecl *FD = *i; 372 373 // Empty fields are ignored. 374 if (isEmptyField(Context, FD, true)) 375 continue; 376 377 // Check fields recursively. 378 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 379 return false; 380 } 381 382 return true; 383} 384 385ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 386 ASTContext &Context, 387 llvm::LLVMContext &VMContext) const { 388 if (RetTy->isVoidType()) { 389 return ABIArgInfo::getIgnore(); 390 } else if (const VectorType *VT = RetTy->getAs<VectorType>()) { 391 // On Darwin, some vectors are returned in registers. 392 if (IsDarwinVectorABI) { 393 uint64_t Size = Context.getTypeSize(RetTy); 394 395 // 128-bit vectors are a special case; they are returned in 396 // registers and we need to make sure to pick a type the LLVM 397 // backend will like. 398 if (Size == 128) 399 return ABIArgInfo::getCoerce(llvm::VectorType::get( 400 llvm::Type::getInt64Ty(VMContext), 2)); 401 402 // Always return in register if it fits in a general purpose 403 // register, or if it is 64 bits and has a single element. 404 if ((Size == 8 || Size == 16 || Size == 32) || 405 (Size == 64 && VT->getNumElements() == 1)) 406 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 407 408 return ABIArgInfo::getIndirect(0); 409 } 410 411 return ABIArgInfo::getDirect(); 412 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 413 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 414 // Structures with either a non-trivial destructor or a non-trivial 415 // copy constructor are always indirect. 416 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 417 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 418 419 // Structures with flexible arrays are always indirect. 420 if (RT->getDecl()->hasFlexibleArrayMember()) 421 return ABIArgInfo::getIndirect(0); 422 } 423 424 // If specified, structs and unions are always indirect. 425 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 426 return ABIArgInfo::getIndirect(0); 427 428 // Classify "single element" structs as their element type. 429 if (const Type *SeltTy = isSingleElementStruct(RetTy, Context)) { 430 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 431 if (BT->isIntegerType()) { 432 // We need to use the size of the structure, padding 433 // bit-fields can adjust that to be larger than the single 434 // element type. 435 uint64_t Size = Context.getTypeSize(RetTy); 436 return ABIArgInfo::getCoerce( 437 llvm::IntegerType::get(VMContext, (unsigned) Size)); 438 } else if (BT->getKind() == BuiltinType::Float) { 439 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 440 "Unexpect single element structure size!"); 441 return ABIArgInfo::getCoerce(llvm::Type::getFloatTy(VMContext)); 442 } else if (BT->getKind() == BuiltinType::Double) { 443 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 444 "Unexpect single element structure size!"); 445 return ABIArgInfo::getCoerce(llvm::Type::getDoubleTy(VMContext)); 446 } 447 } else if (SeltTy->isPointerType()) { 448 // FIXME: It would be really nice if this could come out as the proper 449 // pointer type. 450 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(VMContext); 451 return ABIArgInfo::getCoerce(PtrTy); 452 } else if (SeltTy->isVectorType()) { 453 // 64- and 128-bit vectors are never returned in a 454 // register when inside a structure. 455 uint64_t Size = Context.getTypeSize(RetTy); 456 if (Size == 64 || Size == 128) 457 return ABIArgInfo::getIndirect(0); 458 459 return classifyReturnType(QualType(SeltTy, 0), Context, VMContext); 460 } 461 } 462 463 // Small structures which are register sized are generally returned 464 // in a register. 465 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, Context)) { 466 uint64_t Size = Context.getTypeSize(RetTy); 467 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 468 } 469 470 return ABIArgInfo::getIndirect(0); 471 } else { 472 // Treat an enum type as its underlying type. 473 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 474 RetTy = EnumTy->getDecl()->getIntegerType(); 475 476 return (RetTy->isPromotableIntegerType() ? 477 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 478 } 479} 480 481unsigned X86_32ABIInfo::getIndirectArgumentAlignment(QualType Ty, 482 ASTContext &Context) { 483 unsigned Align = Context.getTypeAlign(Ty); 484 if (Align < 128) return 0; 485 if (const RecordType* RT = Ty->getAs<RecordType>()) 486 if (typeContainsSSEVector(RT->getDecl(), Context)) 487 return 16; 488 return 0; 489} 490 491ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 492 ASTContext &Context, 493 llvm::LLVMContext &VMContext) const { 494 // FIXME: Set alignment on indirect arguments. 495 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 496 // Structures with flexible arrays are always indirect. 497 if (const RecordType *RT = Ty->getAs<RecordType>()) { 498 // Structures with either a non-trivial destructor or a non-trivial 499 // copy constructor are always indirect. 500 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 501 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 502 503 if (RT->getDecl()->hasFlexibleArrayMember()) 504 return ABIArgInfo::getIndirect(getIndirectArgumentAlignment(Ty, 505 Context)); 506 } 507 508 // Ignore empty structs. 509 if (Ty->isStructureType() && Context.getTypeSize(Ty) == 0) 510 return ABIArgInfo::getIgnore(); 511 512 // Expand small (<= 128-bit) record types when we know that the stack layout 513 // of those arguments will match the struct. This is important because the 514 // LLVM backend isn't smart enough to remove byval, which inhibits many 515 // optimizations. 516 if (Context.getTypeSize(Ty) <= 4*32 && 517 canExpandIndirectArgument(Ty, Context)) 518 return ABIArgInfo::getExpand(); 519 520 return ABIArgInfo::getIndirect(getIndirectArgumentAlignment(Ty, Context)); 521 } else { 522 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 523 Ty = EnumTy->getDecl()->getIntegerType(); 524 525 return (Ty->isPromotableIntegerType() ? 526 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 527 } 528} 529 530llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 531 CodeGenFunction &CGF) const { 532 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 533 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 534 535 CGBuilderTy &Builder = CGF.Builder; 536 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 537 "ap"); 538 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 539 llvm::Type *PTy = 540 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 541 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 542 543 uint64_t Offset = 544 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 545 llvm::Value *NextAddr = 546 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 547 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 548 "ap.next"); 549 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 550 551 return AddrTyped; 552} 553 554namespace { 555/// X86_64ABIInfo - The X86_64 ABI information. 556class X86_64ABIInfo : public ABIInfo { 557 enum Class { 558 Integer = 0, 559 SSE, 560 SSEUp, 561 X87, 562 X87Up, 563 ComplexX87, 564 NoClass, 565 Memory 566 }; 567 568 /// merge - Implement the X86_64 ABI merging algorithm. 569 /// 570 /// Merge an accumulating classification \arg Accum with a field 571 /// classification \arg Field. 572 /// 573 /// \param Accum - The accumulating classification. This should 574 /// always be either NoClass or the result of a previous merge 575 /// call. In addition, this should never be Memory (the caller 576 /// should just return Memory for the aggregate). 577 Class merge(Class Accum, Class Field) const; 578 579 /// classify - Determine the x86_64 register classes in which the 580 /// given type T should be passed. 581 /// 582 /// \param Lo - The classification for the parts of the type 583 /// residing in the low word of the containing object. 584 /// 585 /// \param Hi - The classification for the parts of the type 586 /// residing in the high word of the containing object. 587 /// 588 /// \param OffsetBase - The bit offset of this type in the 589 /// containing object. Some parameters are classified different 590 /// depending on whether they straddle an eightbyte boundary. 591 /// 592 /// If a word is unused its result will be NoClass; if a type should 593 /// be passed in Memory then at least the classification of \arg Lo 594 /// will be Memory. 595 /// 596 /// The \arg Lo class will be NoClass iff the argument is ignored. 597 /// 598 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 599 /// also be ComplexX87. 600 void classify(QualType T, ASTContext &Context, uint64_t OffsetBase, 601 Class &Lo, Class &Hi) const; 602 603 /// getCoerceResult - Given a source type \arg Ty and an LLVM type 604 /// to coerce to, chose the best way to pass Ty in the same place 605 /// that \arg CoerceTo would be passed, but while keeping the 606 /// emitted code as simple as possible. 607 /// 608 /// FIXME: Note, this should be cleaned up to just take an enumeration of all 609 /// the ways we might want to pass things, instead of constructing an LLVM 610 /// type. This makes this code more explicit, and it makes it clearer that we 611 /// are also doing this for correctness in the case of passing scalar types. 612 ABIArgInfo getCoerceResult(QualType Ty, 613 const llvm::Type *CoerceTo, 614 ASTContext &Context) const; 615 616 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 617 /// such that the argument will be passed in memory. 618 ABIArgInfo getIndirectResult(QualType Ty, 619 ASTContext &Context) const; 620 621 ABIArgInfo classifyReturnType(QualType RetTy, 622 ASTContext &Context, 623 llvm::LLVMContext &VMContext) const; 624 625 ABIArgInfo classifyArgumentType(QualType Ty, 626 ASTContext &Context, 627 llvm::LLVMContext &VMContext, 628 unsigned &neededInt, 629 unsigned &neededSSE) const; 630 631public: 632 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 633 llvm::LLVMContext &VMContext) const; 634 635 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 636 CodeGenFunction &CGF) const; 637}; 638 639class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 640public: 641 X86_64TargetCodeGenInfo():TargetCodeGenInfo(new X86_64ABIInfo()) {} 642}; 643 644} 645 646X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, 647 Class Field) const { 648 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 649 // classified recursively so that always two fields are 650 // considered. The resulting class is calculated according to 651 // the classes of the fields in the eightbyte: 652 // 653 // (a) If both classes are equal, this is the resulting class. 654 // 655 // (b) If one of the classes is NO_CLASS, the resulting class is 656 // the other class. 657 // 658 // (c) If one of the classes is MEMORY, the result is the MEMORY 659 // class. 660 // 661 // (d) If one of the classes is INTEGER, the result is the 662 // INTEGER. 663 // 664 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 665 // MEMORY is used as class. 666 // 667 // (f) Otherwise class SSE is used. 668 669 // Accum should never be memory (we should have returned) or 670 // ComplexX87 (because this cannot be passed in a structure). 671 assert((Accum != Memory && Accum != ComplexX87) && 672 "Invalid accumulated classification during merge."); 673 if (Accum == Field || Field == NoClass) 674 return Accum; 675 else if (Field == Memory) 676 return Memory; 677 else if (Accum == NoClass) 678 return Field; 679 else if (Accum == Integer || Field == Integer) 680 return Integer; 681 else if (Field == X87 || Field == X87Up || Field == ComplexX87 || 682 Accum == X87 || Accum == X87Up) 683 return Memory; 684 else 685 return SSE; 686} 687 688void X86_64ABIInfo::classify(QualType Ty, 689 ASTContext &Context, 690 uint64_t OffsetBase, 691 Class &Lo, Class &Hi) const { 692 // FIXME: This code can be simplified by introducing a simple value class for 693 // Class pairs with appropriate constructor methods for the various 694 // situations. 695 696 // FIXME: Some of the split computations are wrong; unaligned vectors 697 // shouldn't be passed in registers for example, so there is no chance they 698 // can straddle an eightbyte. Verify & simplify. 699 700 Lo = Hi = NoClass; 701 702 Class &Current = OffsetBase < 64 ? Lo : Hi; 703 Current = Memory; 704 705 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 706 BuiltinType::Kind k = BT->getKind(); 707 708 if (k == BuiltinType::Void) { 709 Current = NoClass; 710 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 711 Lo = Integer; 712 Hi = Integer; 713 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 714 Current = Integer; 715 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 716 Current = SSE; 717 } else if (k == BuiltinType::LongDouble) { 718 Lo = X87; 719 Hi = X87Up; 720 } 721 // FIXME: _Decimal32 and _Decimal64 are SSE. 722 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 723 } else if (const EnumType *ET = Ty->getAs<EnumType>()) { 724 // Classify the underlying integer type. 725 classify(ET->getDecl()->getIntegerType(), Context, OffsetBase, Lo, Hi); 726 } else if (Ty->hasPointerRepresentation()) { 727 Current = Integer; 728 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 729 uint64_t Size = Context.getTypeSize(VT); 730 if (Size == 32) { 731 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 732 // float> as integer. 733 Current = Integer; 734 735 // If this type crosses an eightbyte boundary, it should be 736 // split. 737 uint64_t EB_Real = (OffsetBase) / 64; 738 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 739 if (EB_Real != EB_Imag) 740 Hi = Lo; 741 } else if (Size == 64) { 742 // gcc passes <1 x double> in memory. :( 743 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 744 return; 745 746 // gcc passes <1 x long long> as INTEGER. 747 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong)) 748 Current = Integer; 749 else 750 Current = SSE; 751 752 // If this type crosses an eightbyte boundary, it should be 753 // split. 754 if (OffsetBase && OffsetBase != 64) 755 Hi = Lo; 756 } else if (Size == 128) { 757 Lo = SSE; 758 Hi = SSEUp; 759 } 760 } else if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 761 QualType ET = Context.getCanonicalType(CT->getElementType()); 762 763 uint64_t Size = Context.getTypeSize(Ty); 764 if (ET->isIntegralType()) { 765 if (Size <= 64) 766 Current = Integer; 767 else if (Size <= 128) 768 Lo = Hi = Integer; 769 } else if (ET == Context.FloatTy) 770 Current = SSE; 771 else if (ET == Context.DoubleTy) 772 Lo = Hi = SSE; 773 else if (ET == Context.LongDoubleTy) 774 Current = ComplexX87; 775 776 // If this complex type crosses an eightbyte boundary then it 777 // should be split. 778 uint64_t EB_Real = (OffsetBase) / 64; 779 uint64_t EB_Imag = (OffsetBase + Context.getTypeSize(ET)) / 64; 780 if (Hi == NoClass && EB_Real != EB_Imag) 781 Hi = Lo; 782 } else if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 783 // Arrays are treated like structures. 784 785 uint64_t Size = Context.getTypeSize(Ty); 786 787 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 788 // than two eightbytes, ..., it has class MEMORY. 789 if (Size > 128) 790 return; 791 792 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 793 // fields, it has class MEMORY. 794 // 795 // Only need to check alignment of array base. 796 if (OffsetBase % Context.getTypeAlign(AT->getElementType())) 797 return; 798 799 // Otherwise implement simplified merge. We could be smarter about 800 // this, but it isn't worth it and would be harder to verify. 801 Current = NoClass; 802 uint64_t EltSize = Context.getTypeSize(AT->getElementType()); 803 uint64_t ArraySize = AT->getSize().getZExtValue(); 804 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 805 Class FieldLo, FieldHi; 806 classify(AT->getElementType(), Context, Offset, FieldLo, FieldHi); 807 Lo = merge(Lo, FieldLo); 808 Hi = merge(Hi, FieldHi); 809 if (Lo == Memory || Hi == Memory) 810 break; 811 } 812 813 // Do post merger cleanup (see below). Only case we worry about is Memory. 814 if (Hi == Memory) 815 Lo = Memory; 816 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 817 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 818 uint64_t Size = Context.getTypeSize(Ty); 819 820 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 821 // than two eightbytes, ..., it has class MEMORY. 822 if (Size > 128) 823 return; 824 825 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 826 // copy constructor or a non-trivial destructor, it is passed by invisible 827 // reference. 828 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 829 return; 830 831 const RecordDecl *RD = RT->getDecl(); 832 833 // Assume variable sized types are passed in memory. 834 if (RD->hasFlexibleArrayMember()) 835 return; 836 837 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 838 839 // Reset Lo class, this will be recomputed. 840 Current = NoClass; 841 842 // If this is a C++ record, classify the bases first. 843 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 844 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 845 e = CXXRD->bases_end(); i != e; ++i) { 846 assert(!i->isVirtual() && !i->getType()->isDependentType() && 847 "Unexpected base class!"); 848 const CXXRecordDecl *Base = 849 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 850 851 // Classify this field. 852 // 853 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 854 // single eightbyte, each is classified separately. Each eightbyte gets 855 // initialized to class NO_CLASS. 856 Class FieldLo, FieldHi; 857 uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base); 858 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 859 Lo = merge(Lo, FieldLo); 860 Hi = merge(Hi, FieldHi); 861 if (Lo == Memory || Hi == Memory) 862 break; 863 } 864 865 // If this record has no fields but isn't empty, classify as INTEGER. 866 if (RD->field_empty() && Size) 867 Current = Integer; 868 } 869 870 // Classify the fields one at a time, merging the results. 871 unsigned idx = 0; 872 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 873 i != e; ++i, ++idx) { 874 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 875 bool BitField = i->isBitField(); 876 877 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 878 // fields, it has class MEMORY. 879 // 880 // Note, skip this test for bit-fields, see below. 881 if (!BitField && Offset % Context.getTypeAlign(i->getType())) { 882 Lo = Memory; 883 return; 884 } 885 886 // Classify this field. 887 // 888 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 889 // exceeds a single eightbyte, each is classified 890 // separately. Each eightbyte gets initialized to class 891 // NO_CLASS. 892 Class FieldLo, FieldHi; 893 894 // Bit-fields require special handling, they do not force the 895 // structure to be passed in memory even if unaligned, and 896 // therefore they can straddle an eightbyte. 897 if (BitField) { 898 // Ignore padding bit-fields. 899 if (i->isUnnamedBitfield()) 900 continue; 901 902 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 903 uint64_t Size = i->getBitWidth()->EvaluateAsInt(Context).getZExtValue(); 904 905 uint64_t EB_Lo = Offset / 64; 906 uint64_t EB_Hi = (Offset + Size - 1) / 64; 907 FieldLo = FieldHi = NoClass; 908 if (EB_Lo) { 909 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 910 FieldLo = NoClass; 911 FieldHi = Integer; 912 } else { 913 FieldLo = Integer; 914 FieldHi = EB_Hi ? Integer : NoClass; 915 } 916 } else 917 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 918 Lo = merge(Lo, FieldLo); 919 Hi = merge(Hi, FieldHi); 920 if (Lo == Memory || Hi == Memory) 921 break; 922 } 923 924 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 925 // 926 // (a) If one of the classes is MEMORY, the whole argument is 927 // passed in memory. 928 // 929 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 930 931 // The first of these conditions is guaranteed by how we implement 932 // the merge (just bail). 933 // 934 // The second condition occurs in the case of unions; for example 935 // union { _Complex double; unsigned; }. 936 if (Hi == Memory) 937 Lo = Memory; 938 if (Hi == SSEUp && Lo != SSE) 939 Hi = SSE; 940 } 941} 942 943ABIArgInfo X86_64ABIInfo::getCoerceResult(QualType Ty, 944 const llvm::Type *CoerceTo, 945 ASTContext &Context) const { 946 if (CoerceTo == llvm::Type::getInt64Ty(CoerceTo->getContext())) { 947 // Integer and pointer types will end up in a general purpose 948 // register. 949 950 // Treat an enum type as its underlying type. 951 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 952 Ty = EnumTy->getDecl()->getIntegerType(); 953 954 if (Ty->isIntegralType() || Ty->hasPointerRepresentation()) 955 return (Ty->isPromotableIntegerType() ? 956 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 957 } else if (CoerceTo == llvm::Type::getDoubleTy(CoerceTo->getContext())) { 958 // FIXME: It would probably be better to make CGFunctionInfo only map using 959 // canonical types than to canonize here. 960 QualType CTy = Context.getCanonicalType(Ty); 961 962 // Float and double end up in a single SSE reg. 963 if (CTy == Context.FloatTy || CTy == Context.DoubleTy) 964 return ABIArgInfo::getDirect(); 965 966 } 967 968 return ABIArgInfo::getCoerce(CoerceTo); 969} 970 971ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 972 ASTContext &Context) const { 973 // If this is a scalar LLVM value then assume LLVM will pass it in the right 974 // place naturally. 975 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 976 // Treat an enum type as its underlying type. 977 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 978 Ty = EnumTy->getDecl()->getIntegerType(); 979 980 return (Ty->isPromotableIntegerType() ? 981 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 982 } 983 984 bool ByVal = !isRecordWithNonTrivialDestructorOrCopyConstructor(Ty); 985 986 // FIXME: Set alignment correctly. 987 return ABIArgInfo::getIndirect(0, ByVal); 988} 989 990ABIArgInfo X86_64ABIInfo::classifyReturnType(QualType RetTy, 991 ASTContext &Context, 992 llvm::LLVMContext &VMContext) const { 993 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 994 // classification algorithm. 995 X86_64ABIInfo::Class Lo, Hi; 996 classify(RetTy, Context, 0, Lo, Hi); 997 998 // Check some invariants. 999 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1000 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1001 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1002 1003 const llvm::Type *ResType = 0; 1004 switch (Lo) { 1005 case NoClass: 1006 return ABIArgInfo::getIgnore(); 1007 1008 case SSEUp: 1009 case X87Up: 1010 assert(0 && "Invalid classification for lo word."); 1011 1012 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1013 // hidden argument. 1014 case Memory: 1015 return getIndirectResult(RetTy, Context); 1016 1017 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1018 // available register of the sequence %rax, %rdx is used. 1019 case Integer: 1020 ResType = llvm::Type::getInt64Ty(VMContext); break; 1021 1022 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1023 // available SSE register of the sequence %xmm0, %xmm1 is used. 1024 case SSE: 1025 ResType = llvm::Type::getDoubleTy(VMContext); break; 1026 1027 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1028 // returned on the X87 stack in %st0 as 80-bit x87 number. 1029 case X87: 1030 ResType = llvm::Type::getX86_FP80Ty(VMContext); break; 1031 1032 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1033 // part of the value is returned in %st0 and the imaginary part in 1034 // %st1. 1035 case ComplexX87: 1036 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1037 ResType = llvm::StructType::get(VMContext, llvm::Type::getX86_FP80Ty(VMContext), 1038 llvm::Type::getX86_FP80Ty(VMContext), 1039 NULL); 1040 break; 1041 } 1042 1043 switch (Hi) { 1044 // Memory was handled previously and X87 should 1045 // never occur as a hi class. 1046 case Memory: 1047 case X87: 1048 assert(0 && "Invalid classification for hi word."); 1049 1050 case ComplexX87: // Previously handled. 1051 case NoClass: break; 1052 1053 case Integer: 1054 ResType = llvm::StructType::get(VMContext, ResType, 1055 llvm::Type::getInt64Ty(VMContext), NULL); 1056 break; 1057 case SSE: 1058 ResType = llvm::StructType::get(VMContext, ResType, 1059 llvm::Type::getDoubleTy(VMContext), NULL); 1060 break; 1061 1062 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1063 // is passed in the upper half of the last used SSE register. 1064 // 1065 // SSEUP should always be preceeded by SSE, just widen. 1066 case SSEUp: 1067 assert(Lo == SSE && "Unexpected SSEUp classification."); 1068 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1069 break; 1070 1071 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1072 // returned together with the previous X87 value in %st0. 1073 case X87Up: 1074 // If X87Up is preceeded by X87, we don't need to do 1075 // anything. However, in some cases with unions it may not be 1076 // preceeded by X87. In such situations we follow gcc and pass the 1077 // extra bits in an SSE reg. 1078 if (Lo != X87) 1079 ResType = llvm::StructType::get(VMContext, ResType, 1080 llvm::Type::getDoubleTy(VMContext), NULL); 1081 break; 1082 } 1083 1084 return getCoerceResult(RetTy, ResType, Context); 1085} 1086 1087ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, ASTContext &Context, 1088 llvm::LLVMContext &VMContext, 1089 unsigned &neededInt, 1090 unsigned &neededSSE) const { 1091 X86_64ABIInfo::Class Lo, Hi; 1092 classify(Ty, Context, 0, Lo, Hi); 1093 1094 // Check some invariants. 1095 // FIXME: Enforce these by construction. 1096 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1097 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1098 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1099 1100 neededInt = 0; 1101 neededSSE = 0; 1102 const llvm::Type *ResType = 0; 1103 switch (Lo) { 1104 case NoClass: 1105 return ABIArgInfo::getIgnore(); 1106 1107 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1108 // on the stack. 1109 case Memory: 1110 1111 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1112 // COMPLEX_X87, it is passed in memory. 1113 case X87: 1114 case ComplexX87: 1115 return getIndirectResult(Ty, Context); 1116 1117 case SSEUp: 1118 case X87Up: 1119 assert(0 && "Invalid classification for lo word."); 1120 1121 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1122 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1123 // and %r9 is used. 1124 case Integer: 1125 ++neededInt; 1126 ResType = llvm::Type::getInt64Ty(VMContext); 1127 break; 1128 1129 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1130 // available SSE register is used, the registers are taken in the 1131 // order from %xmm0 to %xmm7. 1132 case SSE: 1133 ++neededSSE; 1134 ResType = llvm::Type::getDoubleTy(VMContext); 1135 break; 1136 } 1137 1138 switch (Hi) { 1139 // Memory was handled previously, ComplexX87 and X87 should 1140 // never occur as hi classes, and X87Up must be preceed by X87, 1141 // which is passed in memory. 1142 case Memory: 1143 case X87: 1144 case ComplexX87: 1145 assert(0 && "Invalid classification for hi word."); 1146 break; 1147 1148 case NoClass: break; 1149 case Integer: 1150 ResType = llvm::StructType::get(VMContext, ResType, 1151 llvm::Type::getInt64Ty(VMContext), NULL); 1152 ++neededInt; 1153 break; 1154 1155 // X87Up generally doesn't occur here (long double is passed in 1156 // memory), except in situations involving unions. 1157 case X87Up: 1158 case SSE: 1159 ResType = llvm::StructType::get(VMContext, ResType, 1160 llvm::Type::getDoubleTy(VMContext), NULL); 1161 ++neededSSE; 1162 break; 1163 1164 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1165 // eightbyte is passed in the upper half of the last used SSE 1166 // register. 1167 case SSEUp: 1168 assert(Lo == SSE && "Unexpected SSEUp classification."); 1169 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1170 break; 1171 } 1172 1173 return getCoerceResult(Ty, ResType, Context); 1174} 1175 1176void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1177 llvm::LLVMContext &VMContext) const { 1178 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 1179 Context, VMContext); 1180 1181 // Keep track of the number of assigned registers. 1182 unsigned freeIntRegs = 6, freeSSERegs = 8; 1183 1184 // If the return value is indirect, then the hidden argument is consuming one 1185 // integer register. 1186 if (FI.getReturnInfo().isIndirect()) 1187 --freeIntRegs; 1188 1189 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1190 // get assigned (in left-to-right order) for passing as follows... 1191 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1192 it != ie; ++it) { 1193 unsigned neededInt, neededSSE; 1194 it->info = classifyArgumentType(it->type, Context, VMContext, 1195 neededInt, neededSSE); 1196 1197 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1198 // eightbyte of an argument, the whole argument is passed on the 1199 // stack. If registers have already been assigned for some 1200 // eightbytes of such an argument, the assignments get reverted. 1201 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1202 freeIntRegs -= neededInt; 1203 freeSSERegs -= neededSSE; 1204 } else { 1205 it->info = getIndirectResult(it->type, Context); 1206 } 1207 } 1208} 1209 1210static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1211 QualType Ty, 1212 CodeGenFunction &CGF) { 1213 llvm::Value *overflow_arg_area_p = 1214 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1215 llvm::Value *overflow_arg_area = 1216 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1217 1218 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1219 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1220 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1221 if (Align > 8) { 1222 // Note that we follow the ABI & gcc here, even though the type 1223 // could in theory have an alignment greater than 16. This case 1224 // shouldn't ever matter in practice. 1225 1226 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1227 llvm::Value *Offset = 1228 llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 15); 1229 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1230 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1231 llvm::Type::getInt64Ty(CGF.getLLVMContext())); 1232 llvm::Value *Mask = llvm::ConstantInt::get( 1233 llvm::Type::getInt64Ty(CGF.getLLVMContext()), ~15LL); 1234 overflow_arg_area = 1235 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1236 overflow_arg_area->getType(), 1237 "overflow_arg_area.align"); 1238 } 1239 1240 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1241 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1242 llvm::Value *Res = 1243 CGF.Builder.CreateBitCast(overflow_arg_area, 1244 llvm::PointerType::getUnqual(LTy)); 1245 1246 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1247 // l->overflow_arg_area + sizeof(type). 1248 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1249 // an 8 byte boundary. 1250 1251 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1252 llvm::Value *Offset = 1253 llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 1254 (SizeInBytes + 7) & ~7); 1255 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1256 "overflow_arg_area.next"); 1257 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1258 1259 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1260 return Res; 1261} 1262 1263llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1264 CodeGenFunction &CGF) const { 1265 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1266 const llvm::Type *i32Ty = llvm::Type::getInt32Ty(VMContext); 1267 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 1268 1269 // Assume that va_list type is correct; should be pointer to LLVM type: 1270 // struct { 1271 // i32 gp_offset; 1272 // i32 fp_offset; 1273 // i8* overflow_arg_area; 1274 // i8* reg_save_area; 1275 // }; 1276 unsigned neededInt, neededSSE; 1277 ABIArgInfo AI = classifyArgumentType(Ty, CGF.getContext(), VMContext, 1278 neededInt, neededSSE); 1279 1280 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1281 // in the registers. If not go to step 7. 1282 if (!neededInt && !neededSSE) 1283 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1284 1285 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1286 // general purpose registers needed to pass type and num_fp to hold 1287 // the number of floating point registers needed. 1288 1289 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1290 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1291 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1292 // 1293 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1294 // register save space). 1295 1296 llvm::Value *InRegs = 0; 1297 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1298 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1299 if (neededInt) { 1300 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1301 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1302 InRegs = 1303 CGF.Builder.CreateICmpULE(gp_offset, 1304 llvm::ConstantInt::get(i32Ty, 1305 48 - neededInt * 8), 1306 "fits_in_gp"); 1307 } 1308 1309 if (neededSSE) { 1310 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1311 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1312 llvm::Value *FitsInFP = 1313 CGF.Builder.CreateICmpULE(fp_offset, 1314 llvm::ConstantInt::get(i32Ty, 1315 176 - neededSSE * 16), 1316 "fits_in_fp"); 1317 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1318 } 1319 1320 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1321 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1322 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1323 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1324 1325 // Emit code to load the value if it was passed in registers. 1326 1327 CGF.EmitBlock(InRegBlock); 1328 1329 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1330 // an offset of l->gp_offset and/or l->fp_offset. This may require 1331 // copying to a temporary location in case the parameter is passed 1332 // in different register classes or requires an alignment greater 1333 // than 8 for general purpose registers and 16 for XMM registers. 1334 // 1335 // FIXME: This really results in shameful code when we end up needing to 1336 // collect arguments from different places; often what should result in a 1337 // simple assembling of a structure from scattered addresses has many more 1338 // loads than necessary. Can we clean this up? 1339 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1340 llvm::Value *RegAddr = 1341 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1342 "reg_save_area"); 1343 if (neededInt && neededSSE) { 1344 // FIXME: Cleanup. 1345 assert(AI.isCoerce() && "Unexpected ABI info for mixed regs"); 1346 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1347 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1348 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1349 const llvm::Type *TyLo = ST->getElementType(0); 1350 const llvm::Type *TyHi = ST->getElementType(1); 1351 assert((TyLo->isFloatingPoint() ^ TyHi->isFloatingPoint()) && 1352 "Unexpected ABI info for mixed regs"); 1353 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1354 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1355 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1356 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1357 llvm::Value *RegLoAddr = TyLo->isFloatingPoint() ? FPAddr : GPAddr; 1358 llvm::Value *RegHiAddr = TyLo->isFloatingPoint() ? GPAddr : FPAddr; 1359 llvm::Value *V = 1360 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 1361 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1362 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 1363 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1364 1365 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1366 llvm::PointerType::getUnqual(LTy)); 1367 } else if (neededInt) { 1368 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1369 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1370 llvm::PointerType::getUnqual(LTy)); 1371 } else { 1372 if (neededSSE == 1) { 1373 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1374 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1375 llvm::PointerType::getUnqual(LTy)); 1376 } else { 1377 assert(neededSSE == 2 && "Invalid number of needed registers!"); 1378 // SSE registers are spaced 16 bytes apart in the register save 1379 // area, we need to collect the two eightbytes together. 1380 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1381 llvm::Value *RegAddrHi = 1382 CGF.Builder.CreateGEP(RegAddrLo, 1383 llvm::ConstantInt::get(i32Ty, 16)); 1384 const llvm::Type *DblPtrTy = 1385 llvm::PointerType::getUnqual(DoubleTy); 1386 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 1387 DoubleTy, NULL); 1388 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 1389 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 1390 DblPtrTy)); 1391 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1392 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 1393 DblPtrTy)); 1394 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1395 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1396 llvm::PointerType::getUnqual(LTy)); 1397 } 1398 } 1399 1400 // AMD64-ABI 3.5.7p5: Step 5. Set: 1401 // l->gp_offset = l->gp_offset + num_gp * 8 1402 // l->fp_offset = l->fp_offset + num_fp * 16. 1403 if (neededInt) { 1404 llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededInt * 8); 1405 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 1406 gp_offset_p); 1407 } 1408 if (neededSSE) { 1409 llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededSSE * 16); 1410 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 1411 fp_offset_p); 1412 } 1413 CGF.EmitBranch(ContBlock); 1414 1415 // Emit code to load the value if it was passed in memory. 1416 1417 CGF.EmitBlock(InMemBlock); 1418 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1419 1420 // Return the appropriate result. 1421 1422 CGF.EmitBlock(ContBlock); 1423 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 1424 "vaarg.addr"); 1425 ResAddr->reserveOperandSpace(2); 1426 ResAddr->addIncoming(RegAddr, InRegBlock); 1427 ResAddr->addIncoming(MemAddr, InMemBlock); 1428 1429 return ResAddr; 1430} 1431 1432// PIC16 ABI Implementation 1433 1434namespace { 1435 1436class PIC16ABIInfo : public ABIInfo { 1437 ABIArgInfo classifyReturnType(QualType RetTy, 1438 ASTContext &Context, 1439 llvm::LLVMContext &VMContext) const; 1440 1441 ABIArgInfo classifyArgumentType(QualType RetTy, 1442 ASTContext &Context, 1443 llvm::LLVMContext &VMContext) const; 1444 1445 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1446 llvm::LLVMContext &VMContext) const { 1447 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1448 VMContext); 1449 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1450 it != ie; ++it) 1451 it->info = classifyArgumentType(it->type, Context, VMContext); 1452 } 1453 1454 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1455 CodeGenFunction &CGF) const; 1456}; 1457 1458class PIC16TargetCodeGenInfo : public TargetCodeGenInfo { 1459public: 1460 PIC16TargetCodeGenInfo():TargetCodeGenInfo(new PIC16ABIInfo()) {} 1461}; 1462 1463} 1464 1465ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy, 1466 ASTContext &Context, 1467 llvm::LLVMContext &VMContext) const { 1468 if (RetTy->isVoidType()) { 1469 return ABIArgInfo::getIgnore(); 1470 } else { 1471 return ABIArgInfo::getDirect(); 1472 } 1473} 1474 1475ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty, 1476 ASTContext &Context, 1477 llvm::LLVMContext &VMContext) const { 1478 return ABIArgInfo::getDirect(); 1479} 1480 1481llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1482 CodeGenFunction &CGF) const { 1483 return 0; 1484} 1485 1486// ARM ABI Implementation 1487 1488namespace { 1489 1490class ARMABIInfo : public ABIInfo { 1491public: 1492 enum ABIKind { 1493 APCS = 0, 1494 AAPCS = 1, 1495 AAPCS_VFP 1496 }; 1497 1498private: 1499 ABIKind Kind; 1500 1501public: 1502 ARMABIInfo(ABIKind _Kind) : Kind(_Kind) {} 1503 1504private: 1505 ABIKind getABIKind() const { return Kind; } 1506 1507 ABIArgInfo classifyReturnType(QualType RetTy, 1508 ASTContext &Context, 1509 llvm::LLVMContext &VMCOntext) const; 1510 1511 ABIArgInfo classifyArgumentType(QualType RetTy, 1512 ASTContext &Context, 1513 llvm::LLVMContext &VMContext) const; 1514 1515 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1516 llvm::LLVMContext &VMContext) const; 1517 1518 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1519 CodeGenFunction &CGF) const; 1520}; 1521 1522class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 1523public: 1524 ARMTargetCodeGenInfo(ARMABIInfo::ABIKind K) 1525 :TargetCodeGenInfo(new ARMABIInfo(K)) {} 1526}; 1527 1528} 1529 1530void ARMABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1531 llvm::LLVMContext &VMContext) const { 1532 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1533 VMContext); 1534 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1535 it != ie; ++it) { 1536 it->info = classifyArgumentType(it->type, Context, VMContext); 1537 } 1538 1539 // ARM always overrides the calling convention. 1540 switch (getABIKind()) { 1541 case APCS: 1542 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 1543 break; 1544 1545 case AAPCS: 1546 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 1547 break; 1548 1549 case AAPCS_VFP: 1550 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 1551 break; 1552 } 1553} 1554 1555ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, 1556 ASTContext &Context, 1557 llvm::LLVMContext &VMContext) const { 1558 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1559 // Treat an enum type as its underlying type. 1560 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1561 Ty = EnumTy->getDecl()->getIntegerType(); 1562 1563 return (Ty->isPromotableIntegerType() ? 1564 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1565 } 1566 1567 // Ignore empty records. 1568 if (isEmptyRecord(Context, Ty, true)) 1569 return ABIArgInfo::getIgnore(); 1570 1571 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 1572 // backend doesn't support byval. 1573 // FIXME: This doesn't handle alignment > 64 bits. 1574 const llvm::Type* ElemTy; 1575 unsigned SizeRegs; 1576 if (Context.getTypeAlign(Ty) > 32) { 1577 ElemTy = llvm::Type::getInt64Ty(VMContext); 1578 SizeRegs = (Context.getTypeSize(Ty) + 63) / 64; 1579 } else { 1580 ElemTy = llvm::Type::getInt32Ty(VMContext); 1581 SizeRegs = (Context.getTypeSize(Ty) + 31) / 32; 1582 } 1583 std::vector<const llvm::Type*> LLVMFields; 1584 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 1585 const llvm::Type* STy = llvm::StructType::get(VMContext, LLVMFields, true); 1586 return ABIArgInfo::getCoerce(STy); 1587} 1588 1589static bool isIntegerLikeType(QualType Ty, 1590 ASTContext &Context, 1591 llvm::LLVMContext &VMContext) { 1592 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 1593 // is called integer-like if its size is less than or equal to one word, and 1594 // the offset of each of its addressable sub-fields is zero. 1595 1596 uint64_t Size = Context.getTypeSize(Ty); 1597 1598 // Check that the type fits in a word. 1599 if (Size > 32) 1600 return false; 1601 1602 // FIXME: Handle vector types! 1603 if (Ty->isVectorType()) 1604 return false; 1605 1606 // Float types are never treated as "integer like". 1607 if (Ty->isRealFloatingType()) 1608 return false; 1609 1610 // If this is a builtin or pointer type then it is ok. 1611 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 1612 return true; 1613 1614 // Small complex integer types are "integer like". 1615 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 1616 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 1617 1618 // Single element and zero sized arrays should be allowed, by the definition 1619 // above, but they are not. 1620 1621 // Otherwise, it must be a record type. 1622 const RecordType *RT = Ty->getAs<RecordType>(); 1623 if (!RT) return false; 1624 1625 // Ignore records with flexible arrays. 1626 const RecordDecl *RD = RT->getDecl(); 1627 if (RD->hasFlexibleArrayMember()) 1628 return false; 1629 1630 // Check that all sub-fields are at offset 0, and are themselves "integer 1631 // like". 1632 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1633 1634 bool HadField = false; 1635 unsigned idx = 0; 1636 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1637 i != e; ++i, ++idx) { 1638 const FieldDecl *FD = *i; 1639 1640 // Bit-fields are not addressable, we only need to verify they are "integer 1641 // like". We still have to disallow a subsequent non-bitfield, for example: 1642 // struct { int : 0; int x } 1643 // is non-integer like according to gcc. 1644 if (FD->isBitField()) { 1645 if (!RD->isUnion()) 1646 HadField = true; 1647 1648 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1649 return false; 1650 1651 continue; 1652 } 1653 1654 // Check if this field is at offset 0. 1655 if (Layout.getFieldOffset(idx) != 0) 1656 return false; 1657 1658 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1659 return false; 1660 1661 // Only allow at most one field in a structure. This doesn't match the 1662 // wording above, but follows gcc in situations with a field following an 1663 // empty structure. 1664 if (!RD->isUnion()) { 1665 if (HadField) 1666 return false; 1667 1668 HadField = true; 1669 } 1670 } 1671 1672 return true; 1673} 1674 1675ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy, 1676 ASTContext &Context, 1677 llvm::LLVMContext &VMContext) const { 1678 if (RetTy->isVoidType()) 1679 return ABIArgInfo::getIgnore(); 1680 1681 if (!CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1682 // Treat an enum type as its underlying type. 1683 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1684 RetTy = EnumTy->getDecl()->getIntegerType(); 1685 1686 return (RetTy->isPromotableIntegerType() ? 1687 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1688 } 1689 1690 // Are we following APCS? 1691 if (getABIKind() == APCS) { 1692 if (isEmptyRecord(Context, RetTy, false)) 1693 return ABIArgInfo::getIgnore(); 1694 1695 // Complex types are all returned as packed integers. 1696 // 1697 // FIXME: Consider using 2 x vector types if the back end handles them 1698 // correctly. 1699 if (RetTy->isAnyComplexType()) 1700 return ABIArgInfo::getCoerce(llvm::IntegerType::get( 1701 VMContext, Context.getTypeSize(RetTy))); 1702 1703 // Integer like structures are returned in r0. 1704 if (isIntegerLikeType(RetTy, Context, VMContext)) { 1705 // Return in the smallest viable integer type. 1706 uint64_t Size = Context.getTypeSize(RetTy); 1707 if (Size <= 8) 1708 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1709 if (Size <= 16) 1710 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1711 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1712 } 1713 1714 // Otherwise return in memory. 1715 return ABIArgInfo::getIndirect(0); 1716 } 1717 1718 // Otherwise this is an AAPCS variant. 1719 1720 if (isEmptyRecord(Context, RetTy, true)) 1721 return ABIArgInfo::getIgnore(); 1722 1723 // Aggregates <= 4 bytes are returned in r0; other aggregates 1724 // are returned indirectly. 1725 uint64_t Size = Context.getTypeSize(RetTy); 1726 if (Size <= 32) { 1727 // Return in the smallest viable integer type. 1728 if (Size <= 8) 1729 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1730 if (Size <= 16) 1731 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1732 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1733 } 1734 1735 return ABIArgInfo::getIndirect(0); 1736} 1737 1738llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1739 CodeGenFunction &CGF) const { 1740 // FIXME: Need to handle alignment 1741 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1742 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1743 1744 CGBuilderTy &Builder = CGF.Builder; 1745 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1746 "ap"); 1747 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1748 llvm::Type *PTy = 1749 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1750 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1751 1752 uint64_t Offset = 1753 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 1754 llvm::Value *NextAddr = 1755 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1756 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1757 "ap.next"); 1758 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1759 1760 return AddrTyped; 1761} 1762 1763ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy, 1764 ASTContext &Context, 1765 llvm::LLVMContext &VMContext) const { 1766 if (RetTy->isVoidType()) { 1767 return ABIArgInfo::getIgnore(); 1768 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1769 return ABIArgInfo::getIndirect(0); 1770 } else { 1771 // Treat an enum type as its underlying type. 1772 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1773 RetTy = EnumTy->getDecl()->getIntegerType(); 1774 1775 return (RetTy->isPromotableIntegerType() ? 1776 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1777 } 1778} 1779 1780// SystemZ ABI Implementation 1781 1782namespace { 1783 1784class SystemZABIInfo : public ABIInfo { 1785 bool isPromotableIntegerType(QualType Ty) const; 1786 1787 ABIArgInfo classifyReturnType(QualType RetTy, ASTContext &Context, 1788 llvm::LLVMContext &VMContext) const; 1789 1790 ABIArgInfo classifyArgumentType(QualType RetTy, ASTContext &Context, 1791 llvm::LLVMContext &VMContext) const; 1792 1793 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1794 llvm::LLVMContext &VMContext) const { 1795 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 1796 Context, VMContext); 1797 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1798 it != ie; ++it) 1799 it->info = classifyArgumentType(it->type, Context, VMContext); 1800 } 1801 1802 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1803 CodeGenFunction &CGF) const; 1804}; 1805 1806class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 1807public: 1808 SystemZTargetCodeGenInfo():TargetCodeGenInfo(new SystemZABIInfo()) {} 1809}; 1810 1811} 1812 1813bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 1814 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 1815 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 1816 switch (BT->getKind()) { 1817 case BuiltinType::Bool: 1818 case BuiltinType::Char_S: 1819 case BuiltinType::Char_U: 1820 case BuiltinType::SChar: 1821 case BuiltinType::UChar: 1822 case BuiltinType::Short: 1823 case BuiltinType::UShort: 1824 case BuiltinType::Int: 1825 case BuiltinType::UInt: 1826 return true; 1827 default: 1828 return false; 1829 } 1830 return false; 1831} 1832 1833llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1834 CodeGenFunction &CGF) const { 1835 // FIXME: Implement 1836 return 0; 1837} 1838 1839 1840ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy, 1841 ASTContext &Context, 1842 llvm::LLVMContext &VMContext) const { 1843 if (RetTy->isVoidType()) { 1844 return ABIArgInfo::getIgnore(); 1845 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1846 return ABIArgInfo::getIndirect(0); 1847 } else { 1848 return (isPromotableIntegerType(RetTy) ? 1849 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1850 } 1851} 1852 1853ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty, 1854 ASTContext &Context, 1855 llvm::LLVMContext &VMContext) const { 1856 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 1857 return ABIArgInfo::getIndirect(0); 1858 } else { 1859 return (isPromotableIntegerType(Ty) ? 1860 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1861 } 1862} 1863 1864// MSP430 ABI Implementation 1865 1866namespace { 1867 1868class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 1869public: 1870 MSP430TargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 1871 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 1872 CodeGen::CodeGenModule &M) const; 1873}; 1874 1875} 1876 1877void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 1878 llvm::GlobalValue *GV, 1879 CodeGen::CodeGenModule &M) const { 1880 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 1881 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 1882 // Handle 'interrupt' attribute: 1883 llvm::Function *F = cast<llvm::Function>(GV); 1884 1885 // Step 1: Set ISR calling convention. 1886 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 1887 1888 // Step 2: Add attributes goodness. 1889 F->addFnAttr(llvm::Attribute::NoInline); 1890 1891 // Step 3: Emit ISR vector alias. 1892 unsigned Num = attr->getNumber() + 0xffe0; 1893 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 1894 "vector_" + 1895 llvm::LowercaseString(llvm::utohexstr(Num)), 1896 GV, &M.getModule()); 1897 } 1898 } 1899} 1900 1901const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() const { 1902 if (TheTargetCodeGenInfo) 1903 return *TheTargetCodeGenInfo; 1904 1905 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 1906 // free it. 1907 1908 const llvm::Triple &Triple(getContext().Target.getTriple()); 1909 switch (Triple.getArch()) { 1910 default: 1911 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo); 1912 1913 case llvm::Triple::arm: 1914 case llvm::Triple::thumb: 1915 // FIXME: We want to know the float calling convention as well. 1916 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 1917 return *(TheTargetCodeGenInfo = 1918 new ARMTargetCodeGenInfo(ARMABIInfo::APCS)); 1919 1920 return *(TheTargetCodeGenInfo = 1921 new ARMTargetCodeGenInfo(ARMABIInfo::AAPCS)); 1922 1923 case llvm::Triple::pic16: 1924 return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo()); 1925 1926 case llvm::Triple::systemz: 1927 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo()); 1928 1929 case llvm::Triple::msp430: 1930 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo()); 1931 1932 case llvm::Triple::x86: 1933 switch (Triple.getOS()) { 1934 case llvm::Triple::Darwin: 1935 return *(TheTargetCodeGenInfo = 1936 new X86_32TargetCodeGenInfo(Context, true, true)); 1937 case llvm::Triple::Cygwin: 1938 case llvm::Triple::MinGW32: 1939 case llvm::Triple::MinGW64: 1940 case llvm::Triple::AuroraUX: 1941 case llvm::Triple::DragonFly: 1942 case llvm::Triple::FreeBSD: 1943 case llvm::Triple::OpenBSD: 1944 return *(TheTargetCodeGenInfo = 1945 new X86_32TargetCodeGenInfo(Context, false, true)); 1946 1947 default: 1948 return *(TheTargetCodeGenInfo = 1949 new X86_32TargetCodeGenInfo(Context, false, false)); 1950 } 1951 1952 case llvm::Triple::x86_64: 1953 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo()); 1954 } 1955} 1956