12b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* 22b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 32b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * All Rights Reserved. 42b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 52b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Permission is hereby granted, free of charge, to any person obtaining a 62b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * copy of this software and associated documentation files (the 72b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * "Software"), to deal in the Software without restriction, including 82b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * without limitation the rights to use, copy, modify, merge, publish, 92b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * distribute, sub license, and/or sell copies of the Software, and to 102b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * permit persons to whom the Software is furnished to do so, subject to 112b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * the following conditions: 122b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 132b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * The above copyright notice and this permission notice (including the 142b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * next paragraph) shall be included in all copies or substantial portions 152b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * of the Software. 162b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 172b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 182b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 192b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 202b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 212b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 222b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 232b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 242b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 252b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 262b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 272b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#ifndef _I915_DRM_H_ 282b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define _I915_DRM_H_ 292b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 307d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#include "drm.h" 31170674a606f6d7869b5fa4457c07e10dd27f2771Robert Noland 32a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#if defined(__cplusplus) 33a3d715ee14b29d2680ceaf44955679205795140cChris Wilsonextern "C" { 34a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#endif 35a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 362b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Please note that modifications to all structs defined here are 372b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * subject to backwards-compatibility constraints. 382b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 392b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 40a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky/** 41a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * DOC: uevents generated by i915 on it's device node 42a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * 43a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch 44a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * event from the gpu l3 cache. Additional information supplied is ROW, 45a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep 46a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * track of these events and if a specific cache-line seems to have a 47a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * persistent error remap it with the l3 remapping tool supplied in 48a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * intel-gpu-tools. The value supplied with the event is always 1. 49a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * 50a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * I915_ERROR_UEVENT - Generated upon error detection, currently only via 51a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * hangcheck. The error detection event is a good indicator of when things 52a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * began to go badly. The value supplied with the event is a 1 upon error 53a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * detection, and a 0 upon reset completion, signifying no more error 54a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * exists. NOTE: Disabling hangcheck or reset via module parameter will 55a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * cause the related events to not be seen. 56a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * 57a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * I915_RESET_UEVENT - Event is generated just before an attempt to reset the 58a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * the GPU. The value supplied with the event is always 1. NOTE: Disable 59a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * reset via module parameter will cause this event to not be seen. 60a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky */ 61a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_L3_PARITY_UEVENT "L3_PARITY_ERROR" 62a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_ERROR_UEVENT "ERROR" 63a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_RESET_UEVENT "RESET" 6469e7469e351b09c4fd92f6f18408a9ad069c38b3Ben Widawsky 65a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/* 66a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * MOCS indexes used for GPU surfaces, defining the cacheability of the 67a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * surface data and the coherency for this data wrt. CPU vs. GPU accesses. 68a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 69a3d715ee14b29d2680ceaf44955679205795140cChris Wilsonenum i915_mocs_table_index { 70a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /* 71a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Not cached anywhere, coherency between CPU and GPU accesses is 72a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * guaranteed. 73a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 74a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_MOCS_UNCACHED, 75a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /* 76a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Cacheability and coherency controlled by the kernel automatically 77a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * based on the DRM_I915_GEM_SET_CACHING IOCTL setting and the current 78a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * usage of the surface (used for display scanout or not). 79a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 80a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_MOCS_PTE, 81a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /* 82a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Cached in all GPU caches available on the platform. 83a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Coherency between CPU and GPU accesses to the surface is not 84a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * guaranteed without extra synchronization. 85a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 86a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_MOCS_CACHED, 87a3d715ee14b29d2680ceaf44955679205795140cChris Wilson}; 88a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 892b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Each region is a minimum of 16k, and there are at most 255 of them. 902b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 912b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use 922b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * of chars for next/prev indices */ 932b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_LOG_MIN_TEX_REGION_SIZE 14 942b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 952b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct _drm_i915_init { 962b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg enum { 972b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg I915_INIT_DMA = 0x01, 982b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg I915_CLEANUP_DMA = 0x02, 992b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg I915_RESUME_DMA = 0x03 1002b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg } func; 1012b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int mmio_offset; 1022b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int sarea_priv_offset; 1032b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int ring_start; 1042b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int ring_end; 1052b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int ring_size; 1062b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int front_offset; 1072b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int back_offset; 1082b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int depth_offset; 1092b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int w; 1102b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int h; 1112b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int pitch; 1122b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int pitch_bits; 1132b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int back_pitch; 1142b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int depth_pitch; 1152b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int cpp; 1162b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int chipset; 1172b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_init_t; 1182b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1192b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct _drm_i915_sarea { 1202b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg struct drm_tex_region texList[I915_NR_TEX_REGIONS + 1]; 1212b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int last_upload; /* last time texture was uploaded */ 1222b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int last_enqueue; /* last time a buffer was enqueued */ 1232b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int last_dispatch; /* age of the most recently dispatched buffer */ 1242b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int ctxOwner; /* last context to upload state */ 1252b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int texAge; 1262b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pf_enabled; /* is pageflipping allowed? */ 1272b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pf_active; 1282b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pf_current_page; /* which buffer is being displayed? */ 1292b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int perf_boxes; /* performance boxes to be displayed */ 1302b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int width, height; /* screen size in pixels */ 1312b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1322b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg drm_handle_t front_handle; 1332b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int front_offset; 1342b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int front_size; 1352b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1362b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg drm_handle_t back_handle; 1372b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int back_offset; 1382b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int back_size; 1392b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1402b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg drm_handle_t depth_handle; 1412b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int depth_offset; 1422b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int depth_size; 1432b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1442b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg drm_handle_t tex_handle; 1452b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int tex_offset; 1462b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int tex_size; 1472b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int log_tex_granularity; 1482b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pitch; 1492b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int rotation; /* 0, 90, 180 or 270 */ 1502b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int rotated_offset; 1512b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int rotated_size; 1522b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int rotated_pitch; 1532b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int virtualX, virtualY; 1542b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1552b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int front_tiled; 1562b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int back_tiled; 1572b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int depth_tiled; 1582b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int rotated_tiled; 1592b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int rotated2_tiled; 1602b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1612b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pipeA_x; 1622b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pipeA_y; 1632b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pipeA_w; 1642b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pipeA_h; 1652b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pipeB_x; 1662b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pipeB_y; 1672b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pipeB_w; 1682b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pipeB_h; 1692b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1702b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /* fill out some space for old userspace triple buffer */ 1712b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg drm_handle_t unused_handle; 1722b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 unused1, unused2, unused3; 1732b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1742b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /* buffer object handles for static buffers. May change 1752b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * over the lifetime of the client. 1762b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 1772b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 front_bo_handle; 1782b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 back_bo_handle; 1792b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 unused_bo_handle; 1802b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 depth_bo_handle; 1812b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1822b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_sarea_t; 1832b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1842b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* due to userspace building against these headers we need some compat here */ 1852b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define planeA_x pipeA_x 1862b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define planeA_y pipeA_y 1872b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define planeA_w pipeA_w 1882b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define planeA_h pipeA_h 1892b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define planeB_x pipeB_x 1902b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define planeB_y pipeB_y 1912b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define planeB_w pipeB_w 1922b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define planeB_h pipeB_h 1932b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 1942b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Flags for perf_boxes 1952b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 1962b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BOX_RING_EMPTY 0x1 1972b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BOX_FLIP 0x2 1982b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BOX_WAIT 0x4 1992b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BOX_TEXTURE_LOAD 0x8 2002b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BOX_LOST_CONTEXT 0x10 2012b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 2027d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen/* 2037d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * i915 specific ioctls. 2047d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * 2057d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * The device specific ioctl range is [DRM_COMMAND_BASE, DRM_COMMAND_END) ie 2067d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * [0x40, 0xa0) (a0 is excluded). The numbers below are defined as offset 2077d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * against DRM_COMMAND_BASE and should be between [0x0, 0x60). 2082b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 2092b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_INIT 0x00 2102b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_FLUSH 0x01 2112b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_FLIP 0x02 2122b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_BATCHBUFFER 0x03 2132b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_IRQ_EMIT 0x04 2142b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_IRQ_WAIT 0x05 2152b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GETPARAM 0x06 2162b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_SETPARAM 0x07 2172b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_ALLOC 0x08 2182b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_FREE 0x09 2192b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_INIT_HEAP 0x0a 2202b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_CMDBUFFER 0x0b 2212b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_DESTROY_HEAP 0x0c 2222b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_SET_VBLANK_PIPE 0x0d 2232b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GET_VBLANK_PIPE 0x0e 2242b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_VBLANK_SWAP 0x0f 2252b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_HWS_ADDR 0x11 2262b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_INIT 0x13 2272b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_EXECBUFFER 0x14 2282b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_PIN 0x15 2292b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_UNPIN 0x16 2302b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_BUSY 0x17 2312b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_THROTTLE 0x18 2322b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_ENTERVT 0x19 2332b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_LEAVEVT 0x1a 2342b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_CREATE 0x1b 2352b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_PREAD 0x1c 2362b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_PWRITE 0x1d 2372b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_MMAP 0x1e 2382b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_SET_DOMAIN 0x1f 2392b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_SW_FINISH 0x20 2402b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_SET_TILING 0x21 2412b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_GET_TILING 0x22 2422b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_GET_APERTURE 0x23 2432b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_MMAP_GTT 0x24 2442b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GET_PIPE_FROM_CRTC_ID 0x25 2452b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_GEM_MADVISE 0x26 2462b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_OVERLAY_PUT_IMAGE 0x27 2472b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_OVERLAY_ATTRS 0x28 248b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes#define DRM_I915_GEM_EXECBUFFER2 0x29 249a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define DRM_I915_GEM_EXECBUFFER2_WR DRM_I915_GEM_EXECBUFFER2 25066518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes#define DRM_I915_GET_SPRITE_COLORKEY 0x2a 25166518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes#define DRM_I915_SET_SPRITE_COLORKEY 0x2b 252ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawsky#define DRM_I915_GEM_WAIT 0x2c 253a5b2946889471f6075852949f90f660e43b68532Ben Widawsky#define DRM_I915_GEM_CONTEXT_CREATE 0x2d 254a5b2946889471f6075852949f90f660e43b68532Ben Widawsky#define DRM_I915_GEM_CONTEXT_DESTROY 0x2e 255a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define DRM_I915_GEM_SET_CACHING 0x2f 256a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define DRM_I915_GEM_GET_CACHING 0x30 257934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt#define DRM_I915_REG_READ 0x31 2585a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick#define DRM_I915_GET_RESET_STATS 0x32 2594fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulin#define DRM_I915_GEM_USERPTR 0x33 2608576527cfacaf42af8316e1030c192193e94225aNeil Roberts#define DRM_I915_GEM_CONTEXT_GETPARAM 0x34 2618576527cfacaf42af8316e1030c192193e94225aNeil Roberts#define DRM_I915_GEM_CONTEXT_SETPARAM 0x35 262a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define DRM_I915_PERF_OPEN 0x36 2632b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 2642b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) 2652b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) 2662b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLIP) 2672b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_BATCHBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_BATCHBUFFER, drm_i915_batchbuffer_t) 2682b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_IRQ_EMIT, drm_i915_irq_emit_t) 2692b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_IRQ_WAIT, drm_i915_irq_wait_t) 2702b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GETPARAM, drm_i915_getparam_t) 2712b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SETPARAM, drm_i915_setparam_t) 2722b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_ALLOC, drm_i915_mem_alloc_t) 2732b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_FREE, drm_i915_mem_free_t) 2742b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_INIT_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT_HEAP, drm_i915_mem_init_heap_t) 2752b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_CMDBUFFER, drm_i915_cmdbuffer_t) 2762b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_DESTROY_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_DESTROY_HEAP, drm_i915_mem_destroy_heap_t) 2772b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t) 2782b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t) 2792b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) 280057fab3382c02af54126ce395c43d4e6dce9439aChris Wilson#define DRM_IOCTL_I915_HWS_ADDR DRM_IOW(DRM_COMMAND_BASE + DRM_I915_HWS_ADDR, struct drm_i915_gem_init) 2812b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init) 2822b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer) 283b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes#define DRM_IOCTL_I915_GEM_EXECBUFFER2 DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER2, struct drm_i915_gem_execbuffer2) 284a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define DRM_IOCTL_I915_GEM_EXECBUFFER2_WR DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER2_WR, struct drm_i915_gem_execbuffer2) 2852b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin) 2862b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin) 2872b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy) 288a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define DRM_IOCTL_I915_GEM_SET_CACHING DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_SET_CACHING, struct drm_i915_gem_caching) 289a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define DRM_IOCTL_I915_GEM_GET_CACHING DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_GET_CACHING, struct drm_i915_gem_caching) 2902b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_THROTTLE DRM_IO ( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE) 2912b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT) 2922b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT) 2932b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create) 2942b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread) 2952b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite) 2962b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap) 2972b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_MMAP_GTT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP_GTT, struct drm_i915_gem_mmap_gtt) 2982b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_SET_DOMAIN DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SET_DOMAIN, struct drm_i915_gem_set_domain) 2992b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_SW_FINISH DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SW_FINISH, struct drm_i915_gem_sw_finish) 3002b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling) 3012b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling) 3022b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture) 303ba79b1a8c2ea354c89371b5e34e0077f6ecaaa63Kristian Høgsberg#define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_i915_get_pipe_from_crtc_id) 3042b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise) 3059fb83a49cb7e3db2f168aac5172fafb6fa0d69c8Eric Anholt#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_I915_OVERLAY_PUT_IMAGE, struct drm_intel_overlay_put_image) 3062b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs) 30766518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes#define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) 3087d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) 309ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawsky#define DRM_IOCTL_I915_GEM_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_WAIT, struct drm_i915_gem_wait) 310a5b2946889471f6075852949f90f660e43b68532Ben Widawsky#define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create) 311a5b2946889471f6075852949f90f660e43b68532Ben Widawsky#define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy) 312934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt#define DRM_IOCTL_I915_REG_READ DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read) 3135a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick#define DRM_IOCTL_I915_GET_RESET_STATS DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GET_RESET_STATS, struct drm_i915_reset_stats) 3148576527cfacaf42af8316e1030c192193e94225aNeil Roberts#define DRM_IOCTL_I915_GEM_USERPTR DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_USERPTR, struct drm_i915_gem_userptr) 3158576527cfacaf42af8316e1030c192193e94225aNeil Roberts#define DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_GETPARAM, struct drm_i915_gem_context_param) 3168576527cfacaf42af8316e1030c192193e94225aNeil Roberts#define DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_SETPARAM, struct drm_i915_gem_context_param) 317a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define DRM_IOCTL_I915_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param) 3182b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 3192b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Allow drivers to submit batchbuffers directly to hardware, relying 3202b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * on the security mechanisms provided by hardware. 3212b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 3222b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_batchbuffer { 3232b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int start; /* agp offset */ 3242b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int used; /* nr bytes in use */ 3252b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ 3262b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ 3272b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int num_cliprects; /* mulitpass with multiple cliprects? */ 3282b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg struct drm_clip_rect *cliprects; /* pointer to userspace cliprects */ 3292b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_batchbuffer_t; 3302b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 3312b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* As above, but pass a pointer to userspace buffer which can be 3322b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * validated by the kernel prior to sending to hardware. 3332b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 3342b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct _drm_i915_cmdbuffer { 3352b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg char *buf; /* pointer to userspace command buffer */ 3362b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int sz; /* nr bytes in buf */ 3372b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ 3382b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ 3392b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int num_cliprects; /* mulitpass with multiple cliprects? */ 3402b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg struct drm_clip_rect *cliprects; /* pointer to userspace cliprects */ 3412b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_cmdbuffer_t; 3422b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 3432b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Userspace can request & wait on irq's: 3442b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 3452b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_irq_emit { 3462b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int *irq_seq; 3472b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_irq_emit_t; 3482b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 3492b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_irq_wait { 3502b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int irq_seq; 3512b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_irq_wait_t; 3522b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 3532b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Ioctl to query kernel params: 3542b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 3552b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_PARAM_IRQ_ACTIVE 1 3562b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_PARAM_ALLOW_BATCHBUFFER 2 3572b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_PARAM_LAST_DISPATCH 3 3582b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_PARAM_CHIPSET_ID 4 3592b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_PARAM_HAS_GEM 5 3602b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_PARAM_NUM_FENCES_AVAIL 6 3612b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_PARAM_HAS_OVERLAY 7 362b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes#define I915_PARAM_HAS_PAGEFLIPPING 8 363b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes#define I915_PARAM_HAS_EXECBUF2 9 36466375fd6e8d3e95df5d124883a1426460c1b8ed8Zou Nan hai#define I915_PARAM_HAS_BSD 10 365057fab3382c02af54126ce395c43d4e6dce9439aChris Wilson#define I915_PARAM_HAS_BLT 11 366362457715faacd3101929e5f0d8ae250d0ad09dfChris Wilson#define I915_PARAM_HAS_RELAXED_FENCING 12 3670184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson#define I915_PARAM_HAS_COHERENT_RINGS 13 3680184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson#define I915_PARAM_HAS_EXEC_CONSTANTS 14 3690209428b3918c4336018da9293cdcbf7f8fedfb6Chris Wilson#define I915_PARAM_HAS_RELAXED_DELTA 15 3709fb83a49cb7e3db2f168aac5172fafb6fa0d69c8Eric Anholt#define I915_PARAM_HAS_GEN7_SOL_RESET 16 37169e7469e351b09c4fd92f6f18408a9ad069c38b3Ben Widawsky#define I915_PARAM_HAS_LLC 17 37269e7469e351b09c4fd92f6f18408a9ad069c38b3Ben Widawsky#define I915_PARAM_HAS_ALIASING_PPGTT 18 373ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawsky#define I915_PARAM_HAS_WAIT_TIMEOUT 19 374a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_PARAM_HAS_SEMAPHORES 20 375a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_PARAM_HAS_PRIME_VMAP_FLUSH 21 376a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_PARAM_HAS_VEBOX 22 377a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_PARAM_HAS_SECURE_BATCHES 23 378a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_PARAM_HAS_PINNED_BATCHES 24 379a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_PARAM_HAS_EXEC_NO_RELOC 25 380a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_PARAM_HAS_EXEC_HANDLE_LUT 26 381a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_PARAM_HAS_WT 27 3823cde43f5669bf5edbd6adef7902e96411fc53e9cDamien Lespiau#define I915_PARAM_CMD_PARSER_VERSION 28 3838576527cfacaf42af8316e1030c192193e94225aNeil Roberts#define I915_PARAM_HAS_COHERENT_PHYS_GTT 29 3848576527cfacaf42af8316e1030c192193e94225aNeil Roberts#define I915_PARAM_MMAP_VERSION 30 3858576527cfacaf42af8316e1030c192193e94225aNeil Roberts#define I915_PARAM_HAS_BSD2 31 3868576527cfacaf42af8316e1030c192193e94225aNeil Roberts#define I915_PARAM_REVISION 32 387d556e068a7e4e9dfb57514244ae5f3e0eb9d0b39Jeff McGee#define I915_PARAM_SUBSLICE_TOTAL 33 388d556e068a7e4e9dfb57514244ae5f3e0eb9d0b39Jeff McGee#define I915_PARAM_EU_TOTAL 34 3897d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#define I915_PARAM_HAS_GPU_RESET 35 3907d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#define I915_PARAM_HAS_RESOURCE_STREAMER 36 3917d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#define I915_PARAM_HAS_EXEC_SOFTPIN 37 392a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PARAM_HAS_POOLED_EU 38 393a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PARAM_MIN_EU_IN_POOL 39 394a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PARAM_MMAP_GTT_VERSION 40 395a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 396a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution 397a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * priorities and the driver will attempt to execute batches in priority order. 398a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 399a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PARAM_HAS_SCHEDULER 41 400a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PARAM_HUC_STATUS 42 401a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 402a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to opt-out of 403a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * synchronisation with implicit fencing on individual objects. 404a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * See EXEC_OBJECT_ASYNC. 405a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 406a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PARAM_HAS_EXEC_ASYNC 43 407a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 408a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/* Query whether DRM_I915_GEM_EXECBUFFER2 supports explicit fence support - 409a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * both being able to pass in a sync_file fd to wait upon before executing, 410a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * and being able to return a new sync_file fd that is signaled when the 411a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * current request is complete. See I915_EXEC_FENCE_IN and I915_EXEC_FENCE_OUT. 412a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 413a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PARAM_HAS_EXEC_FENCE 44 4142b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4152b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_getparam { 4167d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen __s32 param; 4177d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen /* 4187d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * WARNING: Using pointers instead of fixed-size u64 means we need to write 4197d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * compat32 code. Don't repeat this mistake. 4207d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen */ 4212b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int *value; 4222b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_getparam_t; 4232b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4242b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Ioctl to set kernel params: 4252b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 4262b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_SETPARAM_USE_MI_BATCHBUFFER_START 1 4272b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_SETPARAM_TEX_LRU_LOG_GRANULARITY 2 4282b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_SETPARAM_ALLOW_BATCHBUFFER 3 4292b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_SETPARAM_NUM_USED_FENCES 4 4302b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4312b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_setparam { 4322b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int param; 4332b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int value; 4342b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_setparam_t; 4352b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4362b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* A memory manager for regions of shared memory: 4372b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 4382b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_MEM_REGION_AGP 1 4392b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4402b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_mem_alloc { 4412b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int region; 4422b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int alignment; 4432b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int size; 4442b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int *region_offset; /* offset from start of fb or agp */ 4452b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_mem_alloc_t; 4462b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4472b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_mem_free { 4482b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int region; 4492b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int region_offset; 4502b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_mem_free_t; 4512b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4522b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_mem_init_heap { 4532b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int region; 4542b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int size; 4552b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int start; 4562b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_mem_init_heap_t; 4572b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4582b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Allow memory manager to be torn down and re-initialized (eg on 4592b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * rotate): 4602b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 4612b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_mem_destroy_heap { 4622b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int region; 4632b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_mem_destroy_heap_t; 4642b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4652b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Allow X server to configure which pipes to monitor for vblank signals 4662b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 4672b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_VBLANK_PIPE_A 1 4682b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define DRM_I915_VBLANK_PIPE_B 2 4692b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4702b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_vblank_pipe { 4712b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg int pipe; 4722b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_vblank_pipe_t; 4732b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4742b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Schedule buffer swap at given vertical blank: 4752b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 4762b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_vblank_swap { 4772b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg drm_drawable_t drawable; 4782b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg enum drm_vblank_seq_type seqtype; 4792b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg unsigned int sequence; 4802b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_vblank_swap_t; 4812b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4822b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergtypedef struct drm_i915_hws_addr { 4832b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 addr; 4842b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg} drm_i915_hws_addr_t; 4852b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4862b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_init { 4872b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 4882b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Beginning offset in the GTT to be managed by the DRM memory 4892b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * manager. 4902b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 4912b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 gtt_start; 4922b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 4932b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Ending offset in the GTT to be managed by the DRM memory 4942b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * manager. 4952b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 4962b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 gtt_end; 4972b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 4982b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 4992b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_create { 5002b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 5012b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Requested size for the object. 5022b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 5032b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * The (page-aligned) allocated size for the object will be returned. 5042b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 5052b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 size; 5062b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 5072b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Returned handle for the object. 5082b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 5092b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Object handles are nonzero. 5102b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 5112b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 5122b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 pad; 5132b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 5142b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 5152b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_pread { 5162b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle for the object being read. */ 5172b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 5182b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 pad; 5192b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Offset into the object to read from */ 5202b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 offset; 5212b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Length of data to read */ 5222b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 size; 5232b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 5242b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Pointer to write the data into. 5252b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 5262b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * This is a fixed-size type for 32/64 compatibility. 5272b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 5282b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 data_ptr; 5292b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 5302b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 5312b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_pwrite { 5322b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle for the object being written to. */ 5332b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 5342b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 pad; 5352b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Offset into the object to write to */ 5362b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 offset; 5372b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Length of data to write */ 5382b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 size; 5392b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 5402b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Pointer to read the data from. 5412b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 5422b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * This is a fixed-size type for 32/64 compatibility. 5432b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 5442b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 data_ptr; 5452b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 5462b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 5472b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_mmap { 5482b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle for the object being mapped. */ 5492b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 5502b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 pad; 5512b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Offset in the object to map. */ 5522b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 offset; 5532b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 5542b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Length of data to map. 5552b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 5562b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * The value will be page-aligned. 5572b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 5582b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 size; 5592b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 5602b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Returned pointer the data was mapped at. 5612b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 5622b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * This is a fixed-size type for 32/64 compatibility. 5632b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 5642b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 addr_ptr; 5658576527cfacaf42af8316e1030c192193e94225aNeil Roberts 5668576527cfacaf42af8316e1030c192193e94225aNeil Roberts /** 5678576527cfacaf42af8316e1030c192193e94225aNeil Roberts * Flags for extended behaviour. 5688576527cfacaf42af8316e1030c192193e94225aNeil Roberts * 5698576527cfacaf42af8316e1030c192193e94225aNeil Roberts * Added in version 2. 5708576527cfacaf42af8316e1030c192193e94225aNeil Roberts */ 5718576527cfacaf42af8316e1030c192193e94225aNeil Roberts __u64 flags; 5728576527cfacaf42af8316e1030c192193e94225aNeil Roberts#define I915_MMAP_WC 0x1 5732b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 5742b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 5752b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_mmap_gtt { 5762b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle for the object being mapped. */ 5772b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 5782b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 pad; 5792b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 5802b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Fake offset to use for subsequent mmap call 5812b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 5822b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * This is a fixed-size type for 32/64 compatibility. 5832b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 5842b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 offset; 5852b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 5862b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 5872b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_set_domain { 5882b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle for the object */ 5892b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 5902b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 5912b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** New read domains */ 5922b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 read_domains; 5932b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 5942b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** New write domain */ 5952b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 write_domain; 5962b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 5972b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 5982b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_sw_finish { 5992b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle for the object */ 6002b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 6012b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 6022b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6032b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_relocation_entry { 6042b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 6052b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Handle of the buffer being pointed to by this relocation entry. 6062b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 6072b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * It's appealing to make this be an index into the mm_validate_entry 6082b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * list to refer to the buffer, but this allows the driver to create 6092b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * a relocation list for state buffers and not re-write it per 6102b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * exec using the buffer. 6112b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 6122b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 target_handle; 6132b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6142b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 6152b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Value to be added to the offset of the target buffer to make up 6162b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * the relocation entry. 6172b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 6182b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 delta; 6192b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6202b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Offset in the buffer the relocation entry will be written into */ 6212b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 offset; 6222b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6232b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 6242b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Offset value of the target buffer that the relocation entry was last 6252b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * written as. 6262b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 6272b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * If the buffer has the same offset as last time, we can skip syncing 6282b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * and writing the relocation. This value is written back out by 6292b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * the execbuffer ioctl when the relocation is written. 6302b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 6312b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 presumed_offset; 6322b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6332b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 6342b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Target memory domains read by this operation. 6352b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 6362b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 read_domains; 6372b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6382b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 6392b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Target memory domains written by this operation. 6402b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 6412b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Note that only one domain may be written by the whole 6422b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * execbuffer operation, so that where there are conflicts, 6432b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * the application will get -EINVAL back. 6442b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 6452b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 write_domain; 6462b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 6472b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6482b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/** @{ 6492b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Intel memory domains 6502b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 6512b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Most of these just align with the various caches in 6522b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * the system and are used to flush and invalidate as 6532b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * objects end up cached in different domains. 6542b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 6552b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/** CPU cache */ 6562b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_GEM_DOMAIN_CPU 0x00000001 6572b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/** Render cache, used by 2D and 3D drawing */ 6582b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_GEM_DOMAIN_RENDER 0x00000002 6592b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/** Sampler cache, used by texture engine */ 6602b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_GEM_DOMAIN_SAMPLER 0x00000004 6612b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/** Command queue, used to load batch buffers */ 6622b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_GEM_DOMAIN_COMMAND 0x00000008 6632b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/** Instruction cache, used by shader programs */ 6642b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_GEM_DOMAIN_INSTRUCTION 0x00000010 6652b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/** Vertex address cache */ 6662b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_GEM_DOMAIN_VERTEX 0x00000020 6672b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/** GTT domain - aperture and scanout */ 6682b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_GEM_DOMAIN_GTT 0x00000040 6692b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/** @} */ 6702b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6712b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_exec_object { 6722b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 6732b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * User's handle for a buffer to be bound into the GTT for this 6742b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * operation. 6752b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 6762b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 6772b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6782b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Number of relocations to be performed on this buffer */ 6792b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 relocation_count; 6802b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 6812b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Pointer to array of struct drm_i915_gem_relocation_entry containing 6822b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * the relocations to be performed in this buffer. 6832b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 6842b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 relocs_ptr; 6852b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6862b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Required alignment in graphics aperture */ 6872b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 alignment; 6882b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6892b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 6902b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Returned value of the updated offset of the object, for future 6912b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * presumed_offset writes. 6922b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 6932b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 offset; 6942b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 6952b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 6962b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_execbuffer { 6972b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 6982b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * List of buffers to be validated with their relocations to be 6992b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * performend on them. 7002b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 7012b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * This is a pointer to an array of struct drm_i915_gem_validate_entry. 7022b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 7032b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * These buffers must be listed in an order such that all relocations 7042b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * a buffer is performing refer to buffers that have already appeared 7052b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * in the validate list. 7062b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 7072b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 buffers_ptr; 7082b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 buffer_count; 7092b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 7102b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Offset in the batchbuffer to start execution from. */ 7112b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 batch_start_offset; 7122b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Bytes used in batchbuffer from batch_start_offset */ 7132b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 batch_len; 7142b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 DR1; 7152b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 DR4; 7162b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 num_cliprects; 7172b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** This is a struct drm_clip_rect *cliprects */ 7182b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 cliprects_ptr; 7192b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 7202b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 721b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnesstruct drm_i915_gem_exec_object2 { 722b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes /** 723b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes * User's handle for a buffer to be bound into the GTT for this 724b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes * operation. 725b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes */ 726b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u32 handle; 727b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes 728b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes /** Number of relocations to be performed on this buffer */ 729b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u32 relocation_count; 730b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes /** 731b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes * Pointer to array of struct drm_i915_gem_relocation_entry containing 732b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes * the relocations to be performed in this buffer. 733b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes */ 734b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u64 relocs_ptr; 735b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes 736b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes /** Required alignment in graphics aperture */ 737b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u64 alignment; 738b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes 739b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes /** 7407d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * When the EXEC_OBJECT_PINNED flag is specified this is populated by 7417d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * the user with the GTT offset at which this object will be pinned. 7427d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * When the I915_EXEC_NO_RELOC flag is specified this must contain the 7437d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * presumed_offset of the object. 7447d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * During execbuffer2 the kernel populates it with the value of the 7457d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * current GTT offset of the object, for future presumed_offset writes. 746b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes */ 747b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u64 offset; 748b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes 749a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define EXEC_OBJECT_NEEDS_FENCE (1<<0) 750a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define EXEC_OBJECT_NEEDS_GTT (1<<1) 751a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define EXEC_OBJECT_WRITE (1<<2) 7527d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3) 753a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define EXEC_OBJECT_PINNED (1<<4) 754a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define EXEC_OBJECT_PAD_TO_SIZE (1<<5) 755a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/* The kernel implicitly tracks GPU activity on all GEM objects, and 756a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * synchronises operations with outstanding rendering. This includes 757a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * rendering on other devices if exported via dma-buf. However, sometimes 758a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * this tracking is too coarse and the user knows better. For example, 759a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * if the object is split into non-overlapping ranges shared between different 760a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * clients or engines (i.e. suballocating objects), the implicit tracking 761a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * by kernel assumes that each operation affects the whole object rather 762a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * than an individual range, causing needless synchronisation between clients. 763a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * The kernel will also forgo any CPU cache flushes prior to rendering from 764a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * the object as the client is expected to be also handling such domain 765a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * tracking. 766a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 767a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * The kernel maintains the implicit tracking in order to manage resources 768a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * used by the GPU - this flag only disables the synchronisation prior to 769a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * rendering with this object in this execbuf. 770a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 771a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Opting out of implicit synhronisation requires the user to do its own 772a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * explicit tracking to avoid rendering corruption. See, for example, 773a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * I915_PARAM_HAS_EXEC_FENCE to order execbufs and execute them asynchronously. 774a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 775a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define EXEC_OBJECT_ASYNC (1<<6) 776a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/* All remaining bits are MBZ and RESERVED FOR FUTURE USE */ 777a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_ASYNC<<1) 778b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u64 flags; 779a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky 780a3d715ee14b29d2680ceaf44955679205795140cChris Wilson union { 781a3d715ee14b29d2680ceaf44955679205795140cChris Wilson __u64 rsvd1; 782a3d715ee14b29d2680ceaf44955679205795140cChris Wilson __u64 pad_to_size; 783a3d715ee14b29d2680ceaf44955679205795140cChris Wilson }; 784b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u64 rsvd2; 785b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes}; 786b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes 787b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnesstruct drm_i915_gem_execbuffer2 { 788b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes /** 789b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes * List of gem_exec_object2 structs 790b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes */ 791b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u64 buffers_ptr; 792b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u32 buffer_count; 793b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes 794b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes /** Offset in the batchbuffer to start execution from. */ 795b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u32 batch_start_offset; 796b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes /** Bytes used in batchbuffer from batch_start_offset */ 797b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u32 batch_len; 798b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u32 DR1; 799b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u32 DR4; 800b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u32 num_cliprects; 801b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes /** This is a struct drm_clip_rect *cliprects */ 802b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u64 cliprects_ptr; 803057fab3382c02af54126ce395c43d4e6dce9439aChris Wilson#define I915_EXEC_RING_MASK (7<<0) 804057fab3382c02af54126ce395c43d4e6dce9439aChris Wilson#define I915_EXEC_DEFAULT (0<<0) 805431f7f00db844534dbcf9a63da0d2832a3d91bffDave Airlie#define I915_EXEC_RENDER (1<<0) 806057fab3382c02af54126ce395c43d4e6dce9439aChris Wilson#define I915_EXEC_BSD (2<<0) 807057fab3382c02af54126ce395c43d4e6dce9439aChris Wilson#define I915_EXEC_BLT (3<<0) 808011999927f76a7e9ba8f047fae4b4e084da6c2c3Xiang, Haihao#define I915_EXEC_VEBOX (4<<0) 8090184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson 8100184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson/* Used for switching the constants addressing mode on gen4+ RENDER ring. 8110184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson * Gen6+ only supports relative addressing to dynamic state (default) and 8120184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson * absolute addressing. 8130184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson * 8140184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson * These flags are ignored for the BSD and BLT rings. 8150184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson */ 8160184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson#define I915_EXEC_CONSTANTS_MASK (3<<6) 8170184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson#define I915_EXEC_CONSTANTS_REL_GENERAL (0<<6) /* default */ 8180184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson#define I915_EXEC_CONSTANTS_ABSOLUTE (1<<6) 8190184bb1c6d946bcaf198f7680b3405adca676790Chris Wilson#define I915_EXEC_CONSTANTS_REL_SURFACE (2<<6) /* gen4/5 only */ 82066375fd6e8d3e95df5d124883a1426460c1b8ed8Zou Nan hai __u64 flags; 821a5b2946889471f6075852949f90f660e43b68532Ben Widawsky __u64 rsvd1; /* now used for context info */ 822b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes __u64 rsvd2; 823b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes}; 824b50964027bef249a0cc3d511de05c2464e0a1e22Jesse Barnes 8259fb83a49cb7e3db2f168aac5172fafb6fa0d69c8Eric Anholt/** Resets the SO write offset registers for transform feedback on gen7. */ 8269fb83a49cb7e3db2f168aac5172fafb6fa0d69c8Eric Anholt#define I915_EXEC_GEN7_SOL_RESET (1<<8) 8279fb83a49cb7e3db2f168aac5172fafb6fa0d69c8Eric Anholt 828a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky/** Request a privileged ("secure") batch buffer. Note only available for 829a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * DRM_ROOT_ONLY | DRM_MASTER processes. 830a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky */ 831a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_EXEC_SECURE (1<<9) 832a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky 833a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky/** Inform the kernel that the batch is and will always be pinned. This 834a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * negates the requirement for a workaround to be performed to avoid 835a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * an incoherent CS (such as can be found on 830/845). If this flag is 836a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * not passed, the kernel will endeavour to make sure the batch is 837a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * coherent with the CS before execution. If this flag is passed, 838a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * userspace assumes the responsibility for ensuring the same. 839a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky */ 840a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_EXEC_IS_PINNED (1<<10) 841a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky 84220edfb9a16414688670439f8849488e08b64c5e7Damien Lespiau/** Provide a hint to the kernel that the command stream and auxiliary 843a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * state buffers already holds the correct presumed addresses and so the 844a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * relocation process may be skipped if no buffers need to be moved in 845a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * preparation for the execbuffer. 846a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky */ 847a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_EXEC_NO_RELOC (1<<11) 848a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky 849a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky/** Use the reloc.handle as an index into the exec object array rather 850a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * than as the per-file handle. 851a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky */ 852a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_EXEC_HANDLE_LUT (1<<12) 853a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky 8548576527cfacaf42af8316e1030c192193e94225aNeil Roberts/** Used for switching BSD rings on the platforms with two BSD rings */ 8557cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter#define I915_EXEC_BSD_SHIFT (13) 8567cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter#define I915_EXEC_BSD_MASK (3 << I915_EXEC_BSD_SHIFT) 8577cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter/* default ping-pong mode */ 8587cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter#define I915_EXEC_BSD_DEFAULT (0 << I915_EXEC_BSD_SHIFT) 8597cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter#define I915_EXEC_BSD_RING1 (1 << I915_EXEC_BSD_SHIFT) 8607cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter#define I915_EXEC_BSD_RING2 (2 << I915_EXEC_BSD_SHIFT) 8618576527cfacaf42af8316e1030c192193e94225aNeil Roberts 8627d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen/** Tell the kernel that the batchbuffer is processed by 8637d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * the resource streamer. 8647d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen */ 8657d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#define I915_EXEC_RESOURCE_STREAMER (1<<15) 8667d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen 867a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/* Setting I915_EXEC_FENCE_IN implies that lower_32_bits(rsvd2) represent 868a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * a sync_file fd to wait upon (in a nonblocking manner) prior to executing 869a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * the batch. 870a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 871a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Returns -EINVAL if the sync_file fd cannot be found. 872a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 873a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_EXEC_FENCE_IN (1<<16) 874a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 875a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/* Setting I915_EXEC_FENCE_OUT causes the ioctl to return a sync_file fd 876a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * in the upper_32_bits(rsvd2) upon success. Ownership of the fd is given 877a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * to the caller, and it should be close() after use. (The fd is a regular 878a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * file descriptor and will be cleaned up on process termination. It holds 879a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * a reference to the request, but nothing else.) 880a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 881a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * The sync_file fd can be combined with other sync_file and passed either 882a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * to execbuf using I915_EXEC_FENCE_IN, to atomic KMS ioctls (so that a flip 883a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * will only occur after this request completes), or to other devices. 884a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 885a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Using I915_EXEC_FENCE_OUT requires use of 886a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * DRM_IOCTL_I915_GEM_EXECBUFFER2_WR ioctl so that the result is written 887a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * back to userspace. Failure to do so will cause the out-fence to always 888a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * be reported as zero, and the real fence fd to be leaked. 889a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 890a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_EXEC_FENCE_OUT (1<<17) 891a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 892a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_FENCE_OUT<<1)) 893a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky 894a5b2946889471f6075852949f90f660e43b68532Ben Widawsky#define I915_EXEC_CONTEXT_ID_MASK (0xffffffff) 895a5b2946889471f6075852949f90f660e43b68532Ben Widawsky#define i915_execbuffer2_set_context_id(eb2, context) \ 896a5b2946889471f6075852949f90f660e43b68532Ben Widawsky (eb2).rsvd1 = context & I915_EXEC_CONTEXT_ID_MASK 897a5b2946889471f6075852949f90f660e43b68532Ben Widawsky#define i915_execbuffer2_get_context_id(eb2) \ 898a5b2946889471f6075852949f90f660e43b68532Ben Widawsky ((eb2).rsvd1 & I915_EXEC_CONTEXT_ID_MASK) 899a5b2946889471f6075852949f90f660e43b68532Ben Widawsky 9002b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_pin { 9012b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle of the buffer to be pinned. */ 9022b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 9032b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 pad; 9042b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 9052b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** alignment required within the aperture */ 9062b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 alignment; 9072b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 9082b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Returned GTT offset of the buffer. */ 9092b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 offset; 9102b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 9112b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 9122b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_unpin { 9132b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle of the buffer to be unpinned. */ 9142b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 9152b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 pad; 9162b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 9172b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 9182b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_busy { 9192b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle of the buffer to check for busy */ 9202b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 9212b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 9227cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter /** Return busy status 9237cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * 9247cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * A return of 0 implies that the object is idle (after 9257cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * having flushed any pending activity), and a non-zero return that 9267cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * the object is still in-flight on the GPU. (The GPU has not yet 9277cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * signaled completion for all pending requests that reference the 928a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * object.) An object is guaranteed to become idle eventually (so 929a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * long as no new GPU commands are executed upon it). Due to the 930a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * asynchronous nature of the hardware, an object reported 931a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * as busy may become idle before the ioctl is completed. 932a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 933a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Furthermore, if the object is busy, which engine is busy is only 934a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * provided as a guide. There are race conditions which prevent the 935a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * report of which engines are busy from being always accurate. 936a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * However, the converse is not true. If the object is idle, the 937a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * result of the ioctl, that all engines are idle, is accurate. 9387cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * 9397cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * The returned dword is split into two fields to indicate both 9407cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * the engines on which the object is being read, and the 9417cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * engine on which it is currently being written (if any). 9427cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * 9437cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * The low word (bits 0:15) indicate if the object is being written 9447cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * to by any engine (there can only be one, as the GEM implicit 9457cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * synchronisation rules force writes to be serialised). Only the 9467cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * engine for the last write is reported. 9477cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * 9487cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * The high word (bits 16:31) are a bitmask of which engines are 9497cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * currently reading from the object. Multiple engines may be 9507cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * reading from the object simultaneously. 9517cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * 9527cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * The value of each engine is the same as specified in the 9537cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * EXECBUFFER2 ioctl, i.e. I915_EXEC_RENDER, I915_EXEC_BSD etc. 9547cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * Note I915_EXEC_DEFAULT is a symbolic value and is mapped to 9557cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * the I915_EXEC_RENDER engine for execution, and so it is never 9567cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * reported as active itself. Some hardware may have parallel 9577cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * execution engines, e.g. multiple media engines, which are 9587cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * mapped to the same identifier in the EXECBUFFER2 ioctl and 9597cba3bb75ec7366be7e01394329bb8a2658cbe14Daniel Vetter * so are not separately reported for busyness. 960a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 961a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Caveat emptor: 962a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Only the boolean result of this query is reliable; that is whether 963a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * the object is idle or busy. The report of which engines are busy 964a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * should be only used as a heuristic. 965934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt */ 9662b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 busy; 9672b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 9682b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 969a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky/** 970a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * I915_CACHING_NONE 971a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * 972a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * GPU access is not coherent with cpu caches. Default for machines without an 973a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * LLC. 974a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky */ 975a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_CACHING_NONE 0 976a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky/** 977a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * I915_CACHING_CACHED 978a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * 979a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * GPU access is coherent with cpu caches and furthermore the data is cached in 980a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * last-level caches shared between cpu cores and the gpu GT. Default on 981a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * machines with HAS_LLC. 982a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky */ 983a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_CACHING_CACHED 1 984a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky/** 985a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * I915_CACHING_DISPLAY 986a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * 987a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * Special GPU caching mode which is coherent with the scanout engines. 988a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * Transparently falls back to I915_CACHING_NONE on platforms where no special 989a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * cache mode (like write-through or gfdt flushing) is available. The kernel 990a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * automatically sets this mode when using a buffer as a scanout target. 991a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * Userspace can manually set this mode to avoid a costly stall and clflush in 992a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * the hotpath of drawing the first frame. 993a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky */ 994a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#define I915_CACHING_DISPLAY 2 995934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt 996a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawskystruct drm_i915_gem_caching { 997934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt /** 998a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * Handle of the buffer to set/get the caching level of. */ 999934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt __u32 handle; 1000934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt 1001934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt /** 1002934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt * Cacheing level to apply or return value 1003934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt * 1004a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky * bits0-15 are for generic caching control (i.e. the above defined 1005934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt * values). bits16-31 are reserved for platform-specific variations 1006934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt * (e.g. l3$ caching on gen7). */ 1007a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky __u32 caching; 1008934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt}; 1009934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt 10102b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_TILING_NONE 0 10112b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_TILING_X 1 10122b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_TILING_Y 2 1013a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_TILING_LAST I915_TILING_Y 10142b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10152b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BIT_6_SWIZZLE_NONE 0 10162b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BIT_6_SWIZZLE_9 1 10172b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BIT_6_SWIZZLE_9_10 2 10182b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BIT_6_SWIZZLE_9_11 3 10192b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BIT_6_SWIZZLE_9_10_11 4 10202b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Not seen by userland */ 10212b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BIT_6_SWIZZLE_UNKNOWN 5 10222b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* Seen by userland. */ 10232b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BIT_6_SWIZZLE_9_17 6 10242b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_BIT_6_SWIZZLE_9_10_17 7 10252b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10262b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_set_tiling { 10272b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle of the buffer to have its tiling state updated */ 10282b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 10292b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10302b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 10312b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X, 10322b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * I915_TILING_Y). 10332b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 10342b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * This value is to be set on request, and will be updated by the 10352b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * kernel on successful return with the actual chosen tiling layout. 10362b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 10372b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * The tiling mode may be demoted to I915_TILING_NONE when the system 10382b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * has bit 6 swizzling that can't be managed correctly by GEM. 10392b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * 10402b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Buffer contents become undefined when changing tiling_mode. 10412b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 10422b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 tiling_mode; 10432b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10442b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 10452b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Stride in bytes for the object when in I915_TILING_X or 10462b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * I915_TILING_Y. 10472b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 10482b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 stride; 10492b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10502b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 10512b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Returned address bit 6 swizzling required for CPU access through 10522b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * mmap mapping. 10532b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 10542b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 swizzle_mode; 10552b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 10562b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10572b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_get_tiling { 10582b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle of the buffer to get tiling state for. */ 10592b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 10602b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10612b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 10622b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X, 10632b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * I915_TILING_Y). 10642b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 10652b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 tiling_mode; 10662b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10672b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 10682b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Returned address bit 6 swizzling required for CPU access through 10692b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * mmap mapping. 10702b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 10712b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 swizzle_mode; 10728576527cfacaf42af8316e1030c192193e94225aNeil Roberts 10738576527cfacaf42af8316e1030c192193e94225aNeil Roberts /** 10748576527cfacaf42af8316e1030c192193e94225aNeil Roberts * Returned address bit 6 swizzling required for CPU access through 10758576527cfacaf42af8316e1030c192193e94225aNeil Roberts * mmap mapping whilst bound. 10768576527cfacaf42af8316e1030c192193e94225aNeil Roberts */ 10778576527cfacaf42af8316e1030c192193e94225aNeil Roberts __u32 phys_swizzle_mode; 10782b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 10792b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10802b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_get_aperture { 10812b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Total size of the aperture used by i915_gem_execbuffer, in bytes */ 10822b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 aper_size; 10832b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10842b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** 10852b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * Available space in the aperture used by i915_gem_execbuffer, in 10862b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * bytes 10872b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 10882b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u64 aper_available_size; 10892b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 10902b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10912b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_get_pipe_from_crtc_id { 10922b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** ID of CRTC being requested **/ 10932b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 crtc_id; 10942b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10952b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** pipe of requested CRTC **/ 10962b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 pipe; 10972b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 10982b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 10992b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_MADV_WILLNEED 0 11002b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_MADV_DONTNEED 1 11012b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define __I915_MADV_PURGED 2 /* internal state */ 11022b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 11032b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_i915_gem_madvise { 11042b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Handle of the buffer to change the backing store advice */ 11052b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 handle; 11062b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 11072b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /* Advice: either the buffer will be needed again in the near future, 11082b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg * or wont be and could be discarded under memory pressure. 11092b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg */ 11102b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 madv; 11112b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 11122b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /** Whether the backing store still exists. */ 11132b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 retained; 11142b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 11152b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 11162b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* flags */ 11172b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_TYPE_MASK 0xff 11182b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_YUV_PLANAR 0x01 11192b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_YUV_PACKED 0x02 11202b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_RGB 0x03 11212b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 11222b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_DEPTH_MASK 0xff00 11232b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_RGB24 0x1000 11242b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_RGB16 0x2000 11252b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_RGB15 0x3000 11262b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_YUV422 0x0100 11272b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_YUV411 0x0200 11282b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_YUV420 0x0300 11292b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_YUV410 0x0400 11302b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 11312b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_SWAP_MASK 0xff0000 11322b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_NO_SWAP 0x000000 11332b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_UV_SWAP 0x010000 11342b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_Y_SWAP 0x020000 11352b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_Y_AND_UV_SWAP 0x030000 11362b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 11372b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_FLAGS_MASK 0xff000000 11382b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_ENABLE 0x01000000 11392b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 11402b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_intel_overlay_put_image { 11412b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /* various flags and src format description */ 11422b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 flags; 11432b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /* source picture description */ 11442b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 bo_handle; 11452b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /* stride values and offsets are in bytes, buffer relative */ 11462b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u16 stride_Y; /* stride for packed formats */ 11472b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u16 stride_UV; 11482b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 offset_Y; /* offset for packet formats */ 11492b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 offset_U; 11502b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 offset_V; 11512b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /* in pixels */ 11522b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u16 src_width; 11532b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u16 src_height; 11542b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /* to compensate the scaling factors for partially covered surfaces */ 11552b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u16 src_scan_width; 11562b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u16 src_scan_height; 11572b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg /* output crtc description */ 11582b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 crtc_id; 11592b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u16 dst_x; 11602b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u16 dst_y; 11612b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u16 dst_width; 11622b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u16 dst_height; 11632b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 11642b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 11652b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg/* flags */ 11662b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_UPDATE_ATTRS (1<<0) 11672b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg#define I915_OVERLAY_UPDATE_GAMMA (1<<1) 11687d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#define I915_OVERLAY_DISABLE_DEST_COLORKEY (1<<2) 11692b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsbergstruct drm_intel_overlay_attrs { 11702b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 flags; 11712b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 color_key; 11722b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __s32 brightness; 11732b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 contrast; 11742b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 saturation; 11752b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 gamma0; 11762b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 gamma1; 11772b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 gamma2; 11782b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 gamma3; 11792b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 gamma4; 11802b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg __u32 gamma5; 11812b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg}; 11822b42af9a2fd8e35e920d61a212ce6b9c85354289Kristian Høgsberg 118366518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes/* 118466518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * Intel sprite handling 118566518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * 118666518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * Color keying works with a min/mask/max tuple. Both source and destination 118766518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * color keying is allowed. 118866518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * 118966518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * Source keying: 119066518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * Sprite pixels within the min & max values, masked against the color channels 119166518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * specified in the mask field, will be transparent. All other pixels will 119266518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * be displayed on top of the primary plane. For RGB surfaces, only the min 119366518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * and mask fields will be used; ranged compares are not allowed. 119466518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * 119566518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * Destination keying: 119666518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * Primary plane pixels that match the min value, masked against the color 119766518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * channels specified in the mask field, will be replaced by corresponding 119866518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * pixels from the sprite plane. 119966518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * 120066518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * Note that source & destination keying are exclusive; only one can be 120166518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes * active on a given plane. 120266518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes */ 120366518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes 120466518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes#define I915_SET_COLORKEY_NONE (1<<0) /* disable color key matching */ 120566518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes#define I915_SET_COLORKEY_DESTINATION (1<<1) 120666518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes#define I915_SET_COLORKEY_SOURCE (1<<2) 120766518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnesstruct drm_intel_sprite_colorkey { 120866518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes __u32 plane_id; 120966518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes __u32 min_value; 121066518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes __u32 channel_mask; 121166518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes __u32 max_value; 121266518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes __u32 flags; 121366518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes}; 121466518ab5653cfdc840cd69e7b653ec05df060584Jesse Barnes 1215ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawskystruct drm_i915_gem_wait { 1216ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawsky /** Handle of BO we shall wait on */ 1217ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawsky __u32 bo_handle; 1218ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawsky __u32 flags; 1219ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawsky /** Number of nanoseconds to wait, Returns time remaining. */ 1220ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawsky __s64 timeout_ns; 1221ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawsky}; 1222ba6130c2d6f4e9833f4d5b43da01673827b26bd4Ben Widawsky 1223a5b2946889471f6075852949f90f660e43b68532Ben Widawskystruct drm_i915_gem_context_create { 1224a5b2946889471f6075852949f90f660e43b68532Ben Widawsky /* output: id of new context*/ 1225a5b2946889471f6075852949f90f660e43b68532Ben Widawsky __u32 ctx_id; 1226a5b2946889471f6075852949f90f660e43b68532Ben Widawsky __u32 pad; 1227a5b2946889471f6075852949f90f660e43b68532Ben Widawsky}; 1228a5b2946889471f6075852949f90f660e43b68532Ben Widawsky 1229a5b2946889471f6075852949f90f660e43b68532Ben Widawskystruct drm_i915_gem_context_destroy { 1230a5b2946889471f6075852949f90f660e43b68532Ben Widawsky __u32 ctx_id; 1231a5b2946889471f6075852949f90f660e43b68532Ben Widawsky __u32 pad; 1232a5b2946889471f6075852949f90f660e43b68532Ben Widawsky}; 1233a5b2946889471f6075852949f90f660e43b68532Ben Widawsky 1234934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholtstruct drm_i915_reg_read { 12357d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen /* 12367d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * Register offset. 12377d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * For 64bit wide registers where the upper 32bits don't immediately 12387d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * follow the lower 32bits, the offset of the lower 32bits must 12397d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * be specified 12407d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen */ 1241934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt __u64 offset; 1242934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt __u64 val; /* Return value */ 1243934ea3b32127ea2a4ba5bf14228af6c60d3437b6Eric Anholt}; 12447d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen/* Known registers: 12457d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * 12467d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * Render engine timestamp - 0x2358 + 64bit - gen7+ 12477d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * - Note this register returns an invalid value if using the default 12487d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * single instruction 8byte read, in order to workaround that use 12497d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * offset (0x2538 | 1) instead. 12507d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen * 12517d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen */ 12525a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick 12535a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanickstruct drm_i915_reset_stats { 12545a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick __u32 ctx_id; 12555a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick __u32 flags; 12565a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick 12575a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick /* All resets since boot/module reload, for all contexts */ 12585a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick __u32 reset_count; 12595a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick 12605a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick /* Number of batches lost when active in GPU, for this context */ 12615a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick __u32 batch_active; 12625a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick 12635a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick /* Number of batches lost pending for execution, for this context */ 12645a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick __u32 batch_pending; 12655a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick 12665a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick __u32 pad; 12675a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick}; 12685a41b025042c42788977e67aea8d1bf3b59baae4Ian Romanick 12694fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulinstruct drm_i915_gem_userptr { 12704fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulin __u64 user_ptr; 12714fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulin __u64 user_size; 12724fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulin __u32 flags; 12734fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulin#define I915_USERPTR_READ_ONLY 0x1 12744fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulin#define I915_USERPTR_UNSYNCHRONIZED 0x80000000 12754fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulin /** 12768576527cfacaf42af8316e1030c192193e94225aNeil Roberts * Returned handle for the object. 12778576527cfacaf42af8316e1030c192193e94225aNeil Roberts * 12788576527cfacaf42af8316e1030c192193e94225aNeil Roberts * Object handles are nonzero. 12798576527cfacaf42af8316e1030c192193e94225aNeil Roberts */ 12804fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulin __u32 handle; 12814fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulin}; 12824fddc92e04f5326d78b1bb0252e2f64725e96edbTvrtko Ursulin 12838576527cfacaf42af8316e1030c192193e94225aNeil Robertsstruct drm_i915_gem_context_param { 12848576527cfacaf42af8316e1030c192193e94225aNeil Roberts __u32 ctx_id; 12858576527cfacaf42af8316e1030c192193e94225aNeil Roberts __u32 size; 12868576527cfacaf42af8316e1030c192193e94225aNeil Roberts __u64 param; 12877d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#define I915_CONTEXT_PARAM_BAN_PERIOD 0x1 12887d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2 12897d74a83d22e694b2cd71e40992fd5a970d227e32Kristian Høgsberg Kristensen#define I915_CONTEXT_PARAM_GTT_SIZE 0x3 1290a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4 1291a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_CONTEXT_PARAM_BANNABLE 0x5 12928576527cfacaf42af8316e1030c192193e94225aNeil Roberts __u64 value; 12938576527cfacaf42af8316e1030c192193e94225aNeil Roberts}; 12948576527cfacaf42af8316e1030c192193e94225aNeil Roberts 1295a3d715ee14b29d2680ceaf44955679205795140cChris Wilsonenum drm_i915_oa_format { 1296a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_OA_FORMAT_A13 = 1, 1297a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_OA_FORMAT_A29, 1298a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_OA_FORMAT_A13_B8_C8, 1299a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_OA_FORMAT_B4_C8, 1300a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_OA_FORMAT_A45_B8_C8, 1301a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_OA_FORMAT_B4_C8_A16, 1302a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_OA_FORMAT_C4_B8, 1303a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1304a3d715ee14b29d2680ceaf44955679205795140cChris Wilson I915_OA_FORMAT_MAX /* non-ABI */ 1305a3d715ee14b29d2680ceaf44955679205795140cChris Wilson}; 1306a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1307a3d715ee14b29d2680ceaf44955679205795140cChris Wilsonenum drm_i915_perf_property_id { 1308a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /** 1309a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Open the stream for a specific context handle (as used with 1310a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * execbuffer2). A stream opened for a specific context this way 1311a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * won't typically require root privileges. 1312a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1313a3d715ee14b29d2680ceaf44955679205795140cChris Wilson DRM_I915_PERF_PROP_CTX_HANDLE = 1, 1314a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1315a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /** 1316a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * A value of 1 requests the inclusion of raw OA unit reports as 1317a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * part of stream samples. 1318a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1319a3d715ee14b29d2680ceaf44955679205795140cChris Wilson DRM_I915_PERF_PROP_SAMPLE_OA, 1320a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1321a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /** 1322a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * The value specifies which set of OA unit metrics should be 1323a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * be configured, defining the contents of any OA unit reports. 1324a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1325a3d715ee14b29d2680ceaf44955679205795140cChris Wilson DRM_I915_PERF_PROP_OA_METRICS_SET, 1326a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1327a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /** 1328a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * The value specifies the size and layout of OA unit reports. 1329a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1330a3d715ee14b29d2680ceaf44955679205795140cChris Wilson DRM_I915_PERF_PROP_OA_FORMAT, 1331a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1332a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /** 1333a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Specifying this property implicitly requests periodic OA unit 1334a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * sampling and (at least on Haswell) the sampling frequency is derived 1335a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * from this exponent as follows: 1336a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 1337a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 80ns * 2^(period_exponent + 1) 1338a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1339a3d715ee14b29d2680ceaf44955679205795140cChris Wilson DRM_I915_PERF_PROP_OA_EXPONENT, 1340a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1341a3d715ee14b29d2680ceaf44955679205795140cChris Wilson DRM_I915_PERF_PROP_MAX /* non-ABI */ 1342a3d715ee14b29d2680ceaf44955679205795140cChris Wilson}; 1343a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1344a3d715ee14b29d2680ceaf44955679205795140cChris Wilsonstruct drm_i915_perf_open_param { 1345a3d715ee14b29d2680ceaf44955679205795140cChris Wilson __u32 flags; 1346a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PERF_FLAG_FD_CLOEXEC (1<<0) 1347a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PERF_FLAG_FD_NONBLOCK (1<<1) 1348a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PERF_FLAG_DISABLED (1<<2) 1349a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1350a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /** The number of u64 (id, value) pairs */ 1351a3d715ee14b29d2680ceaf44955679205795140cChris Wilson __u32 num_properties; 1352a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1353a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /** 1354a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Pointer to array of u64 (id, value) pairs configuring the stream 1355a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * to open. 1356a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1357a3d715ee14b29d2680ceaf44955679205795140cChris Wilson __u64 properties_ptr; 1358a3d715ee14b29d2680ceaf44955679205795140cChris Wilson}; 1359a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1360a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/** 1361a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Enable data capture for a stream that was either opened in a disabled state 1362a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * via I915_PERF_FLAG_DISABLED or was later disabled via 1363a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * I915_PERF_IOCTL_DISABLE. 1364a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 1365a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * It is intended to be cheaper to disable and enable a stream than it may be 1366a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * to close and re-open a stream with the same configuration. 1367a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 1368a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * It's undefined whether any pending data for the stream will be lost. 1369a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1370a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PERF_IOCTL_ENABLE _IO('i', 0x0) 1371a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1372a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/** 1373a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Disable data capture for a stream. 1374a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 1375a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * It is an error to try and read a stream that is disabled. 1376a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1377a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#define I915_PERF_IOCTL_DISABLE _IO('i', 0x1) 1378a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1379a3d715ee14b29d2680ceaf44955679205795140cChris Wilson/** 1380a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Common to all i915 perf records 1381a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1382a3d715ee14b29d2680ceaf44955679205795140cChris Wilsonstruct drm_i915_perf_record_header { 1383a3d715ee14b29d2680ceaf44955679205795140cChris Wilson __u32 type; 1384a3d715ee14b29d2680ceaf44955679205795140cChris Wilson __u16 pad; 1385a3d715ee14b29d2680ceaf44955679205795140cChris Wilson __u16 size; 1386a3d715ee14b29d2680ceaf44955679205795140cChris Wilson}; 1387a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1388a3d715ee14b29d2680ceaf44955679205795140cChris Wilsonenum drm_i915_perf_record_type { 1389a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1390a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /** 1391a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Samples are the work horse record type whose contents are extensible 1392a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * and defined when opening an i915 perf stream based on the given 1393a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * properties. 1394a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 1395a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Boolean properties following the naming convention 1396a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * DRM_I915_PERF_SAMPLE_xyz_PROP request the inclusion of 'xyz' data in 1397a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * every sample. 1398a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 1399a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * The order of these sample properties given by userspace has no 1400a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * affect on the ordering of data within a sample. The order is 1401a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * documented here. 1402a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 1403a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * struct { 1404a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * struct drm_i915_perf_record_header header; 1405a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * 1406a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * { u32 oa_report[]; } && DRM_I915_PERF_PROP_SAMPLE_OA 1407a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * }; 1408a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1409a3d715ee14b29d2680ceaf44955679205795140cChris Wilson DRM_I915_PERF_RECORD_SAMPLE = 1, 1410a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1411a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /* 1412a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * Indicates that one or more OA reports were not written by the 1413a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * hardware. This can happen for example if an MI_REPORT_PERF_COUNT 1414a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * command collides with periodic sampling - which would be more likely 1415a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * at higher sampling frequencies. 1416a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1417a3d715ee14b29d2680ceaf44955679205795140cChris Wilson DRM_I915_PERF_RECORD_OA_REPORT_LOST = 2, 1418a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1419a3d715ee14b29d2680ceaf44955679205795140cChris Wilson /** 1420a3d715ee14b29d2680ceaf44955679205795140cChris Wilson * An error occurred that resulted in all pending OA reports being lost. 1421a3d715ee14b29d2680ceaf44955679205795140cChris Wilson */ 1422a3d715ee14b29d2680ceaf44955679205795140cChris Wilson DRM_I915_PERF_RECORD_OA_BUFFER_LOST = 3, 1423a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1424a3d715ee14b29d2680ceaf44955679205795140cChris Wilson DRM_I915_PERF_RECORD_MAX /* non-ABI */ 1425a3d715ee14b29d2680ceaf44955679205795140cChris Wilson}; 1426a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1427a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#if defined(__cplusplus) 1428a3d715ee14b29d2680ceaf44955679205795140cChris Wilson} 1429a3d715ee14b29d2680ceaf44955679205795140cChris Wilson#endif 1430a3d715ee14b29d2680ceaf44955679205795140cChris Wilson 1431a254cb50414a5def5c872a765c0dd1295a550c6bBen Widawsky#endif /* _I915_DRM_H_ */ 1432