MachineScheduler.h revision d04ec0c855176ebddd459c044bdd24f49938fae4 
1//==- MachineScheduler.h - MachineInstr Scheduling Pass ----------*- C++ -*-==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file provides a MachineSchedRegistry for registering alternative machine
11// schedulers. A Target may provide an alternative scheduler implementation by
12// implementing the following boilerplate:
13//
14// static ScheduleDAGInstrs *createCustomMachineSched(MachineSchedContext *C) {
15//  return new CustomMachineScheduler(C);
16// }
17// static MachineSchedRegistry
18// SchedCustomRegistry("custom", "Run my target's custom scheduler",
19//                     createCustomMachineSched);
20//
21// Inside <Target>PassConfig:
22//   enablePass(MachineSchedulerID);
23//   MachineSchedRegistry::setDefault(createCustomMachineSched);
24//
25//===----------------------------------------------------------------------===//
26
27#ifndef MACHINESCHEDULER_H
28#define MACHINESCHEDULER_H
29
30#include "llvm/CodeGen/MachinePassRegistry.h"
31
32namespace llvm {
33
34class AliasAnalysis;
35class LiveIntervals;
36class MachineDominatorTree;
37class MachineLoopInfo;
38class ScheduleDAGInstrs;
39
40/// MachineSchedContext provides enough context from the MachineScheduler pass
41/// for the target to instantiate a scheduler.
42struct MachineSchedContext {
43  MachineFunction *MF;
44  const MachineLoopInfo *MLI;
45  const MachineDominatorTree *MDT;
46  const TargetPassConfig *PassConfig;
47  AliasAnalysis *AA;
48  LiveIntervals *LIS;
49
50  MachineSchedContext(): MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) {}
51};
52
53/// MachineSchedRegistry provides a selection of available machine instruction
54/// schedulers.
55class MachineSchedRegistry : public MachinePassRegistryNode {
56public:
57  typedef ScheduleDAGInstrs *(*ScheduleDAGCtor)(MachineSchedContext *);
58
59  // RegisterPassParser requires a (misnamed) FunctionPassCtor type.
60  typedef ScheduleDAGCtor FunctionPassCtor;
61
62  static MachinePassRegistry Registry;
63
64  MachineSchedRegistry(const char *N, const char *D, ScheduleDAGCtor C)
65    : MachinePassRegistryNode(N, D, (MachinePassCtor)C) {
66    Registry.Add(this);
67  }
68  ~MachineSchedRegistry() { Registry.Remove(this); }
69
70  // Accessors.
71  //
72  MachineSchedRegistry *getNext() const {
73    return (MachineSchedRegistry *)MachinePassRegistryNode::getNext();
74  }
75  static MachineSchedRegistry *getList() {
76    return (MachineSchedRegistry *)Registry.getList();
77  }
78  static ScheduleDAGCtor getDefault() {
79    return (ScheduleDAGCtor)Registry.getDefault();
80  }
81  static void setDefault(ScheduleDAGCtor C) {
82    Registry.setDefault((MachinePassCtor)C);
83  }
84  static void setListener(MachinePassRegistryListener *L) {
85    Registry.setListener(L);
86  }
87};
88
89} // namespace llvm
90
91#endif
92