TargetMachine.h revision 0eebf653a7b2978e7761f8d068b6fbec22aea0f6
1//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the TargetMachine and LLVMTargetMachine classes. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_TARGET_TARGETMACHINE_H 15#define LLVM_TARGET_TARGETMACHINE_H 16 17#include "llvm/Target/TargetInstrItineraries.h" 18#include <cassert> 19 20namespace llvm { 21 22class TargetAsmInfo; 23class TargetData; 24class TargetSubtarget; 25class TargetInstrInfo; 26class TargetIntrinsicInfo; 27class TargetJITInfo; 28class TargetLowering; 29class TargetFrameInfo; 30class MachineCodeEmitter; 31class JITCodeEmitter; 32class TargetRegisterInfo; 33class Module; 34class PassManagerBase; 35class PassManager; 36class Pass; 37class TargetMachOWriterInfo; 38class TargetELFWriterInfo; 39class raw_ostream; 40 41// Relocation model types. 42namespace Reloc { 43 enum Model { 44 Default, 45 Static, 46 PIC_, // Cannot be named PIC due to collision with -DPIC 47 DynamicNoPIC 48 }; 49} 50 51// Code model types. 52namespace CodeModel { 53 enum Model { 54 Default, 55 Small, 56 Kernel, 57 Medium, 58 Large 59 }; 60} 61 62namespace FileModel { 63 enum Model { 64 Error, 65 None, 66 AsmFile, 67 MachOFile, 68 ElfFile 69 }; 70} 71 72// Code generation optimization level. 73namespace CodeGenOpt { 74 enum Level { 75 Default, 76 None, 77 Aggressive 78 }; 79} 80 81namespace FloatABI { 82 enum ABIType { 83 Default, 84 Soft, 85 Hard 86 }; 87} 88 89//===----------------------------------------------------------------------===// 90/// 91/// TargetMachine - Primary interface to the complete machine description for 92/// the target machine. All target-specific information should be accessible 93/// through this interface. 94/// 95class TargetMachine { 96 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT 97 void operator=(const TargetMachine &); // DO NOT IMPLEMENT 98protected: // Can only create subclasses. 99 TargetMachine(); 100 101 /// getSubtargetImpl - virtual method implemented by subclasses that returns 102 /// a reference to that target's TargetSubtarget-derived member variable. 103 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; } 104 105 /// AsmInfo - Contains target specific asm information. 106 /// 107 mutable const TargetAsmInfo *AsmInfo; 108 109 /// createTargetAsmInfo - Create a new instance of target specific asm 110 /// information. 111 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; } 112 113public: 114 virtual ~TargetMachine(); 115 116 /// getModuleMatchQuality - This static method should be implemented by 117 /// targets to indicate how closely they match the specified module. This is 118 /// used by the LLC tool to determine which target to use when an explicit 119 /// -march option is not specified. If a target returns zero, it will never 120 /// be chosen without an explicit -march option. 121 static unsigned getModuleMatchQuality(const Module &) { return 0; } 122 123 /// getJITMatchQuality - This static method should be implemented by targets 124 /// that provide JIT capabilities to indicate how suitable they are for 125 /// execution on the current host. If a value of 0 is returned, the target 126 /// will not be used unless an explicit -march option is used. 127 static unsigned getJITMatchQuality() { return 0; } 128 129 // Interfaces to the major aspects of target machine information: 130 // -- Instruction opcode and operand information 131 // -- Pipelines and scheduling information 132 // -- Stack frame information 133 // -- Selection DAG lowering information 134 // 135 virtual const TargetInstrInfo *getInstrInfo() const { return 0; } 136 virtual const TargetFrameInfo *getFrameInfo() const { return 0; } 137 virtual TargetLowering *getTargetLowering() const { return 0; } 138 virtual const TargetData *getTargetData() const { return 0; } 139 140 /// getTargetAsmInfo - Return target specific asm information. 141 /// 142 const TargetAsmInfo *getTargetAsmInfo() const { 143 if (!AsmInfo) AsmInfo = createTargetAsmInfo(); 144 return AsmInfo; 145 } 146 147 /// getSubtarget - This method returns a pointer to the specified type of 148 /// TargetSubtarget. In debug builds, it verifies that the object being 149 /// returned is of the correct type. 150 template<typename STC> const STC &getSubtarget() const { 151 const TargetSubtarget *TST = getSubtargetImpl(); 152 assert(TST && dynamic_cast<const STC*>(TST) && 153 "Not the right kind of subtarget!"); 154 return *static_cast<const STC*>(TST); 155 } 156 157 /// getRegisterInfo - If register information is available, return it. If 158 /// not, return null. This is kept separate from RegInfo until RegInfo has 159 /// details of graph coloring register allocation removed from it. 160 /// 161 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; } 162 163 /// getIntrinsicInfo - If intrinsic information is available, return it. If 164 /// not, return null. 165 /// 166 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; } 167 168 /// getJITInfo - If this target supports a JIT, return information for it, 169 /// otherwise return null. 170 /// 171 virtual TargetJITInfo *getJITInfo() { return 0; } 172 173 /// getInstrItineraryData - Returns instruction itinerary data for the target 174 /// or specific subtarget. 175 /// 176 virtual const InstrItineraryData getInstrItineraryData() const { 177 return InstrItineraryData(); 178 } 179 180 /// getMachOWriterInfo - If this target supports a Mach-O writer, return 181 /// information for it, otherwise return null. 182 /// 183 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; } 184 185 /// getELFWriterInfo - If this target supports an ELF writer, return 186 /// information for it, otherwise return null. 187 /// 188 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; } 189 190 /// getRelocationModel - Returns the code generation relocation model. The 191 /// choices are static, PIC, and dynamic-no-pic, and target default. 192 static Reloc::Model getRelocationModel(); 193 194 /// setRelocationModel - Sets the code generation relocation model. 195 /// 196 static void setRelocationModel(Reloc::Model Model); 197 198 /// getCodeModel - Returns the code model. The choices are small, kernel, 199 /// medium, large, and target default. 200 static CodeModel::Model getCodeModel(); 201 202 /// setCodeModel - Sets the code model. 203 /// 204 static void setCodeModel(CodeModel::Model Model); 205 206 /// getAsmVerbosityDefault - Returns the default value of asm verbosity. 207 /// 208 static bool getAsmVerbosityDefault(); 209 210 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default 211 /// is false. 212 static void setAsmVerbosityDefault(bool); 213 214 /// CodeGenFileType - These enums are meant to be passed into 215 /// addPassesToEmitFile to indicate what type of file to emit. 216 enum CodeGenFileType { 217 AssemblyFile, ObjectFile, DynamicLibrary 218 }; 219 220 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 221 /// on this target. User flag overrides. 222 virtual bool getEnableTailMergeDefault() const { return true; } 223 224 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 225 /// specified file emitted. Typically this will involve several steps of code 226 /// generation. If Fast is set to true, the code generator should emit code 227 /// as fast as possible, though the generated code may be less efficient. 228 /// This method should return FileModel::Error if emission of this file type 229 /// is not supported. 230 /// 231 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &, 232 raw_ostream &, 233 CodeGenFileType, 234 CodeGenOpt::Level) { 235 return FileModel::None; 236 } 237 238 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 239 /// to be split up (e.g., to add an object writer pass), this method can be 240 /// used to finish up adding passes to emit the file, if necessary. 241 /// 242 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 243 MachineCodeEmitter *, 244 CodeGenOpt::Level) { 245 return true; 246 } 247 248 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 249 /// to be split up (e.g., to add an object writer pass), this method can be 250 /// used to finish up adding passes to emit the file, if necessary. 251 /// 252 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 253 JITCodeEmitter *, 254 CodeGenOpt::Level) { 255 return true; 256 } 257 258 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 259 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 260 /// actually outputting the machine code and resolving things like the address 261 /// of functions. This method returns true if machine code emission is 262 /// not supported. 263 /// 264 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 265 MachineCodeEmitter &, 266 CodeGenOpt::Level) { 267 return true; 268 } 269 270 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 271 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 272 /// actually outputting the machine code and resolving things like the address 273 /// of functions. This method returns true if machine code emission is 274 /// not supported. 275 /// 276 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 277 JITCodeEmitter &, 278 CodeGenOpt::Level) { 279 return true; 280 } 281 282 /// addPassesToEmitWholeFile - This method can be implemented by targets that 283 /// require having the entire module at once. This is not recommended, do not 284 /// use this. 285 virtual bool WantsWholeFile() const { return false; } 286 virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &, 287 CodeGenFileType, 288 CodeGenOpt::Level) { 289 return true; 290 } 291}; 292 293/// LLVMTargetMachine - This class describes a target machine that is 294/// implemented with the LLVM target-independent code generator. 295/// 296class LLVMTargetMachine : public TargetMachine { 297protected: // Can only create subclasses. 298 LLVMTargetMachine() { } 299 300 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for 301 /// both emitting to assembly files or machine code output. 302 /// 303 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level); 304 305public: 306 307 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 308 /// specified file emitted. Typically this will involve several steps of code 309 /// generation. If OptLevel is None, the code generator should emit code as fast 310 /// as possible, though the generated code may be less efficient. This method 311 /// should return FileModel::Error if emission of this file type is not 312 /// supported. 313 /// 314 /// The default implementation of this method adds components from the 315 /// LLVM retargetable code generator, invoking the methods below to get 316 /// target-specific passes in standard locations. 317 /// 318 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM, 319 raw_ostream &Out, 320 CodeGenFileType FileType, 321 CodeGenOpt::Level); 322 323 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 324 /// to be split up (e.g., to add an object writer pass), this method can be 325 /// used to finish up adding passes to emit the file, if necessary. 326 /// 327 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 328 MachineCodeEmitter *MCE, 329 CodeGenOpt::Level); 330 331 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 332 /// to be split up (e.g., to add an object writer pass), this method can be 333 /// used to finish up adding passes to emit the file, if necessary. 334 /// 335 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 336 JITCodeEmitter *MCE, 337 CodeGenOpt::Level); 338 339 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 340 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 341 /// actually outputting the machine code and resolving things like the address 342 /// of functions. This method returns true if machine code emission is 343 /// not supported. 344 /// 345 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, 346 MachineCodeEmitter &MCE, 347 CodeGenOpt::Level); 348 349 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 350 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 351 /// actually outputting the machine code and resolving things like the address 352 /// of functions. This method returns true if machine code emission is 353 /// not supported. 354 /// 355 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, 356 JITCodeEmitter &MCE, 357 CodeGenOpt::Level); 358 359 /// Target-Independent Code Generator Pass Configuration Options. 360 361 /// addInstSelector - This method should add any "last minute" LLVM->LLVM 362 /// passes, then install an instruction selector pass, which converts from 363 /// LLVM code to machine instructions. 364 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) { 365 return true; 366 } 367 368 /// addPreRegAllocPasses - This method may be implemented by targets that want 369 /// to run passes immediately before register allocation. This should return 370 /// true if -print-machineinstrs should print after these passes. 371 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) { 372 return false; 373 } 374 375 /// addPostRegAllocPasses - This method may be implemented by targets that 376 /// want to run passes after register allocation but before prolog-epilog 377 /// insertion. This should return true if -print-machineinstrs should print 378 /// after these passes. 379 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) { 380 return false; 381 } 382 383 /// addPreEmitPass - This pass may be implemented by targets that want to run 384 /// passes immediately before machine code is emitted. This should return 385 /// true if -print-machineinstrs should print out the code after the passes. 386 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) { 387 return false; 388 } 389 390 391 /// addAssemblyEmitter - This pass should be overridden by the target to add 392 /// the asmprinter, if asm emission is supported. If this is not supported, 393 /// 'true' should be returned. 394 virtual bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level, 395 bool /* VerboseAsmDefault */, raw_ostream &) { 396 return true; 397 } 398 399 /// addCodeEmitter - This pass should be overridden by the target to add a 400 /// code emitter, if supported. If this is not supported, 'true' should be 401 /// returned. If DumpAsm is true, the generated assembly is printed to cerr. 402 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 403 bool /*DumpAsm*/, MachineCodeEmitter &) { 404 return true; 405 } 406 407 /// addCodeEmitter - This pass should be overridden by the target to add a 408 /// code emitter, if supported. If this is not supported, 'true' should be 409 /// returned. If DumpAsm is true, the generated assembly is printed to cerr. 410 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 411 bool /*DumpAsm*/, JITCodeEmitter &) { 412 return true; 413 } 414 415 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 416 /// a code emitter (without setting flags), if supported. If this is not 417 /// supported, 'true' should be returned. If DumpAsm is true, the generated 418 /// assembly is printed to cerr. 419 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 420 bool /*DumpAsm*/, MachineCodeEmitter &) { 421 return true; 422 } 423 424 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 425 /// a code emitter (without setting flags), if supported. If this is not 426 /// supported, 'true' should be returned. If DumpAsm is true, the generated 427 /// assembly is printed to cerr. 428 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 429 bool /*DumpAsm*/, JITCodeEmitter &) { 430 return true; 431 } 432 433 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 434 /// on this target. User flag overrides. 435 virtual bool getEnableTailMergeDefault() const { return true; } 436}; 437 438} // End llvm namespace 439 440#endif 441