TargetMachine.h revision 282ec57c4cdd4574103922487b6f1563b5034fb4 
1//===-- llvm/Target/TargetMachine.h - General Target Information -*- C++ -*-==//
2//
3// This file describes the general parts of a Target machine.
4//
5//===----------------------------------------------------------------------===//
6
7#ifndef LLVM_TARGET_TARGETMACHINE_H
8#define LLVM_TARGET_TARGETMACHINE_H
9
10#include "llvm/Target/TargetData.h"
11#include "Support/NonCopyable.h"
12
13class MachineInstrInfo;
14class MachineInstrDescriptor;
15class MachineSchedInfo;
16class MachineRegInfo;
17class MachineFrameInfo;
18class MachineCacheInfo;
19class MachineOptInfo;
20class MRegisterInfo;
21class PassManager;
22class Pass;
23
24//---------------------------------------------------------------------------
25// class TargetMachine
26//
27// Purpose:
28//   Primary interface to the complete machine description for the
29//   target machine.  All target-specific information should be
30//   accessible through this interface.
31//
32//---------------------------------------------------------------------------
33
34class TargetMachine : public NonCopyableV {
35  const std::string Name;
36public:
37  const TargetData DataLayout;		// Calculates type size & alignment
38
39protected:
40  TargetMachine(const std::string &name, // Can only create subclasses...
41                unsigned char SubWordSize = 1, unsigned char IntRegSize = 8,
42		unsigned char PtrSize = 8, unsigned char PtrAl = 8,
43		unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
44		unsigned char LongAl = 8, unsigned char IntAl = 4,
45		unsigned char ShortAl = 2, unsigned char ByteAl = 1)
46    : Name(name), DataLayout(name, SubWordSize, IntRegSize, PtrSize, PtrAl,
47                             DoubleAl, FloatAl, LongAl,
48                             IntAl, ShortAl, ByteAl) {}
49public:
50  virtual ~TargetMachine() {}
51
52  const std::string &getName() const { return Name; }
53
54  //
55  // Interfaces to the major aspects of target machine information:
56  // -- Instruction opcode and operand information
57  // -- Pipelines and scheduling information
58  // -- Register information
59  // -- Stack frame information
60  // -- Cache hierarchy information
61  // -- Machine-level optimization information (peephole only)
62  //
63  virtual const MachineInstrInfo&       getInstrInfo() const = 0;
64  virtual const MachineSchedInfo&       getSchedInfo() const = 0;
65  virtual const MachineRegInfo&	        getRegInfo()   const = 0;
66  virtual const MachineFrameInfo&       getFrameInfo() const = 0;
67  virtual const MachineCacheInfo&       getCacheInfo() const = 0;
68  virtual const MachineOptInfo&         getOptInfo()   const = 0;
69
70  /// getRegisterInfo - If register information is available, return it.  If
71  /// not, return null.  This is kept separate from RegInfo until RegInfo gets
72  /// straightened out.
73  ///
74  virtual const MRegisterInfo*          getRegisterInfo() const { return 0; }
75
76  // Data storage information
77  //
78  virtual unsigned findOptimalStorageSize(const Type* ty) const;
79
80  /// addPassesToEmitAssembly - Add passes to the specified pass manager to get
81  /// assembly langage code emited.  Typically this will involve several steps
82  /// of code generation.  This method should return true if code generation is
83  /// not supported.
84  ///
85  virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) {
86    return true;
87  }
88
89  /// addPassesToJITCompile - Add passes to the specified pass manager to
90  /// implement a fast dynamic compiler for this target.  Return true if this is
91  /// not supported for this target.
92  ///
93  virtual bool addPassesToJITCompile(PassManager &PM) { return true; }
94};
95
96#endif
97