TargetMachine.h revision 892fe182c83ae58fe6318527912fc71ebd687a23
1//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the TargetMachine and LLVMTargetMachine classes. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_TARGET_TARGETMACHINE_H 15#define LLVM_TARGET_TARGETMACHINE_H 16 17#include "llvm/Target/TargetInstrItineraries.h" 18#include <cassert> 19 20namespace llvm { 21 22class Target; 23class TargetAsmInfo; 24class TargetData; 25class TargetSubtarget; 26class TargetInstrInfo; 27class TargetIntrinsicInfo; 28class TargetJITInfo; 29class TargetLowering; 30class TargetFrameInfo; 31class MachineCodeEmitter; 32class JITCodeEmitter; 33class ObjectCodeEmitter; 34class TargetRegisterInfo; 35class PassManagerBase; 36class PassManager; 37class Pass; 38class TargetMachOWriterInfo; 39class TargetELFWriterInfo; 40class formatted_raw_ostream; 41 42// Relocation model types. 43namespace Reloc { 44 enum Model { 45 Default, 46 Static, 47 PIC_, // Cannot be named PIC due to collision with -DPIC 48 DynamicNoPIC 49 }; 50} 51 52// Code model types. 53namespace CodeModel { 54 enum Model { 55 Default, 56 Small, 57 Kernel, 58 Medium, 59 Large 60 }; 61} 62 63namespace FileModel { 64 enum Model { 65 Error, 66 None, 67 AsmFile, 68 MachOFile, 69 ElfFile 70 }; 71} 72 73// Code generation optimization level. 74namespace CodeGenOpt { 75 enum Level { 76 Default, 77 None, 78 Aggressive 79 }; 80} 81 82 83//===----------------------------------------------------------------------===// 84/// 85/// TargetMachine - Primary interface to the complete machine description for 86/// the target machine. All target-specific information should be accessible 87/// through this interface. 88/// 89class TargetMachine { 90 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT 91 void operator=(const TargetMachine &); // DO NOT IMPLEMENT 92protected: // Can only create subclasses. 93 TargetMachine(const Target &); 94 95 /// getSubtargetImpl - virtual method implemented by subclasses that returns 96 /// a reference to that target's TargetSubtarget-derived member variable. 97 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; } 98 99 /// TheTarget - The Target that this machine was created for. 100 const Target &TheTarget; 101 102 /// AsmInfo - Contains target specific asm information. 103 /// 104 mutable const TargetAsmInfo *AsmInfo; 105 106 /// createTargetAsmInfo - Create a new instance of target specific asm 107 /// information. 108 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; } 109 110public: 111 virtual ~TargetMachine(); 112 113 const Target &getTarget() const { return TheTarget; } 114 115 // Interfaces to the major aspects of target machine information: 116 // -- Instruction opcode and operand information 117 // -- Pipelines and scheduling information 118 // -- Stack frame information 119 // -- Selection DAG lowering information 120 // 121 virtual const TargetInstrInfo *getInstrInfo() const { return 0; } 122 virtual const TargetFrameInfo *getFrameInfo() const { return 0; } 123 virtual TargetLowering *getTargetLowering() const { return 0; } 124 virtual const TargetData *getTargetData() const { return 0; } 125 126 /// getTargetAsmInfo - Return target specific asm information. 127 /// 128 const TargetAsmInfo *getTargetAsmInfo() const { 129 if (!AsmInfo) AsmInfo = createTargetAsmInfo(); 130 return AsmInfo; 131 } 132 133 /// getSubtarget - This method returns a pointer to the specified type of 134 /// TargetSubtarget. In debug builds, it verifies that the object being 135 /// returned is of the correct type. 136 template<typename STC> const STC &getSubtarget() const { 137 const TargetSubtarget *TST = getSubtargetImpl(); 138 assert(TST && dynamic_cast<const STC*>(TST) && 139 "Not the right kind of subtarget!"); 140 return *static_cast<const STC*>(TST); 141 } 142 143 /// getRegisterInfo - If register information is available, return it. If 144 /// not, return null. This is kept separate from RegInfo until RegInfo has 145 /// details of graph coloring register allocation removed from it. 146 /// 147 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; } 148 149 /// getIntrinsicInfo - If intrinsic information is available, return it. If 150 /// not, return null. 151 /// 152 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; } 153 154 /// getJITInfo - If this target supports a JIT, return information for it, 155 /// otherwise return null. 156 /// 157 virtual TargetJITInfo *getJITInfo() { return 0; } 158 159 /// getInstrItineraryData - Returns instruction itinerary data for the target 160 /// or specific subtarget. 161 /// 162 virtual const InstrItineraryData getInstrItineraryData() const { 163 return InstrItineraryData(); 164 } 165 166 /// getMachOWriterInfo - If this target supports a Mach-O writer, return 167 /// information for it, otherwise return null. 168 /// 169 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; } 170 171 /// getELFWriterInfo - If this target supports an ELF writer, return 172 /// information for it, otherwise return null. 173 /// 174 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; } 175 176 /// getRelocationModel - Returns the code generation relocation model. The 177 /// choices are static, PIC, and dynamic-no-pic, and target default. 178 static Reloc::Model getRelocationModel(); 179 180 /// setRelocationModel - Sets the code generation relocation model. 181 /// 182 static void setRelocationModel(Reloc::Model Model); 183 184 /// getCodeModel - Returns the code model. The choices are small, kernel, 185 /// medium, large, and target default. 186 static CodeModel::Model getCodeModel(); 187 188 /// setCodeModel - Sets the code model. 189 /// 190 static void setCodeModel(CodeModel::Model Model); 191 192 /// getAsmVerbosityDefault - Returns the default value of asm verbosity. 193 /// 194 static bool getAsmVerbosityDefault(); 195 196 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default 197 /// is false. 198 static void setAsmVerbosityDefault(bool); 199 200 /// CodeGenFileType - These enums are meant to be passed into 201 /// addPassesToEmitFile to indicate what type of file to emit. 202 enum CodeGenFileType { 203 AssemblyFile, ObjectFile, DynamicLibrary 204 }; 205 206 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 207 /// on this target. User flag overrides. 208 virtual bool getEnableTailMergeDefault() const { return true; } 209 210 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 211 /// specified file emitted. Typically this will involve several steps of code 212 /// generation. 213 /// This method should return FileModel::Error if emission of this file type 214 /// is not supported. 215 /// 216 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &, 217 formatted_raw_ostream &, 218 CodeGenFileType, 219 CodeGenOpt::Level) { 220 return FileModel::None; 221 } 222 223 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 224 /// to be split up (e.g., to add an object writer pass), this method can be 225 /// used to finish up adding passes to emit the file, if necessary. 226 /// 227 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 228 MachineCodeEmitter *, 229 CodeGenOpt::Level) { 230 return true; 231 } 232 233 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 234 /// to be split up (e.g., to add an object writer pass), this method can be 235 /// used to finish up adding passes to emit the file, if necessary. 236 /// 237 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 238 JITCodeEmitter *, 239 CodeGenOpt::Level) { 240 return true; 241 } 242 243 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 244 /// to be split up (e.g., to add an object writer pass), this method can be 245 /// used to finish up adding passes to emit the file, if necessary. 246 /// 247 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 248 ObjectCodeEmitter *, 249 CodeGenOpt::Level) { 250 return true; 251 } 252 253 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 254 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 255 /// actually outputting the machine code and resolving things like the address 256 /// of functions. This method returns true if machine code emission is 257 /// not supported. 258 /// 259 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 260 MachineCodeEmitter &, 261 CodeGenOpt::Level) { 262 return true; 263 } 264 265 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 266 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 267 /// actually outputting the machine code and resolving things like the address 268 /// of functions. This method returns true if machine code emission is 269 /// not supported. 270 /// 271 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 272 JITCodeEmitter &, 273 CodeGenOpt::Level) { 274 return true; 275 } 276 277 /// addPassesToEmitWholeFile - This method can be implemented by targets that 278 /// require having the entire module at once. This is not recommended, do not 279 /// use this. 280 virtual bool WantsWholeFile() const { return false; } 281 virtual bool addPassesToEmitWholeFile(PassManager &, formatted_raw_ostream &, 282 CodeGenFileType, 283 CodeGenOpt::Level) { 284 return true; 285 } 286}; 287 288/// LLVMTargetMachine - This class describes a target machine that is 289/// implemented with the LLVM target-independent code generator. 290/// 291class LLVMTargetMachine : public TargetMachine { 292protected: // Can only create subclasses. 293 LLVMTargetMachine(const Target &T) : TargetMachine(T) { } 294 295 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for 296 /// both emitting to assembly files or machine code output. 297 /// 298 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level); 299 300public: 301 302 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 303 /// specified file emitted. Typically this will involve several steps of code 304 /// generation. If OptLevel is None, the code generator should emit code as fast 305 /// as possible, though the generated code may be less efficient. This method 306 /// should return FileModel::Error if emission of this file type is not 307 /// supported. 308 /// 309 /// The default implementation of this method adds components from the 310 /// LLVM retargetable code generator, invoking the methods below to get 311 /// target-specific passes in standard locations. 312 /// 313 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM, 314 formatted_raw_ostream &Out, 315 CodeGenFileType FileType, 316 CodeGenOpt::Level); 317 318 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 319 /// to be split up (e.g., to add an object writer pass), this method can be 320 /// used to finish up adding passes to emit the file, if necessary. 321 /// 322 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 323 MachineCodeEmitter *MCE, 324 CodeGenOpt::Level); 325 326 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 327 /// to be split up (e.g., to add an object writer pass), this method can be 328 /// used to finish up adding passes to emit the file, if necessary. 329 /// 330 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 331 JITCodeEmitter *JCE, 332 CodeGenOpt::Level); 333 334 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 335 /// to be split up (e.g., to add an object writer pass), this method can be 336 /// used to finish up adding passes to emit the file, if necessary. 337 /// 338 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 339 ObjectCodeEmitter *OCE, 340 CodeGenOpt::Level); 341 342 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 343 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 344 /// actually outputting the machine code and resolving things like the address 345 /// of functions. This method returns true if machine code emission is 346 /// not supported. 347 /// 348 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, 349 MachineCodeEmitter &MCE, 350 CodeGenOpt::Level); 351 352 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 353 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 354 /// actually outputting the machine code and resolving things like the address 355 /// of functions. This method returns true if machine code emission is 356 /// not supported. 357 /// 358 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, 359 JITCodeEmitter &MCE, 360 CodeGenOpt::Level); 361 362 /// Target-Independent Code Generator Pass Configuration Options. 363 364 /// addInstSelector - This method should add any "last minute" LLVM->LLVM 365 /// passes, then install an instruction selector pass, which converts from 366 /// LLVM code to machine instructions. 367 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) { 368 return true; 369 } 370 371 /// addPreRegAllocPasses - This method may be implemented by targets that want 372 /// to run passes immediately before register allocation. This should return 373 /// true if -print-machineinstrs should print after these passes. 374 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) { 375 return false; 376 } 377 378 /// addPostRegAllocPasses - This method may be implemented by targets that 379 /// want to run passes after register allocation but before prolog-epilog 380 /// insertion. This should return true if -print-machineinstrs should print 381 /// after these passes. 382 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) { 383 return false; 384 } 385 386 /// addPreEmitPass - This pass may be implemented by targets that want to run 387 /// passes immediately before machine code is emitted. This should return 388 /// true if -print-machineinstrs should print out the code after the passes. 389 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) { 390 return false; 391 } 392 393 394 /// addCodeEmitter - This pass should be overridden by the target to add a 395 /// code emitter, if supported. If this is not supported, 'true' should be 396 /// returned. 397 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 398 MachineCodeEmitter &) { 399 return true; 400 } 401 402 /// addCodeEmitter - This pass should be overridden by the target to add a 403 /// code emitter, if supported. If this is not supported, 'true' should be 404 /// returned. 405 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 406 JITCodeEmitter &) { 407 return true; 408 } 409 410 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 411 /// a code emitter (without setting flags), if supported. If this is not 412 /// supported, 'true' should be returned. 413 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 414 MachineCodeEmitter &) { 415 return true; 416 } 417 418 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 419 /// a code emitter (without setting flags), if supported. If this is not 420 /// supported, 'true' should be returned. 421 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 422 JITCodeEmitter &) { 423 return true; 424 } 425 426 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 427 /// a code emitter (without setting flags), if supported. If this is not 428 /// supported, 'true' should be returned. 429 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 430 ObjectCodeEmitter &) { 431 return true; 432 } 433 434 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 435 /// on this target. User flag overrides. 436 virtual bool getEnableTailMergeDefault() const { return true; } 437 438 /// addAssemblyEmitter - Helper function which creates a target specific 439 /// assembly printer, if available. 440 /// 441 /// \return Returns 'false' on success. 442 bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level, 443 bool /* VerboseAsmDefault */, 444 formatted_raw_ostream &); 445}; 446 447} // End llvm namespace 448 449#endif 450