TargetMachine.h revision 98b5795f6227fd31e6cd2852adf5a641ea1ce3be
1//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the TargetMachine and LLVMTargetMachine classes.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGET_TARGETMACHINE_H
15#define LLVM_TARGET_TARGETMACHINE_H
16
17#include "llvm/Target/TargetInstrItineraries.h"
18#include <cassert>
19#include <string>
20
21namespace llvm {
22
23class TargetAsmInfo;
24class TargetData;
25class TargetSubtarget;
26class TargetInstrInfo;
27class TargetInstrDescriptor;
28class TargetJITInfo;
29class TargetLowering;
30class TargetFrameInfo;
31class MachineCodeEmitter;
32class MRegisterInfo;
33class Module;
34class FunctionPassManager;
35class PassManager;
36class Pass;
37class TargetMachOWriterInfo;
38class TargetELFWriterInfo;
39
40// Relocation model types.
41namespace Reloc {
42  enum Model {
43    Default,
44    Static,
45    PIC_,         // Cannot be named PIC due to collision with -DPIC
46    DynamicNoPIC
47  };
48}
49
50// Code model types.
51namespace CodeModel {
52  enum Model {
53    Default,
54    Small,
55    Kernel,
56    Medium,
57    Large
58  };
59}
60
61//===----------------------------------------------------------------------===//
62///
63/// TargetMachine - Primary interface to the complete machine description for
64/// the target machine.  All target-specific information should be accessible
65/// through this interface.
66///
67class TargetMachine {
68  TargetMachine(const TargetMachine &);   // DO NOT IMPLEMENT
69  void operator=(const TargetMachine &);  // DO NOT IMPLEMENT
70protected: // Can only create subclasses.
71  TargetMachine() : AsmInfo(NULL) { }
72
73  /// getSubtargetImpl - virtual method implemented by subclasses that returns
74  /// a reference to that target's TargetSubtarget-derived member variable.
75  virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
76
77  /// AsmInfo - Contains target specific asm information.
78  ///
79  mutable const TargetAsmInfo *AsmInfo;
80
81  /// createTargetAsmInfo - Create a new instance of target specific asm
82  /// information.
83  virtual const TargetAsmInfo *createTargetAsmInfo() const { return NULL; }
84
85public:
86  virtual ~TargetMachine();
87
88  /// getModuleMatchQuality - This static method should be implemented by
89  /// targets to indicate how closely they match the specified module.  This is
90  /// used by the LLC tool to determine which target to use when an explicit
91  /// -march option is not specified.  If a target returns zero, it will never
92  /// be chosen without an explicit -march option.
93  static unsigned getModuleMatchQuality(const Module &M) { return 0; }
94
95  /// getJITMatchQuality - This static method should be implemented by targets
96  /// that provide JIT capabilities to indicate how suitable they are for
97  /// execution on the current host.  If a value of 0 is returned, the target
98  /// will not be used unless an explicit -march option is used.
99  static unsigned getJITMatchQuality() { return 0; }
100
101  // Interfaces to the major aspects of target machine information:
102  // -- Instruction opcode and operand information
103  // -- Pipelines and scheduling information
104  // -- Stack frame information
105  // -- Selection DAG lowering information
106  //
107  virtual const TargetInstrInfo        *getInstrInfo() const { return 0; }
108  virtual const TargetFrameInfo        *getFrameInfo() const { return 0; }
109  virtual       TargetLowering    *getTargetLowering() const { return 0; }
110  virtual const TargetData            *getTargetData() const { return 0; }
111
112
113  /// getTargetAsmInfo - Return target specific asm information.
114  ///
115  const TargetAsmInfo *getTargetAsmInfo() const {
116    if (!AsmInfo) AsmInfo = createTargetAsmInfo();
117    return AsmInfo;
118  }
119
120  /// getSubtarget - This method returns a pointer to the specified type of
121  /// TargetSubtarget.  In debug builds, it verifies that the object being
122  /// returned is of the correct type.
123  template<typename STC> const STC &getSubtarget() const {
124    const TargetSubtarget *TST = getSubtargetImpl();
125    assert(TST && dynamic_cast<const STC*>(TST) &&
126           "Not the right kind of subtarget!");
127    return *static_cast<const STC*>(TST);
128  }
129
130  /// getRegisterInfo - If register information is available, return it.  If
131  /// not, return null.  This is kept separate from RegInfo until RegInfo has
132  /// details of graph coloring register allocation removed from it.
133  ///
134  virtual const MRegisterInfo *getRegisterInfo() const { return 0; }
135
136  /// getJITInfo - If this target supports a JIT, return information for it,
137  /// otherwise return null.
138  ///
139  virtual TargetJITInfo *getJITInfo() { return 0; }
140
141  /// getInstrItineraryData - Returns instruction itinerary data for the target
142  /// or specific subtarget.
143  ///
144  virtual const InstrItineraryData getInstrItineraryData() const {
145    return InstrItineraryData();
146  }
147
148  /// getMachOWriterInfo - If this target supports a Mach-O writer, return
149  /// information for it, otherwise return null.
150  ///
151  virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
152
153  /// getELFWriterInfo - If this target supports an ELF writer, return
154  /// information for it, otherwise return null.
155  ///
156  virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
157
158  /// getRelocationModel - Returns the code generation relocation model. The
159  /// choices are static, PIC, and dynamic-no-pic, and target default.
160  static Reloc::Model getRelocationModel();
161
162  /// setRelocationModel - Sets the code generation relocation model.
163  static void setRelocationModel(Reloc::Model Model);
164
165  /// getCodeModel - Returns the code model. The choices are small, kernel,
166  /// medium, large, and target default.
167  static CodeModel::Model getCodeModel();
168
169  /// setCodeModel - Sets the code model.
170  static void setCodeModel(CodeModel::Model Model);
171
172  /// CodeGenFileType - These enums are meant to be passed into
173  /// addPassesToEmitFile to indicate what type of file to emit.
174  enum CodeGenFileType {
175    AssemblyFile, ObjectFile, DynamicLibrary
176  };
177
178  /// addPassesToEmitFile - Add passes to the specified pass manager to get
179  /// the specified file emitted.  Typically this will involve several steps of
180  /// code generation.  If Fast is set to true, the code generator should emit
181  /// code as fast as possible, without regard for compile time.  This method
182  /// should return true if emission of this file type is not supported.
183  ///
184  virtual bool addPassesToEmitFile(FunctionPassManager &PM, std::ostream &Out,
185                                   CodeGenFileType FileType, bool Fast) {
186    return true;
187  }
188
189  /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
190  /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
191  /// actually outputting the machine code and resolving things like the address
192  /// of functions.  This method returns true if machine code emission is
193  /// not supported.
194  ///
195  virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
196                                          MachineCodeEmitter &MCE, bool Fast) {
197    return true;
198  }
199
200
201  /// addPassesToEmitWholeFile - This method can be implemented by targets that
202  /// require having the entire module at once.  This is not recommended, do not
203  /// use this.
204  virtual bool WantsWholeFile() const { return false; }
205  virtual bool addPassesToEmitWholeFile(PassManager &PM, std::ostream &Out,
206                                        CodeGenFileType FileType, bool Fast) {
207    return true;
208  }
209};
210
211/// LLVMTargetMachine - This class describes a target machine that is
212/// implemented with the LLVM target-independent code generator.
213///
214class LLVMTargetMachine : public TargetMachine {
215protected: // Can only create subclasses.
216    LLVMTargetMachine() { }
217public:
218
219  /// addPassesToEmitFile - Add passes to the specified pass manager to get
220  /// the specified file emitted.  Typically this will involve several steps of
221  /// code generation.  If Fast is set to true, the code generator should emit
222  /// code as fast as possible, without regard for compile time.  This method
223  /// should return true if emission of this file type is not supported.
224  ///
225  /// The default implementation of this method adds components from the
226  /// LLVM retargetable code generator, invoking the methods below to get
227  /// target-specific passes in standard locations.
228  ///
229  virtual bool addPassesToEmitFile(FunctionPassManager &PM, std::ostream &Out,
230                                   CodeGenFileType FileType, bool Fast);
231
232  /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
233  /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
234  /// actually outputting the machine code and resolving things like the address
235  /// of functions.  This method returns true if machine code emission is
236  /// not supported.
237  ///
238  virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
239                                          MachineCodeEmitter &MCE, bool Fast);
240
241  /// Target-Independent Code Generator Pass Configuration Options.
242
243  /// addInstSelector - This method should add any "last minute" LLVM->LLVM
244  /// passes, then install an instruction selector pass, which converts from
245  /// LLVM code to machine instructions.
246  virtual bool addInstSelector(FunctionPassManager &PM, bool Fast) {
247    return true;
248  }
249
250  /// addPostRegAllocPasses - This method may be implemented by targets that
251  /// want to run passes after register allocation but before prolog-epilog
252  /// insertion.  This should return true if -print-machineinstrs should print
253  /// after these passes.
254  virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
255    return false;
256  }
257
258  /// addPreEmitPass - This pass may be implemented by targets that want to run
259  /// passes immediately before machine code is emitted.  This should return
260  /// true if -print-machineinstrs should print out the code after the passes.
261  virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast) {
262    return false;
263  }
264
265
266  /// addAssemblyEmitter - This pass should be overridden by the target to add
267  /// the asmprinter, if asm emission is supported.  If this is not supported,
268  /// 'true' should be returned.
269  virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
270                                  std::ostream &Out) {
271    return true;
272  }
273
274  /// addObjectWriter - This pass should be overridden by the target to add
275  /// the object-file writer, if supported.  If this is not supported,
276  /// 'true' should be returned.
277  virtual bool addObjectWriter(FunctionPassManager &PM, bool Fast,
278                               std::ostream &Out) {
279    return true;
280  }
281
282  /// addCodeEmitter - This pass should be overridden by the target to add a
283  /// code emitter, if supported.  If this is not supported, 'true' should be
284  /// returned.
285  virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
286                              MachineCodeEmitter &MCE) {
287    return true;
288  }
289};
290
291} // End llvm namespace
292
293#endif
294