TargetMachine.h revision d24479730a8790d82c4859dc477bc2416d7a6bda
1//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the TargetMachine and LLVMTargetMachine classes. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_TARGET_TARGETMACHINE_H 15#define LLVM_TARGET_TARGETMACHINE_H 16 17#include "llvm/Target/TargetInstrItineraries.h" 18#include <cassert> 19 20namespace llvm { 21 22class TargetAsmInfo; 23class TargetData; 24class TargetSubtarget; 25class TargetInstrInfo; 26class TargetIntrinsicInfo; 27class TargetJITInfo; 28class TargetLowering; 29class TargetFrameInfo; 30class MachineCodeEmitter; 31class TargetRegisterInfo; 32class Module; 33class PassManagerBase; 34class PassManager; 35class Pass; 36class TargetMachOWriterInfo; 37class TargetELFWriterInfo; 38class raw_ostream; 39 40// Relocation model types. 41namespace Reloc { 42 enum Model { 43 Default, 44 Static, 45 PIC_, // Cannot be named PIC due to collision with -DPIC 46 DynamicNoPIC 47 }; 48} 49 50// Code model types. 51namespace CodeModel { 52 enum Model { 53 Default, 54 Small, 55 Kernel, 56 Medium, 57 Large 58 }; 59} 60 61namespace FileModel { 62 enum Model { 63 Error, 64 None, 65 AsmFile, 66 MachOFile, 67 ElfFile 68 }; 69} 70 71//===----------------------------------------------------------------------===// 72/// 73/// TargetMachine - Primary interface to the complete machine description for 74/// the target machine. All target-specific information should be accessible 75/// through this interface. 76/// 77class TargetMachine { 78 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT 79 void operator=(const TargetMachine &); // DO NOT IMPLEMENT 80protected: // Can only create subclasses. 81 TargetMachine() : AsmInfo(0) { } 82 83 /// getSubtargetImpl - virtual method implemented by subclasses that returns 84 /// a reference to that target's TargetSubtarget-derived member variable. 85 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; } 86 87 /// AsmInfo - Contains target specific asm information. 88 /// 89 mutable const TargetAsmInfo *AsmInfo; 90 91 /// createTargetAsmInfo - Create a new instance of target specific asm 92 /// information. 93 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; } 94 95public: 96 virtual ~TargetMachine(); 97 98 /// getModuleMatchQuality - This static method should be implemented by 99 /// targets to indicate how closely they match the specified module. This is 100 /// used by the LLC tool to determine which target to use when an explicit 101 /// -march option is not specified. If a target returns zero, it will never 102 /// be chosen without an explicit -march option. 103 static unsigned getModuleMatchQuality(const Module &) { return 0; } 104 105 /// getJITMatchQuality - This static method should be implemented by targets 106 /// that provide JIT capabilities to indicate how suitable they are for 107 /// execution on the current host. If a value of 0 is returned, the target 108 /// will not be used unless an explicit -march option is used. 109 static unsigned getJITMatchQuality() { return 0; } 110 111 // Interfaces to the major aspects of target machine information: 112 // -- Instruction opcode and operand information 113 // -- Pipelines and scheduling information 114 // -- Stack frame information 115 // -- Selection DAG lowering information 116 // 117 virtual const TargetInstrInfo *getInstrInfo() const { return 0; } 118 virtual const TargetFrameInfo *getFrameInfo() const { return 0; } 119 virtual TargetLowering *getTargetLowering() const { return 0; } 120 virtual const TargetData *getTargetData() const { return 0; } 121 122 /// getTargetAsmInfo - Return target specific asm information. 123 /// 124 const TargetAsmInfo *getTargetAsmInfo() const { 125 if (!AsmInfo) AsmInfo = createTargetAsmInfo(); 126 return AsmInfo; 127 } 128 129 /// getSubtarget - This method returns a pointer to the specified type of 130 /// TargetSubtarget. In debug builds, it verifies that the object being 131 /// returned is of the correct type. 132 template<typename STC> const STC &getSubtarget() const { 133 const TargetSubtarget *TST = getSubtargetImpl(); 134 assert(TST && dynamic_cast<const STC*>(TST) && 135 "Not the right kind of subtarget!"); 136 return *static_cast<const STC*>(TST); 137 } 138 139 /// getRegisterInfo - If register information is available, return it. If 140 /// not, return null. This is kept separate from RegInfo until RegInfo has 141 /// details of graph coloring register allocation removed from it. 142 /// 143 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; } 144 145 /// getIntrinsicInfo - If intrinsic information is available, return it. If 146 /// not, return null. 147 /// 148 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; } 149 150 /// getJITInfo - If this target supports a JIT, return information for it, 151 /// otherwise return null. 152 /// 153 virtual TargetJITInfo *getJITInfo() { return 0; } 154 155 /// getInstrItineraryData - Returns instruction itinerary data for the target 156 /// or specific subtarget. 157 /// 158 virtual const InstrItineraryData getInstrItineraryData() const { 159 return InstrItineraryData(); 160 } 161 162 /// getMachOWriterInfo - If this target supports a Mach-O writer, return 163 /// information for it, otherwise return null. 164 /// 165 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; } 166 167 /// getELFWriterInfo - If this target supports an ELF writer, return 168 /// information for it, otherwise return null. 169 /// 170 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; } 171 172 /// getRelocationModel - Returns the code generation relocation model. The 173 /// choices are static, PIC, and dynamic-no-pic, and target default. 174 static Reloc::Model getRelocationModel(); 175 176 /// setRelocationModel - Sets the code generation relocation model. 177 static void setRelocationModel(Reloc::Model Model); 178 179 /// getCodeModel - Returns the code model. The choices are small, kernel, 180 /// medium, large, and target default. 181 static CodeModel::Model getCodeModel(); 182 183 /// setCodeModel - Sets the code model. 184 static void setCodeModel(CodeModel::Model Model); 185 186 /// CodeGenFileType - These enums are meant to be passed into 187 /// addPassesToEmitFile to indicate what type of file to emit. 188 enum CodeGenFileType { 189 AssemblyFile, ObjectFile, DynamicLibrary 190 }; 191 192 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 193 /// on this target. User flag overrides. 194 virtual bool getEnableTailMergeDefault() const { return true; } 195 196 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 197 /// specified file emitted. Typically this will involve several steps of code 198 /// generation. If Fast is set to true, the code generator should emit code 199 /// as fast as possible, though the generated code may be less efficient. 200 /// This method should return FileModel::Error if emission of this file type 201 /// is not supported. 202 /// 203 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &, 204 raw_ostream &, 205 CodeGenFileType, 206 bool /*Fast*/) { 207 return FileModel::None; 208 } 209 210 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 211 /// to be split up (e.g., to add an object writer pass), this method can be 212 /// used to finish up adding passes to emit the file, if necessary. 213 /// 214 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 215 MachineCodeEmitter *, bool /*Fast*/) { 216 return true; 217 } 218 219 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 220 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 221 /// actually outputting the machine code and resolving things like the address 222 /// of functions. This method returns true if machine code emission is 223 /// not supported. 224 /// 225 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 226 MachineCodeEmitter &, 227 bool /*Fast*/) { 228 return true; 229 } 230 231 /// addPassesToEmitWholeFile - This method can be implemented by targets that 232 /// require having the entire module at once. This is not recommended, do not 233 /// use this. 234 virtual bool WantsWholeFile() const { return false; } 235 virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &, 236 CodeGenFileType, bool /*Fast*/) { 237 return true; 238 } 239}; 240 241/// LLVMTargetMachine - This class describes a target machine that is 242/// implemented with the LLVM target-independent code generator. 243/// 244class LLVMTargetMachine : public TargetMachine { 245protected: // Can only create subclasses. 246 LLVMTargetMachine() { } 247 248 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for 249 /// both emitting to assembly files or machine code output. 250 /// 251 bool addCommonCodeGenPasses(PassManagerBase &, bool /*Fast*/); 252 253public: 254 255 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 256 /// specified file emitted. Typically this will involve several steps of code 257 /// generation. If Fast is set to true, the code generator should emit code 258 /// as fast as possible, though the generated code may be less efficient. 259 /// This method should return FileModel::Error if emission of this file type 260 /// is not supported. 261 /// 262 /// The default implementation of this method adds components from the 263 /// LLVM retargetable code generator, invoking the methods below to get 264 /// target-specific passes in standard locations. 265 /// 266 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM, 267 raw_ostream &Out, 268 CodeGenFileType FileType, 269 bool Fast); 270 271 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 272 /// to be split up (e.g., to add an object writer pass), this method can be 273 /// used to finish up adding passes to emit the file, if necessary. 274 /// 275 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 276 MachineCodeEmitter *MCE, bool Fast); 277 278 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 279 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 280 /// actually outputting the machine code and resolving things like the address 281 /// of functions. This method returns true if machine code emission is 282 /// not supported. 283 /// 284 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, 285 MachineCodeEmitter &MCE, bool Fast); 286 287 /// Target-Independent Code Generator Pass Configuration Options. 288 289 /// addInstSelector - This method should add any "last minute" LLVM->LLVM 290 /// passes, then install an instruction selector pass, which converts from 291 /// LLVM code to machine instructions. 292 virtual bool addInstSelector(PassManagerBase &, bool /*Fast*/) { 293 return true; 294 } 295 296 /// addPreRegAllocPasses - This method may be implemented by targets that want 297 /// to run passes immediately before register allocation. This should return 298 /// true if -print-machineinstrs should print after these passes. 299 virtual bool addPreRegAlloc(PassManagerBase &, bool /*Fast*/) { 300 return false; 301 } 302 303 /// addPostRegAllocPasses - This method may be implemented by targets that 304 /// want to run passes after register allocation but before prolog-epilog 305 /// insertion. This should return true if -print-machineinstrs should print 306 /// after these passes. 307 virtual bool addPostRegAlloc(PassManagerBase &, bool /*Fast*/) { 308 return false; 309 } 310 311 /// addPreEmitPass - This pass may be implemented by targets that want to run 312 /// passes immediately before machine code is emitted. This should return 313 /// true if -print-machineinstrs should print out the code after the passes. 314 virtual bool addPreEmitPass(PassManagerBase &, bool /*Fast*/) { 315 return false; 316 } 317 318 319 /// addAssemblyEmitter - This pass should be overridden by the target to add 320 /// the asmprinter, if asm emission is supported. If this is not supported, 321 /// 'true' should be returned. 322 virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/, 323 raw_ostream &) { 324 return true; 325 } 326 327 /// addCodeEmitter - This pass should be overridden by the target to add a 328 /// code emitter, if supported. If this is not supported, 'true' should be 329 /// returned. If DumpAsm is true, the generated assembly is printed to cerr. 330 virtual bool addCodeEmitter(PassManagerBase &, bool /*Fast*/, 331 bool /*DumpAsm*/, MachineCodeEmitter &) { 332 return true; 333 } 334 335 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 336 /// a code emitter (without setting flags), if supported. If this is not 337 /// supported, 'true' should be returned. If DumpAsm is true, the generated 338 /// assembly is printed to cerr. 339 virtual bool addSimpleCodeEmitter(PassManagerBase &, bool /*Fast*/, 340 bool /*DumpAsm*/, MachineCodeEmitter &) { 341 return true; 342 } 343 344 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 345 /// on this target. User flag overrides. 346 virtual bool getEnableTailMergeDefault() const { return true; } 347}; 348 349} // End llvm namespace 350 351#endif 352