TargetMachine.h revision ebb1af16bea8f163cbb74c55ae41885c396f72cb 
1//===-- llvm/Target/Machine.h - General Target Information -------*- C++ -*-==//
2//
3// This file describes the general parts of a Target machine.
4//
5//===----------------------------------------------------------------------===//
6
7#ifndef LLVM_TARGET_TARGETMACHINE_H
8#define LLVM_TARGET_TARGETMACHINE_H
9
10#include "llvm/Target/TargetData.h"
11#include "Support/NonCopyable.h"
12
13class MachineInstrInfo;
14class MachineInstrDescriptor;
15class MachineSchedInfo;
16class MachineRegInfo;
17class MachineFrameInfo;
18class MachineCacheInfo;
19class MachineOptInfo;
20class PassManager;
21class Pass;
22
23//---------------------------------------------------------------------------
24// class TargetMachine
25//
26// Purpose:
27//   Primary interface to the complete machine description for the
28//   target machine.  All target-specific information should be
29//   accessible through this interface.
30//
31//---------------------------------------------------------------------------
32
33class TargetMachine : public NonCopyableV {
34public:
35  const std::string TargetName;
36  const TargetData DataLayout;		// Calculates type size & alignment
37  int              optSizeForSubWordData;
38  int	           minMemOpWordSize;
39  int	           maxAtomicMemOpWordSize;
40
41protected:
42  TargetMachine(const std::string &targetname, // Can only create subclasses...
43                unsigned char IntRegSize = 8,
44		unsigned char PtrSize = 8, unsigned char PtrAl = 8,
45		unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
46		unsigned char LongAl = 8, unsigned char IntAl = 4,
47		unsigned char ShortAl = 2, unsigned char ByteAl = 1)
48    : TargetName(targetname), DataLayout(targetname, IntRegSize,
49                                         PtrSize, PtrAl,
50					 DoubleAl, FloatAl, LongAl, IntAl,
51					 ShortAl, ByteAl) { }
52public:
53  virtual ~TargetMachine() {}
54
55  //
56  // Interfaces to the major aspects of target machine information:
57  // -- Instruction opcode and operand information
58  // -- Pipelines and scheduling information
59  // -- Register information
60  // -- Stack frame information
61  // -- Cache hierarchy information
62  // -- Machine-level optimization information (peephole only)
63  //
64  virtual const MachineInstrInfo&       getInstrInfo() const = 0;
65  virtual const MachineSchedInfo&       getSchedInfo() const = 0;
66  virtual const MachineRegInfo&	        getRegInfo()   const = 0;
67  virtual const MachineFrameInfo&       getFrameInfo() const = 0;
68  virtual const MachineCacheInfo&       getCacheInfo() const = 0;
69  virtual const MachineOptInfo&         getOptInfo()   const = 0;
70
71  // Data storage information
72  //
73  virtual unsigned int	findOptimalStorageSize	(const Type* ty) const;
74
75  /// addPassesToEmitAssembly - Add passes to the specified pass manager to get
76  /// assembly langage code emited.  Typically this will involve several steps
77  /// of code generation.
78  ///
79  virtual void addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) = 0;
80
81  /// getPrologEpilogCodeInserter - Create pass to insert prolog/epilog code.
82  ///
83  virtual Pass* getPrologEpilogInsertionPass() = 0;
84
85  /// getFunctionAsmPrinterPass - Create a pass to write out the generated
86  /// machine code for a single function to the generated assembly file.
87  ///
88  virtual Pass* getFunctionAsmPrinterPass(std::ostream &Out) = 0;
89
90  /// getModuleAsmPrinterPass - Create a pass to write out module-level
91  /// information to the generated assembly file.
92  ///
93  virtual Pass* getModuleAsmPrinterPass(std::ostream &Out) = 0;
94
95  /// getEmitBytecodeToAsmPass - Create a pass to emit the final LLVM bytecode
96  /// to the generated assembly file.
97  ///
98  virtual Pass* getEmitBytecodeToAsmPass(std::ostream &Out) = 0;
99};
100
101#endif
102