AArch64RegisterInfo.h revision 72062f5744557e270a38192554c3126ea5f97434
1//==- AArch64RegisterInfo.h - AArch64 Register Information Impl -*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the AArch64 implementation of the MRegisterInfo class. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_TARGET_AARCH64REGISTERINFO_H 15#define LLVM_TARGET_AARCH64REGISTERINFO_H 16 17#include "llvm/Target/TargetRegisterInfo.h" 18 19#define GET_REGINFO_HEADER 20#include "AArch64GenRegisterInfo.inc" 21 22namespace llvm { 23 24class AArch64InstrInfo; 25class AArch64Subtarget; 26 27struct AArch64RegisterInfo : public AArch64GenRegisterInfo { 28private: 29 const AArch64InstrInfo &TII; 30 31public: 32 AArch64RegisterInfo(const AArch64InstrInfo &tii, 33 const AArch64Subtarget &sti); 34 35 const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const; 36 const uint32_t *getCallPreservedMask(CallingConv::ID) const; 37 38 const uint32_t *getTLSDescCallPreservedMask() const; 39 40 BitVector getReservedRegs(const MachineFunction &MF) const; 41 unsigned getFrameRegister(const MachineFunction &MF) const; 42 43 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, 44 RegScavenger *Rs = NULL) const; 45 46 void eliminateCallFramePseudoInstr(MachineFunction &MF, 47 MachineBasicBlock &MBB, 48 MachineBasicBlock::iterator MI) const; 49 50 /// getCrossCopyRegClass - Returns a legal register class to copy a register 51 /// in the specified class to or from. Returns original class if it is 52 /// possible to copy between a two registers of the specified class. 53 const TargetRegisterClass * 54 getCrossCopyRegClass(const TargetRegisterClass *RC) const; 55 56 /// getLargestLegalSuperClass - Returns the largest super class of RC that is 57 /// legal to use in the current sub-target and has the same spill size. 58 const TargetRegisterClass* 59 getLargestLegalSuperClass(const TargetRegisterClass *RC) const { 60 if (RC == &AArch64::tcGPR64RegClass) 61 return &AArch64::GPR64RegClass; 62 63 return RC; 64 } 65 66 bool requiresRegisterScavenging(const MachineFunction &MF) const { 67 return true; 68 } 69 70 bool requiresFrameIndexScavenging(const MachineFunction &MF) const { 71 return true; 72 } 73 74 bool useFPForScavengingIndex(const MachineFunction &MF) const; 75}; 76 77} // end namespace llvm 78 79#endif // LLVM_TARGET_AARCH64REGISTERINFO_H 80