X86AsmPrinter.cpp revision 055acae18c4ba5f149237927f88a842cd77285cf
1//===-- X86AsmPrinter.cpp - Convert X86 LLVM code to Intel assembly -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains a printer that converts from our internal representation 11// of machine-dependent LLVM code to Intel-format assembly language. This 12// printer is the output mechanism used by `llc' and `lli -print-machineinstrs' 13// on X86. 14// 15//===----------------------------------------------------------------------===// 16 17#include "X86.h" 18#include "X86InstrInfo.h" 19#include "X86TargetMachine.h" 20#include "llvm/Constants.h" 21#include "llvm/DerivedTypes.h" 22#include "llvm/Module.h" 23#include "llvm/Assembly/Writer.h" 24#include "llvm/CodeGen/AsmPrinter.h" 25#include "llvm/CodeGen/MachineCodeEmitter.h" 26#include "llvm/CodeGen/MachineConstantPool.h" 27#include "llvm/CodeGen/MachineFunctionPass.h" 28#include "llvm/CodeGen/MachineInstr.h" 29#include "llvm/CodeGen/ValueTypes.h" 30#include "llvm/Target/TargetMachine.h" 31#include "llvm/Support/Mangler.h" 32#include "Support/Statistic.h" 33#include "Support/StringExtras.h" 34#include "Support/CommandLine.h" 35using namespace llvm; 36 37namespace { 38 Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed"); 39 40 struct GasBugWorkaroundEmitter : public MachineCodeEmitter { 41 GasBugWorkaroundEmitter(std::ostream& o) 42 : O(o), OldFlags(O.flags()), firstByte(true) { 43 O << std::hex; 44 } 45 46 ~GasBugWorkaroundEmitter() { 47 O.flags(OldFlags); 48 } 49 50 virtual void emitByte(unsigned char B) { 51 if (!firstByte) O << "\n\t"; 52 firstByte = false; 53 O << ".byte 0x" << (unsigned) B; 54 } 55 56 // These should never be called 57 virtual void emitWord(unsigned W) { assert(0); } 58 virtual uint64_t getGlobalValueAddress(GlobalValue *V) { abort(); } 59 virtual uint64_t getGlobalValueAddress(const std::string &Name) { abort(); } 60 virtual uint64_t getConstantPoolEntryAddress(unsigned Index) { abort(); } 61 virtual uint64_t getCurrentPCValue() { abort(); } 62 virtual uint64_t forceCompilationOf(Function *F) { abort(); } 63 64 private: 65 std::ostream& O; 66 std::ios::fmtflags OldFlags; 67 bool firstByte; 68 }; 69 70 struct X86AsmPrinter : public AsmPrinter { 71 X86AsmPrinter(std::ostream &O, TargetMachine &TM) : AsmPrinter(O, TM) { } 72 73 virtual const char *getPassName() const { 74 return "X86 Assembly Printer"; 75 } 76 77 /// printInstruction - This method is automatically generated by tablegen 78 /// from the instruction set description. This method returns true if the 79 /// machine instruction was sufficiently described to print it, otherwise it 80 /// returns false. 81 bool printInstruction(const MachineInstr *MI); 82 83 // This method is used by the tablegen'erated instruction printer. 84 void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){ 85 const MachineOperand &MO = MI->getOperand(OpNo); 86 if (MO.getType() == MachineOperand::MO_MachineRegister) { 87 assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??"); 88 // Bug Workaround: See note in Printer::doInitialization about %. 89 O << "%" << TM.getRegisterInfo()->get(MO.getReg()).Name; 90 } else { 91 printOp(MO); 92 } 93 } 94 95 void printCallOperand(const MachineInstr *MI, unsigned OpNo, 96 MVT::ValueType VT) { 97 printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET". 98 } 99 100 void printMemoryOperand(const MachineInstr *MI, unsigned OpNo, 101 MVT::ValueType VT) { 102 switch (VT) { 103 default: assert(0 && "Unknown arg size!"); 104 case MVT::i8: O << "BYTE PTR "; break; 105 case MVT::i16: O << "WORD PTR "; break; 106 case MVT::i32: 107 case MVT::f32: O << "DWORD PTR "; break; 108 case MVT::i64: 109 case MVT::f64: O << "QWORD PTR "; break; 110 case MVT::f80: O << "XWORD PTR "; break; 111 } 112 printMemReference(MI, OpNo); 113 } 114 115 void printMachineInstruction(const MachineInstr *MI); 116 void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false); 117 void printMemReference(const MachineInstr *MI, unsigned Op); 118 void printConstantPool(MachineConstantPool *MCP); 119 bool runOnMachineFunction(MachineFunction &F); 120 bool doInitialization(Module &M); 121 bool doFinalization(Module &M); 122 void emitGlobalConstant(const Constant* CV); 123 }; 124} // end of anonymous namespace 125 126/// createX86CodePrinterPass - Returns a pass that prints the X86 127/// assembly code for a MachineFunction to the given output stream, 128/// using the given target machine description. This should work 129/// regardless of whether the function is in SSA form. 130/// 131FunctionPass *llvm::createX86CodePrinterPass(std::ostream &o,TargetMachine &tm){ 132 return new X86AsmPrinter(o, tm); 133} 134 135 136// Include the auto-generated portion of the assembly writer. 137#include "X86GenAsmWriter.inc" 138 139 140/// toOctal - Convert the low order bits of X into an octal digit. 141/// 142static inline char toOctal(int X) { 143 return (X&7)+'0'; 144} 145 146/// getAsCString - Return the specified array as a C compatible 147/// string, only if the predicate isStringCompatible is true. 148/// 149static void printAsCString(std::ostream &O, const ConstantArray *CVA) { 150 assert(CVA->isString() && "Array is not string compatible!"); 151 152 O << "\""; 153 for (unsigned i = 0; i != CVA->getNumOperands(); ++i) { 154 unsigned char C = cast<ConstantInt>(CVA->getOperand(i))->getRawValue(); 155 156 if (C == '"') { 157 O << "\\\""; 158 } else if (C == '\\') { 159 O << "\\\\"; 160 } else if (isprint(C)) { 161 O << C; 162 } else { 163 switch(C) { 164 case '\b': O << "\\b"; break; 165 case '\f': O << "\\f"; break; 166 case '\n': O << "\\n"; break; 167 case '\r': O << "\\r"; break; 168 case '\t': O << "\\t"; break; 169 default: 170 O << '\\'; 171 O << toOctal(C >> 6); 172 O << toOctal(C >> 3); 173 O << toOctal(C >> 0); 174 break; 175 } 176 } 177 } 178 O << "\""; 179} 180 181// Print a constant value or values, with the appropriate storage class as a 182// prefix. 183void X86AsmPrinter::emitGlobalConstant(const Constant *CV) { 184 const TargetData &TD = TM.getTargetData(); 185 186 if (CV->isNullValue()) { 187 O << "\t.zero\t " << TD.getTypeSize(CV->getType()) << "\n"; 188 return; 189 } else if (const ConstantArray *CVA = dyn_cast<ConstantArray>(CV)) { 190 if (CVA->isString()) { 191 O << "\t.ascii\t"; 192 printAsCString(O, CVA); 193 O << "\n"; 194 } else { // Not a string. Print the values in successive locations 195 for (unsigned i = 0, e = CVA->getNumOperands(); i != e; ++i) 196 emitGlobalConstant(CVA->getOperand(i)); 197 } 198 return; 199 } else if (const ConstantStruct *CVS = dyn_cast<ConstantStruct>(CV)) { 200 // Print the fields in successive locations. Pad to align if needed! 201 const StructLayout *cvsLayout = TD.getStructLayout(CVS->getType()); 202 unsigned sizeSoFar = 0; 203 for (unsigned i = 0, e = CVS->getNumOperands(); i != e; ++i) { 204 const Constant* field = CVS->getOperand(i); 205 206 // Check if padding is needed and insert one or more 0s. 207 unsigned fieldSize = TD.getTypeSize(field->getType()); 208 unsigned padSize = ((i == e-1? cvsLayout->StructSize 209 : cvsLayout->MemberOffsets[i+1]) 210 - cvsLayout->MemberOffsets[i]) - fieldSize; 211 sizeSoFar += fieldSize + padSize; 212 213 // Now print the actual field value 214 emitGlobalConstant(field); 215 216 // Insert the field padding unless it's zero bytes... 217 if (padSize) 218 O << "\t.zero\t " << padSize << "\n"; 219 } 220 assert(sizeSoFar == cvsLayout->StructSize && 221 "Layout of constant struct may be incorrect!"); 222 return; 223 } else if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CV)) { 224 // FP Constants are printed as integer constants to avoid losing 225 // precision... 226 double Val = CFP->getValue(); 227 switch (CFP->getType()->getTypeID()) { 228 default: assert(0 && "Unknown floating point type!"); 229 case Type::FloatTyID: { 230 union FU { // Abide by C TBAA rules 231 float FVal; 232 unsigned UVal; 233 } U; 234 U.FVal = Val; 235 O << ".long\t" << U.UVal << "\t# float " << Val << "\n"; 236 return; 237 } 238 case Type::DoubleTyID: { 239 union DU { // Abide by C TBAA rules 240 double FVal; 241 uint64_t UVal; 242 } U; 243 U.FVal = Val; 244 O << ".quad\t" << U.UVal << "\t# double " << Val << "\n"; 245 return; 246 } 247 } 248 } 249 250 const Type *type = CV->getType(); 251 O << "\t"; 252 switch (type->getTypeID()) { 253 case Type::BoolTyID: case Type::UByteTyID: case Type::SByteTyID: 254 O << ".byte"; 255 break; 256 case Type::UShortTyID: case Type::ShortTyID: 257 O << ".word"; 258 break; 259 case Type::FloatTyID: case Type::PointerTyID: 260 case Type::UIntTyID: case Type::IntTyID: 261 O << ".long"; 262 break; 263 case Type::DoubleTyID: 264 case Type::ULongTyID: case Type::LongTyID: 265 O << ".quad"; 266 break; 267 default: 268 assert (0 && "Can't handle printing this type of thing"); 269 break; 270 } 271 O << "\t"; 272 emitConstantValueOnly(CV); 273 O << "\n"; 274} 275 276/// printConstantPool - Print to the current output stream assembly 277/// representations of the constants in the constant pool MCP. This is 278/// used to print out constants which have been "spilled to memory" by 279/// the code generator. 280/// 281void X86AsmPrinter::printConstantPool(MachineConstantPool *MCP) { 282 const std::vector<Constant*> &CP = MCP->getConstants(); 283 const TargetData &TD = TM.getTargetData(); 284 285 if (CP.empty()) return; 286 287 for (unsigned i = 0, e = CP.size(); i != e; ++i) { 288 O << "\t.section .rodata\n"; 289 O << "\t.align " << (unsigned)TD.getTypeAlignment(CP[i]->getType()) 290 << "\n"; 291 O << ".CPI" << CurrentFnName << "_" << i << ":\t\t\t\t\t#" 292 << *CP[i] << "\n"; 293 emitGlobalConstant(CP[i]); 294 } 295} 296 297/// runOnMachineFunction - This uses the printMachineInstruction() 298/// method to print assembly for each instruction. 299/// 300bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) { 301 setupMachineFunction(MF); 302 O << "\n\n"; 303 304 // Print out constants referenced by the function 305 printConstantPool(MF.getConstantPool()); 306 307 // Print out labels for the function. 308 O << "\t.text\n"; 309 O << "\t.align 16\n"; 310 O << "\t.globl\t" << CurrentFnName << "\n"; 311 O << "\t.type\t" << CurrentFnName << ", @function\n"; 312 O << CurrentFnName << ":\n"; 313 314 // Print out code for the function. 315 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); 316 I != E; ++I) { 317 // Print a label for the basic block. 318 O << ".LBB" << CurrentFnName << "_" << I->getNumber() << ":\t# " 319 << I->getBasicBlock()->getName() << "\n"; 320 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); 321 II != E; ++II) { 322 // Print the assembly for the instruction. 323 O << "\t"; 324 printMachineInstruction(II); 325 } 326 } 327 328 // We didn't modify anything. 329 return false; 330} 331 332static bool isScale(const MachineOperand &MO) { 333 return MO.isImmediate() && 334 (MO.getImmedValue() == 1 || MO.getImmedValue() == 2 || 335 MO.getImmedValue() == 4 || MO.getImmedValue() == 8); 336} 337 338static bool isMem(const MachineInstr *MI, unsigned Op) { 339 if (MI->getOperand(Op).isFrameIndex()) return true; 340 if (MI->getOperand(Op).isConstantPoolIndex()) return true; 341 return Op+4 <= MI->getNumOperands() && 342 MI->getOperand(Op ).isRegister() && isScale(MI->getOperand(Op+1)) && 343 MI->getOperand(Op+2).isRegister() && MI->getOperand(Op+3).isImmediate(); 344} 345 346 347 348void X86AsmPrinter::printOp(const MachineOperand &MO, 349 bool elideOffsetKeyword /* = false */) { 350 const MRegisterInfo &RI = *TM.getRegisterInfo(); 351 switch (MO.getType()) { 352 case MachineOperand::MO_VirtualRegister: 353 if (Value *V = MO.getVRegValueOrNull()) { 354 O << "<" << V->getName() << ">"; 355 return; 356 } 357 // FALLTHROUGH 358 case MachineOperand::MO_MachineRegister: 359 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) 360 // Bug Workaround: See note in Printer::doInitialization about %. 361 O << "%" << RI.get(MO.getReg()).Name; 362 else 363 O << "%reg" << MO.getReg(); 364 return; 365 366 case MachineOperand::MO_SignExtendedImmed: 367 case MachineOperand::MO_UnextendedImmed: 368 O << (int)MO.getImmedValue(); 369 return; 370 case MachineOperand::MO_MachineBasicBlock: { 371 MachineBasicBlock *MBBOp = MO.getMachineBasicBlock(); 372 O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction()) 373 << "_" << MBBOp->getNumber () << "\t# " 374 << MBBOp->getBasicBlock ()->getName (); 375 return; 376 } 377 case MachineOperand::MO_PCRelativeDisp: 378 std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs"; 379 abort (); 380 return; 381 case MachineOperand::MO_GlobalAddress: 382 if (!elideOffsetKeyword) 383 O << "OFFSET "; 384 O << Mang->getValueName(MO.getGlobal()); 385 return; 386 case MachineOperand::MO_ExternalSymbol: 387 O << MO.getSymbolName(); 388 return; 389 default: 390 O << "<unknown operand type>"; return; 391 } 392} 393 394void X86AsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op) { 395 assert(isMem(MI, Op) && "Invalid memory reference!"); 396 397 if (MI->getOperand(Op).isFrameIndex()) { 398 O << "[frame slot #" << MI->getOperand(Op).getFrameIndex(); 399 if (MI->getOperand(Op+3).getImmedValue()) 400 O << " + " << MI->getOperand(Op+3).getImmedValue(); 401 O << "]"; 402 return; 403 } else if (MI->getOperand(Op).isConstantPoolIndex()) { 404 O << "[.CPI" << CurrentFnName << "_" 405 << MI->getOperand(Op).getConstantPoolIndex(); 406 if (MI->getOperand(Op+3).getImmedValue()) 407 O << " + " << MI->getOperand(Op+3).getImmedValue(); 408 O << "]"; 409 return; 410 } 411 412 const MachineOperand &BaseReg = MI->getOperand(Op); 413 int ScaleVal = MI->getOperand(Op+1).getImmedValue(); 414 const MachineOperand &IndexReg = MI->getOperand(Op+2); 415 int DispVal = MI->getOperand(Op+3).getImmedValue(); 416 417 O << "["; 418 bool NeedPlus = false; 419 if (BaseReg.getReg()) { 420 printOp(BaseReg); 421 NeedPlus = true; 422 } 423 424 if (IndexReg.getReg()) { 425 if (NeedPlus) O << " + "; 426 if (ScaleVal != 1) 427 O << ScaleVal << "*"; 428 printOp(IndexReg); 429 NeedPlus = true; 430 } 431 432 if (DispVal) { 433 if (NeedPlus) 434 if (DispVal > 0) 435 O << " + "; 436 else { 437 O << " - "; 438 DispVal = -DispVal; 439 } 440 O << DispVal; 441 } 442 O << "]"; 443} 444 445 446/// printMachineInstruction -- Print out a single X86 LLVM instruction 447/// MI in Intel syntax to the current output stream. 448/// 449void X86AsmPrinter::printMachineInstruction(const MachineInstr *MI) { 450 ++EmittedInsts; 451 452 // gas bugs: 453 // 454 // The 80-bit FP store-pop instruction "fstp XWORD PTR [...]" is misassembled 455 // by gas in intel_syntax mode as its 32-bit equivalent "fstp DWORD PTR 456 // [...]". Workaround: Output the raw opcode bytes instead of the instruction. 457 // 458 // The 80-bit FP load instruction "fld XWORD PTR [...]" is misassembled by gas 459 // in intel_syntax mode as its 32-bit equivalent "fld DWORD PTR 460 // [...]". Workaround: Output the raw opcode bytes instead of the instruction. 461 // 462 // gas intel_syntax mode treats "fild QWORD PTR [...]" as an invalid opcode, 463 // saying "64 bit operations are only supported in 64 bit modes." libopcodes 464 // disassembles it as "fild DWORD PTR [...]", which is wrong. Workaround: 465 // Output the raw opcode bytes instead of the instruction. 466 // 467 // gas intel_syntax mode treats "fistp QWORD PTR [...]" as an invalid opcode, 468 // saying "64 bit operations are only supported in 64 bit modes." libopcodes 469 // disassembles it as "fistpll DWORD PTR [...]", which is wrong. Workaround: 470 // Output the raw opcode bytes instead of the instruction. 471 switch (MI->getOpcode()) { 472 case X86::FSTP80m: 473 case X86::FLD80m: 474 case X86::FILD64m: 475 case X86::FISTP64m: 476 GasBugWorkaroundEmitter gwe(O); 477 X86::emitInstruction(gwe, (X86InstrInfo&)*TM.getInstrInfo(), *MI); 478 O << "\t# "; 479 } 480 481 // Call the autogenerated instruction printer routines. 482 bool Handled = printInstruction(MI); 483 if (!Handled) { 484 MI->dump(); 485 assert(0 && "Do not know how to print this instruction!"); 486 abort(); 487 } 488} 489 490bool X86AsmPrinter::doInitialization(Module &M) { 491 AsmPrinter::doInitialization(M); 492 // Tell gas we are outputting Intel syntax (not AT&T syntax) assembly. 493 // 494 // Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an 495 // instruction as a reference to the register named sp, and if you try to 496 // reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased 497 // before being looked up in the symbol table. This creates spurious 498 // `undefined symbol' errors when linking. Workaround: Do not use `noprefix' 499 // mode, and decorate all register names with percent signs. 500 O << "\t.intel_syntax\n"; 501 return false; 502} 503 504// SwitchSection - Switch to the specified section of the executable if we are 505// not already in it! 506// 507static void SwitchSection(std::ostream &OS, std::string &CurSection, 508 const char *NewSection) { 509 if (CurSection != NewSection) { 510 CurSection = NewSection; 511 if (!CurSection.empty()) 512 OS << "\t" << NewSection << "\n"; 513 } 514} 515 516bool X86AsmPrinter::doFinalization(Module &M) { 517 const TargetData &TD = TM.getTargetData(); 518 std::string CurSection; 519 520 // Print out module-level global variables here. 521 for (Module::const_giterator I = M.gbegin(), E = M.gend(); I != E; ++I) 522 if (I->hasInitializer()) { // External global require no code 523 O << "\n\n"; 524 std::string name = Mang->getValueName(I); 525 Constant *C = I->getInitializer(); 526 unsigned Size = TD.getTypeSize(C->getType()); 527 unsigned Align = TD.getTypeAlignment(C->getType()); 528 529 if (C->isNullValue() && 530 (I->hasLinkOnceLinkage() || I->hasInternalLinkage() || 531 I->hasWeakLinkage() /* FIXME: Verify correct */)) { 532 SwitchSection(O, CurSection, ".data"); 533 if (I->hasInternalLinkage()) 534 O << "\t.local " << name << "\n"; 535 536 O << "\t.comm " << name << "," << TD.getTypeSize(C->getType()) 537 << "," << (unsigned)TD.getTypeAlignment(C->getType()); 538 O << "\t\t# "; 539 WriteAsOperand(O, I, true, true, &M); 540 O << "\n"; 541 } else { 542 switch (I->getLinkage()) { 543 case GlobalValue::LinkOnceLinkage: 544 case GlobalValue::WeakLinkage: // FIXME: Verify correct for weak. 545 // Nonnull linkonce -> weak 546 O << "\t.weak " << name << "\n"; 547 SwitchSection(O, CurSection, ""); 548 O << "\t.section\t.llvm.linkonce.d." << name << ",\"aw\",@progbits\n"; 549 break; 550 551 case GlobalValue::AppendingLinkage: 552 // FIXME: appending linkage variables should go into a section of 553 // their name or something. For now, just emit them as external. 554 case GlobalValue::ExternalLinkage: 555 // If external or appending, declare as a global symbol 556 O << "\t.globl " << name << "\n"; 557 // FALL THROUGH 558 case GlobalValue::InternalLinkage: 559 if (C->isNullValue()) 560 SwitchSection(O, CurSection, ".bss"); 561 else 562 SwitchSection(O, CurSection, ".data"); 563 break; 564 } 565 566 O << "\t.align " << Align << "\n"; 567 O << "\t.type " << name << ",@object\n"; 568 O << "\t.size " << name << "," << Size << "\n"; 569 O << name << ":\t\t\t\t# "; 570 WriteAsOperand(O, I, true, true, &M); 571 O << " = "; 572 WriteAsOperand(O, C, false, false, &M); 573 O << "\n"; 574 emitGlobalConstant(C); 575 } 576 } 577 578 AsmPrinter::doFinalization(M); 579 return false; // success 580} 581