ppc64-fixups.s revision 7a34599db017a5486cf7cd11eb124984acec8286
1 2# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s 3 4# RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \ 5# RUN: llvm-readobj -r | FileCheck %s -check-prefix=REL 6 7# CHECK: b target # encoding: [0b010010AA,A,A,0bAAAAAA00] 8# CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24 9# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 target 0x0 10 b target 11 12# CHECK: ba target # encoding: [0b010010AA,A,A,0bAAAAAA10] 13# CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs 14# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR24 target 0x0 15 ba target 16 17# CHECK: beq 0, target # encoding: [0x41,0x82,A,0bAAAAAA00] 18# CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14 19# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL14 target 0x0 20 beq target 21 22# CHECK: beqa 0, target # encoding: [0x41,0x82,A,0bAAAAAA10] 23# CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs 24# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR14 target 0x0 25 beqa target 26 27 28# CHECK: li 3, target@l # encoding: [0x38,0x60,A,A] 29# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16 30# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 31 li 3, target@l 32 33# CHECK: addis 3, 3, target@ha # encoding: [0x3c,0x63,A,A] 34# CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16 35# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0 36 addis 3, 3, target@ha 37 38# CHECK: lis 3, target@ha # encoding: [0x3c,0x60,A,A] 39# CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16 40# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0 41 lis 3, target@ha 42 43# CHECK: addi 4, 3, target@l # encoding: [0x38,0x83,A,A] 44# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16 45# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 46 addi 4, 3, target@l 47 48# CHECK: li 3, target@ha # encoding: [0x38,0x60,A,A] 49# CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16 50# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0 51 li 3, target@ha 52 53# CHECK: lis 3, target@l # encoding: [0x3c,0x60,A,A] 54# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16 55# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 56 lis 3, target@l 57 58# CHECK: li 3, target@h # encoding: [0x38,0x60,A,A] 59# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16 60# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0 61 li 3, target@h 62 63# CHECK: lis 3, target@h # encoding: [0x3c,0x60,A,A] 64# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16 65# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0 66 lis 3, target@h 67 68# CHECK: li 3, target@higher # encoding: [0x38,0x60,A,A] 69# CHECK-NEXT: # fixup A - offset: 2, value: target@higher, kind: fixup_ppc_half16 70# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHER target 0x0 71 li 3, target@higher 72 73# CHECK: lis 3, target@highest # encoding: [0x3c,0x60,A,A] 74# CHECK-NEXT: # fixup A - offset: 2, value: target@highest, kind: fixup_ppc_half16 75# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHEST target 0x0 76 lis 3, target@highest 77 78# CHECK: li 3, target@highera # encoding: [0x38,0x60,A,A] 79# CHECK-NEXT: # fixup A - offset: 2, value: target@highera, kind: fixup_ppc_half16 80# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHERA target 0x0 81 li 3, target@highera 82 83# CHECK: lis 3, target@highesta # encoding: [0x3c,0x60,A,A] 84# CHECK-NEXT: # fixup A - offset: 2, value: target@highesta, kind: fixup_ppc_half16 85# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHESTA target 0x0 86 lis 3, target@highesta 87 88# CHECK: lwz 1, target@l(3) # encoding: [0x80,0x23,A,A] 89# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16 90# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 91 lwz 1, target@l(3) 92 93# CHECK: lwz 1, target(3) # encoding: [0x80,0x23,A,A] 94# CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_half16 95# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0 96 lwz 1, target(3) 97 98# CHECK: ld 1, target@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 99# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16ds 100# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO_DS target 0x0 101 ld 1, target@l(3) 102 103# CHECK: ld 1, target(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 104# CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_half16ds 105# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_DS target 0x0 106 ld 1, target(3) 107 108base: 109# CHECK: lwz 1, target-base(3) # encoding: [0x80,0x23,A,A] 110# CHECK-NEXT: # fixup A - offset: 2, value: target-base, kind: fixup_ppc_half16 111# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16 target 0x2 112 lwz 1, target-base(3) 113 114# CHECK: li 3, target-base@h # encoding: [0x38,0x60,A,A] 115# CHECK-NEXT: # fixup A - offset: 2, value: target-base@h, kind: fixup_ppc_half16 116# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HI target 0x6 117 li 3, target-base@h 118 119# CHECK: li 3, target-base@l # encoding: [0x38,0x60,A,A] 120# CHECK-NEXT: # fixup A - offset: 2, value: target-base@l, kind: fixup_ppc_half16 121# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_LO target 0xA 122 li 3, target-base@l 123 124# CHECK: li 3, target-base@ha # encoding: [0x38,0x60,A,A] 125# CHECK-NEXT: # fixup A - offset: 2, value: target-base@ha, kind: fixup_ppc_half16 126# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HA target 0xE 127 li 3, target-base@ha 128 129# CHECK: ori 3, 3, target@l # encoding: [0x60,0x63,A,A] 130# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16 131# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 132 ori 3, 3, target@l 133 134# CHECK: oris 3, 3, target@h # encoding: [0x64,0x63,A,A] 135# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16 136# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0 137 oris 3, 3, target@h 138 139# CHECK: ld 1, target@toc(2) # encoding: [0xe8,0x22,A,0bAAAAAA00] 140# CHECK-NEXT: # fixup A - offset: 2, value: target@toc, kind: fixup_ppc_half16ds 141# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_DS target 0x0 142 ld 1, target@toc(2) 143 144# CHECK: addis 3, 2, target@toc@ha # encoding: [0x3c,0x62,A,A] 145# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@ha, kind: fixup_ppc_half16 146# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HA target 0x0 147 addis 3, 2, target@toc@ha 148 149# CHECK: addi 4, 3, target@toc@l # encoding: [0x38,0x83,A,A] 150# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16 151# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0 152 addi 4, 3, target@toc@l 153 154# CHECK: addis 3, 2, target@toc@h # encoding: [0x3c,0x62,A,A] 155# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@h, kind: fixup_ppc_half16 156# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HI target 0x0 157 addis 3, 2, target@toc@h 158 159# CHECK: lwz 1, target@toc@l(3) # encoding: [0x80,0x23,A,A] 160# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16 161# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0 162 lwz 1, target@toc@l(3) 163 164# CHECK: ld 1, target@toc@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 165# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16ds 166# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO_DS target 0x0 167 ld 1, target@toc@l(3) 168 169# CHECK: addi 4, 3, target@GOT # encoding: [0x38,0x83,A,A] 170# CHECK-NEXT: # fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16 171# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16 target 0x0 172 addi 4, 3, target@got 173 174# CHECK: ld 1, target@GOT(2) # encoding: [0xe8,0x22,A,0bAAAAAA00] 175# CHECK-NEXT: # fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16ds 176# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_DS target 0x0 177 ld 1, target@got(2) 178 179# CHECK: addis 3, 2, target@got@ha # encoding: [0x3c,0x62,A,A] 180# CHECK-NEXT: # fixup A - offset: 2, value: target@got@ha, kind: fixup_ppc_half16 181# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HA target 0x0 182 addis 3, 2, target@got@ha 183 184# CHECK: addi 4, 3, target@got@l # encoding: [0x38,0x83,A,A] 185# CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16 186# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0 187 addi 4, 3, target@got@l 188 189# CHECK: addis 3, 2, target@got@h # encoding: [0x3c,0x62,A,A] 190# CHECK-NEXT: # fixup A - offset: 2, value: target@got@h, kind: fixup_ppc_half16 191# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HI target 0x0 192 addis 3, 2, target@got@h 193 194# CHECK: lwz 1, target@got@l(3) # encoding: [0x80,0x23,A,A] 195# CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16 196# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0 197 lwz 1, target@got@l(3) 198 199# CHECK: ld 1, target@got@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 200# CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16ds 201# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO_DS target 0x0 202 ld 1, target@got@l(3) 203 204 205# CHECK: addis 3, 2, target@tprel@ha # encoding: [0x3c,0x62,A,A] 206# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@ha, kind: fixup_ppc_half16 207# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HA target 0x0 208 addis 3, 2, target@tprel@ha 209 210# CHECK: addi 3, 3, target@tprel@l # encoding: [0x38,0x63,A,A] 211# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16 212# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO target 0x0 213 addi 3, 3, target@tprel@l 214 215# CHECK: addi 3, 3, target@tprel # encoding: [0x38,0x63,A,A] 216# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16 217# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16 target 0x0 218 addi 3, 3, target@tprel 219 220# CHECK: addi 3, 3, target@tprel@h # encoding: [0x38,0x63,A,A] 221# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@h, kind: fixup_ppc_half16 222# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HI target 0x0 223 addi 3, 3, target@tprel@h 224 225# CHECK: addi 3, 3, target@tprel@higher # encoding: [0x38,0x63,A,A] 226# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@higher, kind: fixup_ppc_half16 227# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHER target 0x0 228 addi 3, 3, target@tprel@higher 229 230# CHECK: addis 3, 2, target@tprel@highest # encoding: [0x3c,0x62,A,A] 231# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highest, kind: fixup_ppc_half16 232# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHEST target 0x0 233 addis 3, 2, target@tprel@highest 234 235# CHECK: addi 3, 3, target@tprel@highera # encoding: [0x38,0x63,A,A] 236# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highera, kind: fixup_ppc_half16 237# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHERA target 0x0 238 addi 3, 3, target@tprel@highera 239 240# CHECK: addis 3, 2, target@tprel@highesta # encoding: [0x3c,0x62,A,A] 241# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highesta, kind: fixup_ppc_half16 242# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHESTA target 0x0 243 addis 3, 2, target@tprel@highesta 244 245# CHECK: ld 1, target@tprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 246# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16ds 247# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO_DS target 0x0 248 ld 1, target@tprel@l(3) 249 250# CHECK: ld 1, target@tprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 251# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16ds 252# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_DS target 0x0 253 ld 1, target@tprel(3) 254 255# CHECK: addis 3, 2, target@dtprel@ha # encoding: [0x3c,0x62,A,A] 256# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@ha, kind: fixup_ppc_half16 257# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HA target 0x0 258 addis 3, 2, target@dtprel@ha 259 260# CHECK: addi 3, 3, target@dtprel@l # encoding: [0x38,0x63,A,A] 261# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16 262# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO target 0x0 263 addi 3, 3, target@dtprel@l 264 265# CHECK: addi 3, 3, target@dtprel # encoding: [0x38,0x63,A,A] 266# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16 267# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16 target 0x0 268 addi 3, 3, target@dtprel 269 270# CHECK: addi 3, 3, target@dtprel@h # encoding: [0x38,0x63,A,A] 271# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@h, kind: fixup_ppc_half16 272# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HI target 0x0 273 addi 3, 3, target@dtprel@h 274 275# CHECK: addi 3, 3, target@dtprel@higher # encoding: [0x38,0x63,A,A] 276# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@higher, kind: fixup_ppc_half16 277# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHER target 0x0 278 addi 3, 3, target@dtprel@higher 279 280# CHECK: addis 3, 2, target@dtprel@highest # encoding: [0x3c,0x62,A,A] 281# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highest, kind: fixup_ppc_half16 282# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHEST target 0x0 283 addis 3, 2, target@dtprel@highest 284 285# CHECK: addi 3, 3, target@dtprel@highera # encoding: [0x38,0x63,A,A] 286# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highera, kind: fixup_ppc_half16 287# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHERA target 0x0 288 addi 3, 3, target@dtprel@highera 289 290# CHECK: addis 3, 2, target@dtprel@highesta # encoding: [0x3c,0x62,A,A] 291# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highesta, kind: fixup_ppc_half16 292# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHESTA target 0x0 293 addis 3, 2, target@dtprel@highesta 294 295# CHECK: ld 1, target@dtprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 296# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16ds 297# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO_DS target 0x0 298 ld 1, target@dtprel@l(3) 299 300# CHECK: ld 1, target@dtprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 301# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16ds 302# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_DS target 0x0 303 ld 1, target@dtprel(3) 304 305 306# CHECK: addis 3, 2, target@got@tprel@ha # encoding: [0x3c,0x62,A,A] 307# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@ha, kind: fixup_ppc_half16 308# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HA target 0x0 309 addis 3, 2, target@got@tprel@ha 310 311# CHECK: ld 1, target@got@tprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 312# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_half16ds 313# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0 314 ld 1, target@got@tprel@l(3) 315 316# CHECK: addis 3, 2, target@got@tprel@h # encoding: [0x3c,0x62,A,A] 317# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@h, kind: fixup_ppc_half16 318# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HI target 0x0 319 addis 3, 2, target@got@tprel@h 320 321# CHECK: addis 3, 2, target@got@tprel@l # encoding: [0x3c,0x62,A,A] 322# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_half16 323# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0 324 addis 3, 2, target@got@tprel@l 325 326# CHECK: addis 3, 2, target@got@tprel # encoding: [0x3c,0x62,A,A] 327# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel, kind: fixup_ppc_half16 328# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0 329 addis 3, 2, target@got@tprel 330 331# CHECK: ld 1, target@got@tprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 332# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel, kind: fixup_ppc_half16ds 333# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0 334 ld 1, target@got@tprel(3) 335 336# CHECK: addis 3, 2, target@got@dtprel@ha # encoding: [0x3c,0x62,A,A] 337# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@ha, kind: fixup_ppc_half16 338# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HA target 0x0 339 addis 3, 2, target@got@dtprel@ha 340 341# CHECK: ld 1, target@got@dtprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 342# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@l, kind: fixup_ppc_half16ds 343# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0 344 ld 1, target@got@dtprel@l(3) 345 346# CHECK: addis 3, 2, target@got@dtprel@h # encoding: [0x3c,0x62,A,A] 347# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@h, kind: fixup_ppc_half16 348# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HI target 0x0 349 addis 3, 2, target@got@dtprel@h 350 351# CHECK: addis 3, 2, target@got@dtprel@l # encoding: [0x3c,0x62,A,A] 352# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@l, kind: fixup_ppc_half16 353# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0 354 addis 3, 2, target@got@dtprel@l 355 356# CHECK: addis 3, 2, target@got@dtprel # encoding: [0x3c,0x62,A,A] 357# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel, kind: fixup_ppc_half16 358# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0 359 addis 3, 2, target@got@dtprel 360 361# CHECK: ld 1, target@got@dtprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] 362# CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel, kind: fixup_ppc_half16ds 363# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0 364 ld 1, target@got@dtprel(3) 365 366# CHECK: addis 3, 2, target@got@tlsgd@ha # encoding: [0x3c,0x62,A,A] 367# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@ha, kind: fixup_ppc_half16 368# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HA target 0x0 369 addis 3, 2, target@got@tlsgd@ha 370 371# CHECK: addi 3, 3, target@got@tlsgd@l # encoding: [0x38,0x63,A,A] 372# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@l, kind: fixup_ppc_half16 373# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_LO target 0x0 374 addi 3, 3, target@got@tlsgd@l 375 376# CHECK: addi 3, 3, target@got@tlsgd@h # encoding: [0x38,0x63,A,A] 377# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@h, kind: fixup_ppc_half16 378# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HI target 0x0 379 addi 3, 3, target@got@tlsgd@h 380 381# CHECK: addi 3, 3, target@got@tlsgd # encoding: [0x38,0x63,A,A] 382# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd, kind: fixup_ppc_half16 383# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16 target 0x0 384 addi 3, 3, target@got@tlsgd 385 386 387# CHECK: addis 3, 2, target@got@tlsld@ha # encoding: [0x3c,0x62,A,A] 388# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@ha, kind: fixup_ppc_half16 389# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HA target 0x0 390 addis 3, 2, target@got@tlsld@ha 391 392# CHECK: addi 3, 3, target@got@tlsld@l # encoding: [0x38,0x63,A,A] 393# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@l, kind: fixup_ppc_half16 394# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_LO target 0x0 395 addi 3, 3, target@got@tlsld@l 396 397# CHECK: addi 3, 3, target@got@tlsld@h # encoding: [0x38,0x63,A,A] 398# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@h, kind: fixup_ppc_half16 399# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HI target 0x0 400 addi 3, 3, target@got@tlsld@h 401 402# CHECK: addi 3, 3, target@got@tlsld # encoding: [0x38,0x63,A,A] 403# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld, kind: fixup_ppc_half16 404# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16 target 0x0 405 addi 3, 3, target@got@tlsld 406 407# CHECK: bl __tls_get_addr(target@tlsgd) # encoding: [0b010010BB,B,B,0bBBBBBB01] 408# CHECK-NEXT: # fixup A - offset: 0, value: target@tlsgd, kind: fixup_ppc_nofixup 409# CHECK-NEXT: # fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24 410# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLSGD target 0x0 411# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0 412 bl __tls_get_addr(target@tlsgd) 413 414# CHECK: bl __tls_get_addr(target@tlsld) # encoding: [0b010010BB,B,B,0bBBBBBB01] 415# CHECK-NEXT: # fixup A - offset: 0, value: target@tlsld, kind: fixup_ppc_nofixup 416# CHECK-NEXT: # fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24 417# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLSLD target 0x0 418# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0 419 bl __tls_get_addr(target@tlsld) 420 421# CHECK: add 3, 4, target@tls # encoding: [0x7c,0x64,0x6a,0x14] 422# CHECK-NEXT: # fixup A - offset: 0, value: target@tls, kind: fixup_ppc_nofixup 423# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLS target 0x0 424 add 3, 4, target@tls 425 426 427# Data relocs 428# llvm-mc does not show any "encoding" string for data, so we just check the relocs 429 430# CHECK-REL: .rela.data 431 .data 432 433# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TOC - 0x0 434 .quad .TOC.@tocbase 435 436# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPMOD64 target 0x0 437 .quad target@dtpmod 438 439# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TPREL64 target 0x0 440 .quad target@tprel 441 442# CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPREL64 target 0x0 443 .quad target@dtprel 444 445