nv50_screen.h revision 6a9c151dbb87a10b6d51c451a5a277d646d08857 
1#ifndef __NV50_SCREEN_H__
2#define __NV50_SCREEN_H__
3
4#include "nouveau_screen.h"
5#include "nouveau_fence.h"
6#include "nouveau_mm.h"
7#include "nouveau_heap.h"
8
9#include "nv50/nv50_winsys.h"
10#include "nv50/nv50_stateobj.h"
11
12#define NV50_TIC_MAX_ENTRIES 2048
13#define NV50_TSC_MAX_ENTRIES 2048
14
15/* doesn't count reserved slots (for auxiliary constants, immediates, etc.) */
16#define NV50_MAX_PIPE_CONSTBUFS 14
17
18struct nv50_context;
19
20#define NV50_CODE_BO_SIZE_LOG2 19
21
22#define NV50_SCREEN_RESIDENT_BO_COUNT 5
23
24#define NV50_MAX_VIEWPORTS 16
25
26#define NV50_MAX_GLOBALS 16
27
28#define ONE_TEMP_SIZE (4/*vector*/ * sizeof(float))
29
30struct nv50_blitter;
31
32struct nv50_graph_state {
33   uint32_t instance_elts; /* bitmask of per-instance elements */
34   uint32_t instance_base;
35   uint32_t interpolant_ctrl;
36   uint32_t semantic_color;
37   uint32_t semantic_psize;
38   int32_t index_bias;
39   bool uniform_buffer_bound[3];
40   bool prim_restart;
41   bool point_sprite;
42   bool rt_serialize;
43   bool flushed;
44   bool rasterizer_discard;
45   uint8_t tls_required;
46   bool new_tls_space;
47   uint8_t num_vtxbufs;
48   uint8_t num_vtxelts;
49   uint8_t num_textures[3];
50   uint8_t num_samplers[3];
51   uint8_t prim_size;
52   uint16_t scissor;
53};
54
55struct nv50_screen {
56   struct nouveau_screen base;
57
58   struct nv50_context *cur_ctx;
59   struct nv50_graph_state save_state;
60
61   int num_occlusion_queries_active;
62
63   struct nouveau_bo *code;
64   struct nouveau_bo *uniforms;
65   struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
66   struct nouveau_bo *stack_bo;
67   struct nouveau_bo *tls_bo;
68
69   unsigned TPs;
70   unsigned MPsInTP;
71   unsigned max_tls_space;
72   unsigned cur_tls_space;
73   unsigned mp_count;
74
75   struct nouveau_heap *vp_code_heap;
76   struct nouveau_heap *gp_code_heap;
77   struct nouveau_heap *fp_code_heap;
78
79   struct nv50_blitter *blitter;
80
81   struct {
82      void **entries;
83      int next;
84      uint32_t lock[NV50_TIC_MAX_ENTRIES / 32];
85   } tic;
86
87   struct {
88      void **entries;
89      int next;
90      uint32_t lock[NV50_TSC_MAX_ENTRIES / 32];
91   } tsc;
92
93   struct {
94      uint32_t *map;
95      struct nouveau_bo *bo;
96   } fence;
97
98   struct {
99      struct nv50_program *prog; /* compute state object to read MP counters */
100      struct nv50_hw_sm_query *mp_counter[4]; /* counter to query allocation */
101      uint8_t num_hw_sm_active;
102   } pm;
103
104   struct nouveau_object *sync;
105
106   struct nouveau_object *tesla;
107   struct nouveau_object *compute;
108   struct nouveau_object *eng2d;
109   struct nouveau_object *m2mf;
110};
111
112static inline struct nv50_screen *
113nv50_screen(struct pipe_screen *screen)
114{
115   return (struct nv50_screen *)screen;
116}
117
118int nv50_screen_get_driver_query_info(struct pipe_screen *, unsigned,
119                                      struct pipe_driver_query_info *);
120
121bool nv50_blitter_create(struct nv50_screen *);
122void nv50_blitter_destroy(struct nv50_screen *);
123
124int nv50_screen_tic_alloc(struct nv50_screen *, void *);
125int nv50_screen_tsc_alloc(struct nv50_screen *, void *);
126
127int nv50_screen_compute_setup(struct nv50_screen *, struct nouveau_pushbuf *);
128
129static inline void
130nv50_resource_fence(struct nv04_resource *res, uint32_t flags)
131{
132   struct nv50_screen *screen = nv50_screen(res->base.screen);
133
134   if (res->mm) {
135      nouveau_fence_ref(screen->base.fence.current, &res->fence);
136      if (flags & NOUVEAU_BO_WR)
137         nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
138   }
139}
140
141static inline void
142nv50_resource_validate(struct nv04_resource *res, uint32_t flags)
143{
144   if (likely(res->bo)) {
145      if (flags & NOUVEAU_BO_WR)
146         res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING |
147            NOUVEAU_BUFFER_STATUS_DIRTY;
148      if (flags & NOUVEAU_BO_RD)
149         res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
150
151      nv50_resource_fence(res, flags);
152   }
153}
154
155struct nv50_format {
156   uint32_t rt;
157   uint32_t tic;
158   uint32_t vtx;
159   uint32_t usage;
160};
161
162extern const struct nv50_format nv50_format_table[];
163
164static inline void
165nv50_screen_tic_unlock(struct nv50_screen *screen, struct nv50_tic_entry *tic)
166{
167   if (tic->id >= 0)
168      screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
169}
170
171static inline void
172nv50_screen_tsc_unlock(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)
173{
174   if (tsc->id >= 0)
175      screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
176}
177
178static inline void
179nv50_screen_tic_free(struct nv50_screen *screen, struct nv50_tic_entry *tic)
180{
181   if (tic->id >= 0) {
182      screen->tic.entries[tic->id] = NULL;
183      screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
184   }
185}
186
187static inline void
188nv50_screen_tsc_free(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)
189{
190   if (tsc->id >= 0) {
191      screen->tsc.entries[tsc->id] = NULL;
192      screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
193   }
194}
195
196extern int nv50_tls_realloc(struct nv50_screen *screen, unsigned tls_space);
197
198#endif
199